On Sun, Sep 07, 2008 at 02:31:16PM +0200, Vincent wrote:
Simplicity in the design of the chip (and so in silicium surface)
You have to have a 64bit tlb anyway for support of the 64bit mode;
so in 32bit mode it's much simpler, from a electronic design POW, to
just set the 32 upper bits to 0 on data path entry of the TBL than
to have internals of the TLB work in a different way (basically requiring
every TLB registers to be dual-mode, as well as the lookup and eviction
logics). This would be a quite high cost on the silicium, maybe near of
doubing the on-die size of the TLB. This would also be a cost in timing, as
you're adding extra gates in the critical path.