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Re: Various size of (Project) ideas for NetBSD and pkgsrc

Hi Ryo,

Le 29/09/13 03:09, Ryo ONODERA a écrit :

(8) Porting NetBSD to some FPGA CPU board
OpenCores' OpenRISC 1200, Xilinx's MicloBlaze, Altera NIOS II is
available for FPGA board.
At least OpenRISC 1200 and MicroBlaze have Linux support.
Supporting these architecture is interesting for NetBSD.
(I have no idea about NetBSD/nios2 status.)
I am in the process of adding support for LatticeMico32 (LM32) architecture to NetBSD 6 kernel. Last year a MMU (memory management unit) has been added to the LM32 softcore which makes it able to run Linux or NetBSD.
LM32 already had a uCLinux (noMMU) working port.
This year I started the project to port NetBSD 6 kernel on MMU-enabled LM32 CPU in general and on the Milkymist open source System-on-Chip in particular.

Today I had my first result on this project:

-> NetBSD 6 kernel immediately panics and dies. Even though this might seem like a poor result, there have been a lot of work behind it. This is a first step which looks very promising :) (at least console driver works ;))

The Milkymist System-on-Chip runs on various FPGAs (Spartan 3, Spartan 6, Virtex 4 etc) from various FPGA vendors (Xilinx, Lattice, Altera) It has been ported on numerous boards (Milkymist One, ML401, De0-nano, Nexys3 etc...)
It uses LatticeMico32 (open source softcore) as it's CPU softcore.

If you want more information about Milkymist and it's NetBSD porting work status do not hesitate to e-mail me or the Milkymist mailing list :)

FYI MicroBlaze CPU is not open source, even though there are a few open source clones out there (aeMB and others)
Nios II is not open source neither.
OpenRISC is open source and has a MMU and a Linux port, it's a nice project as well :)

All of this being said, I agree with you that having NetBSD running on FPGA would be a really cool achievement, especially on OpenSource hardware (PCB and FPGA design) which allows for deep understanding of hardware, digital design and low level software as well as tweaking the CPU (cache size, TLB size, instructions, pipeline configuration etc).

Cheers! :-)

Yann Sionneau

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