On 21/08/15 11:58, Johnny Billquist wrote:
32-bit? You mean 34-bit? Or did the NVAX+ only implement 32-bit PA although the VARM allows up to 34-bits?
The bit blow was copied-and-pasted from p2-3 of that manual. There are other references to 32 and 30 so I don't think it is a typo.
"In addition to the natural 32-bit physical address, the CPU may be configured to generate 30-bit physical addresses. In this mode, only 512MB of memory space can be referenced, as shown in Figure 2–3."
That could be interesting information to read.
Can you handle a PDF of just under 900KB by email?There's a scan (rather than an original doc) on bitsavers: http://bitsavers.trailing-edge.com/pdf/dec/vax/4000/NVAX_Plus_CPU_Chip_Functional_Specification_Oct91.pdf
(I'm pretty sure this stuff has been sent to others in the past, but I can't find out to whom or where it might be right now).
Antonio arcarlini%iee.org@localhost