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Re: Delay slots

On Tue, 21 Jun 2016, David Holland wrote:

>  > > I think "delay slot" is a specific term with a different meaning.
>  > > Mostly it refers to the bizarre handling of the instruction
>  > > immediately following a branch instruction (other than
>  > > branch-likely). In MIPS-1 it also shows up in loads, but that
>  > > disappeared a very long time ago.
>  > 
>  > MIPS-II I think. Or was it 'implementation specific'?
> MIPS-II according to all the documentation, but not according to my
> experience years ago with an emulator that tried to enforce load delay
> slots and the Ultrix compiler. (We were using the Ultrix compiler on
> R3000-based decstations and it was issuing code that worked natively
> and assumed pipeline interlocks for reads.) I have no idea how to
> reconcile this.

 The only MIPS II implementation ever was the R6000 CPU and it did not 
have load delay slots.  Finding a specimen, especially a live one, these 
days will be a challenging task.


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