Re: Question about caching

[Ignatios Souvatzis <is%netbsd.org@localhost>]

On Thu, Aug 27, 2009 at 11:03:57AM -0700, Aaron J. Grier wrote:
> On Thu, Aug 27, 2009 at 11:03:55AM -0700, Jason Thorpe wrote:
> > Ping?  Does no one else remember either? :-)
> 
> wow, MMU _and_ cache!  :)
> 
> which 68k variants we talking about here?

68030, 68040, 68060, at least. 68060 has enough I and D caches to
run dhrystone independent of memory timing, and to keep all of rc5/64's 
data array in the data cache, allowing (with slightly asymmetric code)
to compute two instances in parallel in the two integer units.

Jason: afair, the native (physically-mapped) Caches (I just read the 
68040 wording) allow for mixed accesses.

If a cache-inhibited access hits a page with data in cache, the cache is
invalidated (if valid) or pushed (if dirty) first. 

However, you have to CPUSHA etc. when changing page attributes, to make
memory consistent with cache content and page description tables.

Also, note that you have to maintain data/instruction cache consistent
in software.

ISTR that the 68060 is similar.

        -is