Question about caching

[Jason Thorpe <THORPEJ%SHAGADELIC.ORG@localhost>]

I have forgotten some of the details about how the cache on the m68k  
works, and I long since got rid of my manuals, so I need to ask the  
question here :-)

If a page is mapped into multiple pmaps (e.g. kernel pmap and a user  
pmap), and one of those mappings is cache-inhibited, do all of the  
mappings need to be cache-inhibited?  My feeling is that the answer is  
"yes".

I know I need to do this for the HP MMU/VAC case (separate VACs for  
kernel/user), but I want to verify for the physically-addressed cache  
case.

Thanks.

-- thorpej