Re: armv5 userland broken

[Nick Hudson <nick.hudson%gmx.co.uk@localhost>]

On 22/06/2021 12:43, Rin Okuyama wrote:
[snip]

> So, my conclusions at the moment are:
>
> (1) GCC10 emits LDRD/STRD for unaligned memory operand for armv5,

I think it's armv5te which is the reason that {ld,st}rd are getting
generated.

I think the attached patch is sensible as is changing from


        *) target_cpu_cname="arm9e";;

to arm9

Nick

Index: sys/arch/arm/conf/files.arm
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/conf/files.arm,v
retrieving revision 1.164
diff -u -p -r1.164 files.arm
--- sys/arch/arm/conf/files.arm	21 Oct 2020 13:31:51 -0000	1.164
+++ sys/arch/arm/conf/files.arm	23 Jun 2021 05:53:03 -0000
@@ -12,7 +12,7 @@ defflag	opt_cputypes.h		CPU_ARMV3: CPU_P
 defflag	opt_cputypes.h		CPU_ARMV4: CPU_ARMV3
 defflag	opt_cputypes.h		CPU_ARMV4T: CPU_ARMV4
 defflag	opt_cputypes.h		CPU_ARMV5T: CPU_ARMV4T
-defflag	opt_cputypes.h		CPU_ARMV5TE: CPU_ARMV5T
+defflag	opt_cputypes.h		CPU_ARMV5TE: CPU_ARMV5T, ARM32_DISABLE_ALIGNMENT_FAULTS
 defflag	opt_cputypes.h		CPU_XSCALE: CPU_ARMV5TE
 defflag	opt_cputypes.h		CPU_ARMV6: ARM32_DISABLE_ALIGNMENT_FAULTS
 defflag	opt_cputypes.h		CPU_ARMV7: ARM32_DISABLE_ALIGNMENT_FAULTS