Allwinner H3 support added to -current

[wilde%sha-bang.de@localhost]

> I've added support for the Allwinner H3 SoC to -current.

Thanks a lot for your great work!

With that, I got NetBSD up and running on my OrangePI One.

So far I can confirm that:
SMP, USB, RTC, UART, SD/MMC and NIC are working!
(and the resize of the fs on the first boot worked, too)

In addition to the steps documented by you I had to:

- add sun8i-h3-orangepi-one.dts to DTS list in the SUNXI config

- In order to get the on board NIC (using H3 emac) running I snatched
    sun8i-h3-orangepi-one.dts
    sun8i-h3.dtsi
    sunxi-common-regulators.dtsi
  from u-boot-2017.05 and placed them in
    src/sys/external/gpl2/dts/dist/arch/arm/boot/dts
  as the dts currently included with NetBSD syssrc does not contain the
  emac definition.

Complete dmesg follows:

8< ----------------------------------------------------------------------
Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
    2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013, 2014, 2015, 2016, 2017
    The NetBSD Foundation, Inc.  All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
    The Regents of the University of California.  All rights reserved.

NetBSD 8.99.1 (SUNXI) #1: Mon Jul  3 12:00:52 CEST 2017
	wilde@santa:/home/wilde/data/qemu/NetBSD-arm/usr/obj/home/wilde/data/qemu/NetBSD-arm/usr/src/sys/arch/evbarm/compile/SUNXI
total memory = 512 MB
avail memory = 499 MB
sysctl_createv: sysctl_create(machine_arch) returned 17
timecounter: Timecounters tick every 10.000 msec
armfdt0 (root)
fdt0 at armfdt0: Xunlong Orange Pi One
fdt1 at fdt0
fdt2 at fdt0
cpus0 at fdt0
cpu0 at cpus0: Cortex-A7 r0p5 (Cortex V7A core)
cpu0: DC enabled IC enabled WB disabled EABT branch prediction enabled
cpu0: 32KB/32B 2-way L1 VIPT Instruction cache
cpu0: 32KB/64B 4-way write-back-locking-C L1 PIPT Data cache
cpu0: 512KB/64B 8-way write-through L2 PIPT Unified cache
vfp0 at cpu0: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals
cpu1 at cpus0
cpu2 at cpus0
cpu3 at cpus0
gic0 at fdt1: GIC
armgic0 at gic0: Generic Interrupt Controller, 160 sources (150 valid)
armgic0: 16 Priorities, 128 SPIs, 7 PPIs, 15 SGIs
gtmr0 at fdt0: Generic Timer
armgtmr0 at gtmr0: ARMv7 Generic 64-bit Timer (24000 kHz)
armgtmr0: interrupting on irq 27
timecounter: Timecounter "armgtmr0" frequency 24000000 Hz quality 500
sunxigpio0 at fdt1: PIO
sunxigpio1 at fdt1: PIO
fclock0 at fdt2: 24000000 Hz fixed clock
fclock1 at fdt2: 32768 Hz fixed clock
sun8ih3ccu0 at fdt1: H3 CCU
fregulator0 at fdt0: vcc3v3
fregulator1 at fdt0: vcc3v0
fregulator2 at fdt0: vcc5v0
sunxiusbphy0 at fdt1: USB PHY
ohci0 at fdt1: OHCI
ohci0: interrupting on GIC irq 107
ohci0: OHCI version 1.0
usb0 at ohci0: USB revision 1.0
ehci0 at fdt1: EHCI
ehci0: interrupting on GIC irq 106
ehci0: EHCI version 1.0
ehci0: companion controller, 1 port each: ohci0
usb1 at ehci0: USB revision 2.0
/clocks/apb0_clk at fdt2 not configured
/soc/dma-controller@01c02000 at fdt1 not configured
sunxiemac0 at fdt1: EMAC
sunxiemac0: interrupting on GIC irq 114
ukphy0 at sunxiemac0 phy 0: OUI 0x0088a0, model 0x0000, rev. 0
ukphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
ukphy1 at sunxiemac0 phy 1: OUI 0x0088a0, model 0x0000, rev. 0
ukphy1: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
/clocks/clk@01f01428 at fdt2 not configured
/clocks/ir_clk@01f01454 at fdt2 not configured
/soc/reset@01f014b0 at fdt1 not configured
psci0 at fdt0: PSCI 0.1
/leds at fdt0 not configured
gpiokeys0 at fdt0: sw4
/soc/syscon@01c00000 at fdt1 not configured
sunximmc0 at fdt1: SD/MMC controller
sunximmc0: interrupting on GIC irq 92
/soc/timer@01c20c00 at fdt1 not configured
/soc/watchdog@01c20ca0 at fdt1 not configured
com0 at fdt1: ns16550a, working fifo
com0: console
com0: interrupting on GIC irq 32
sunxirtc0 at fdt1: RTC
timecounter: Timecounter "clockinterrupt" frequency 100 Hz quality 0
cpu2: Cortex-A7 r0p5 (Cortex V7A core)
cpu2: DC enabled IC enabled WB disabled EABT branch prediction enabled
cpu2: 32KB/32B 2-way L1 VIPT Instruction cache
cpu2: 32KB/64B 4-way write-back-locking-C L1 PIPT Data cache
cpu2: 512KB/64B 8-way write-through L2 PIPT Unified cache
vfp2 at cpu2: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals
cpu1: Cortex-A7 r0p5 (Cortex V7A core)
cpu1: DC enabled IC enabled WB disabled EABT branch prediction enabled
cpu1: 32KB/32B 2-way L1 VIPT Instruction cache
cpu1: 32KB/64B 4-way write-back-locking-C L1 PIPT Data cache
cpu1: 512KB/64B 8-way write-through L2 PIPT Unified cache
vfp1 at cpu1: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals
cpu3: Cortex-A7 r0p5 (Cortex V7A core)
cpu3: DC enabled IC enabled WB disabled EABT branch prediction enabled
cpu3: 32KB/32B 2-way L1 VIPT Instruction cache
cpu3: 32KB/64B 4-way write-back-locking-C L1 PIPT Data cache
cpu3: 512KB/64B 8-way write-through L2 PIPT Unified cache
vfp3 at cpu3: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals
sdmmc0 at sunximmc0
uhub0 at usb0: Generic (0000) OHCI root hub (0000), class 9/0, rev 1.00/1.00, addr 1
uhub0: 1 port with 1 removable, self powered
uhub1 at usb1: Generic (0000) EHCI root hub (0000), class 9/0, rev 2.00/1.00, addr 1
uhub1: 1 port with 1 removable, self powered
sdmmc0: SD card status: 4-bit, C10, U1
ld0 at sdmmc0: <0x15:0x1012:NCard:0x10:0x68a64cfc:0x10b>
ld0: 15180 MB, 7710 cyl, 64 head, 63 sec, 512 bytes/sect x 31088640 sectors
IPsec: Initialized Security Association Processing.
ld0: 4-bit width, High-Speed/SDR25, 50.000 MHz
boot device: ld0
root on ld0a dumps on ld0b
root file system type: ffs
kern.module.path=/stand/evbarm/8.99.1/modules
WARNING: clock lost 6393 days
WARNING: using filesystem time
WARNING: CHECK AND RESET THE DATE!