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Re: SMP support for sparc64





I have changed assignment of timers in this update.  Previous patch
uses %tick interrupt for system clock.  This patch uses
counter-timer #0 as same as single processor kernel, but %tick is
used for per-CPU statclock instead of counter-timer #1.

Sorry, all smp kernel you provided are not working with my E4500. The error is still the same.
Fatal Reset after

timer0 at mainbus0 addr 0xffd81c00 irq vectors b0 ... esp0 at sbus1 slot 3 offset 0x8800000 vector 3 ipl 3: FAS366/HME, 40MHz, SCSI I7 scsibus0 at esp0: 16 targets, 8 luns per target timer1 at mainbus0 addr 0xffd67c00 irq vectors f0 pcons0 at mainbus0 scsibus0: waiting 2 seconds for devices to settle... scsibus1 at isp0: 16 targets, 8 luns per target <<<<<<<<<<<<<<<<<<< scsibus1: waiting 2 seconds for devices to settle... Kernelized RAIDframe activated

I don't know if this is important, but the intialisation of the scsibus and waiting for the device changed from single to SMP. Also the irq vector for the timer doesn't fit.

this is part of dmesg from the unpatched  4.99.55

timer0 at mainbus0 addr 0xffd81c00 irq vectors b0 and b1 ... esp0 at sbus1 slot 3 offset 0x8800000 vector 3 ipl 3: FAS366/HME, 40MHz, SCSI I7 scsibus1 at esp0: 16 targets, 8 luns per target <<<<<<<<<<<<<<<<< timer1 at mainbus0 addr 0xffd67c00 irq vectors f0 and f1 pcons0 at mainbus0 Kernelized RAIDframe activated scsibus0: waiting 2 seconds for devices to settle... scsibus1: waiting 2 seconds for devices to settle...

Best Regards
Stephan



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