Re: ACPI-Problems with NetBSD/i386 and a Compaq DL360 G1

[David Young <dyoung%pobox.com@localhost>]

On Wed, Aug 04, 2010 at 11:27:12PM +0200, the_badger%gmx.net@localhost wrote:
> Hello list,
>
> I am currently setting up a Compaq DL360 G1 Server with NetBSD
> (5.1_RC2). While this worked perfectly so far with a single-CPU
> variant (after some help from Matthias Scheler with a reboot-problem,
> see attached patch and PR 38501), the kernel (my own patched one as
> well as -GENERIC) froze the moment the first CPU was printed in green
> on the screen after I changed from single to dual processor.

If you don't mind, try the more conservative patch that I have attached,
and let me know if it does not also fix your reboot problem.

Dave

-- 
David Young             OJC Technologies
dyoung%ojctech.com@localhost      Urbana, IL * (217) 278-3933

Index: sys/dev/pci/pci.c
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/pci.c,v
retrieving revision 1.129
diff -u -p -r1.129 pci.c
--- sys/dev/pci/pci.c   6 Jun 2010 18:58:23 -0000       1.129
+++ sys/dev/pci/pci.c   4 Aug 2010 23:01:21 -0000
@@ -821,6 +926,7 @@ struct pci_child_power {
        int p_pm_offset;
        pcireg_t p_pm_cap;
        pcireg_t p_class;
+       pcireg_t p_csr;
 };
 
 static bool
@@ -874,9 +980,10 @@ pci_child_shutdown(device_t dv, int how)
        struct pci_child_power *priv = device_pmf_bus_private(dv);
        pcireg_t csr;
 
-       /* disable busmastering */
+       /* restore original bus-mastering state */
        csr = pci_conf_read(priv->p_pc, priv->p_tag, PCI_COMMAND_STATUS_REG);
        csr &= ~PCI_COMMAND_MASTER_ENABLE;
+       csr |= priv->p_csr & PCI_COMMAND_MASTER_ENABLE;
        pci_conf_write(priv->p_pc, priv->p_tag, PCI_COMMAND_STATUS_REG, csr);
        return true;
 }
@@ -907,6 +1014,8 @@ pci_child_register(device_t child)
        priv->p_tag = pci_make_tag(priv->p_pc, sc->sc_bus, device,
            function);
        priv->p_class = pci_conf_read(priv->p_pc, priv->p_tag, PCI_CLASS_REG);
+       priv->p_csr = pci_conf_read(priv->p_pc, priv->p_tag,
+           PCI_COMMAND_STATUS_REG);
 
        if (pci_get_capability(priv->p_pc, priv->p_tag,
                               PCI_CAP_PWRMGMT, &off, &reg)) {