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Re: earmhf issues on Beaglebone Black
On Fri, Jul 25, 2014 at 03:57:22PM +0100, Nick Hudson wrote:
> On 07/25/14 15:43, Manuel Bouyer wrote:
> >The RPI CPU has a VIVT L1 data cache, which could explain the
> >behavior difference (pmap_zero_page_generic() will behaves differently).
> >But I'm still surprised that it didn't cause more problems.
> RPI L1 is VIPT.
Right (that's what I meant I guess), and the A8 is PIPT, so
and pmap_zero_page_generic() checks for PIPT. So it's still
valid to explain why the RPI seems more stable.
But theorically, the RPI could still see this problem in
some case too, I guess.
Manuel Bouyer <bouyer%antioche.eu.org@localhost>
NetBSD: 26 ans d'experience feront toujours la difference
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