Re: enhanced speed step on AMD64

[bch%methodlogic.net@localhost]

On Sun, May 23, 2010 at 06:55:19PM +0000, bch%methodlogic.net@localhost wrote:
> On Sun, May 23, 2010 at 05:48:07PM +0100, Iain Hibbert wrote:
> > On Sun, 23 May 2010, bch%methodlogic.net@localhost wrote:
> > 
> > > Yup, and none of that works -- I've got a Pentium M with speedstep
> > > successfully running, so I'm aware of the interface, etc. Was wondering
> > > if something changed in the meantime that I missed... I'll leave this
> > > thread out there in the hope that someone can shed some light, or set
> > > me on the right path...
> > 
> > reading the code (at arch/x86/x86/est.c) seems to indicate that "boot -x"
> > should cause _some_ kind of message to be emitted if the est_init()
> > function is called. You could also build a kernel with "options EST_DEBUG"
> > which will print more..
> > 
> > Then, the code that calls est_init() (in arch/x86/x86/identcpu.c) shows
> > 
> > #ifdef ENHANCED_SPEEDSTEP
> >     if (cpu_feature[1] & CPUID2_EST) {
> >             if (rdmsr(MSR_MISC_ENABLE) & (1 << 16))
> >                     est_init(cpu_vendor);
> >     }
> > #endif /* ENHANCED_SPEEDSTEP */
> > 
> > and on my machine, "cpuctl identify 0" shows
> > 
> >   cpu0: features2 0xc1a9<SSE3,MONITOR,VMX,EST,TM2,xTPR,PDCM>
> > 
> > I don't know what MSR_MISC_ENABLE means, perhaps just that the CPU is
> > enabled..?
> 
> Thanks Iain -- rebuilding a kernel w/ EST_DEBUG right now... my cpuctl
> is as follows (I'm pasting whole thing, since this appears to be a
> "problem" CPU:


Hrmm.... from dmesg:

est_init_main: crlo == 0 || crhi == crlo

> kamloops# cpuctl identify 0
> cpu0: Intel Mobile Pentium II (Dixon) (686-class), 2660.22 MHz, id 0x20652
> cpu0: features  0xbfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR>
> cpu0: features  0xbfebfbff<PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR>
> cpu0: features  0xbfebfbff<SSE,SSE2,SS,HTT,TM,SBF>
> cpu0: features2 0x298e3ff<SSE3,B01,DTES64,MONITOR,DS-CPL,VMX,SMX,EST,TM2>
> cpu0: features2 0x298e3ff<SSSE3,CX16,xTPR,PDCM,SSE41,SSE42,POPCNT,B25>
> cpu0: features3 0x28100800<SYSCALL/SYSRET,XD,EM64T>
> cpu0: features4 0x1<LAHF>
> cpu0: "Intel(R) Core(TM) i7 CPU       M 620  @ 2.67GHz"
> cpu0: I-cache 32KB 64B/line 4-way, D-cache 32KB 64B/line 8-way
> cpu0: L2 cache 256KB 64B/line 8-way
> cpu0: ITLB 128 4KB entries 4-way
> cpu0: DTLB 64 4KB entries 4-way
> cpu0: L3 cache 4MB 64B/line 16-way
> cpu0: Initial APIC ID 0
> cpu0: Cluster/Package ID 0
> cpu0: Core ID 0
> cpu0: SMT ID 0
> cpu0: family 06 model 05 extfamily 00 extmodel 02
> 
> 
> 
> > iain
> > 
> > 
> 
> -- 
> Brad Harder
> Method Logic Digital Consulting
> http://methodlogic.net
> http://twitter.com/bcharder
> 

-- 
Brad Harder
Method Logic Digital Consulting
http://methodlogic.net
http://twitter.com/bcharder