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Problems with NSLU2/xscale kernel that go back to April, 2008
There have been recent reports of certain problems with NetBSD on the
NSLU2, both -current and older. For example, see:
http://mail-index.netbsd.org/port-arm/2009/03/08/msg000693.html
and the associated thread for more information. Andy and Luazi can
probably provide additional info.
The symptoms are a general malaise with various bits of software failing
(cc reporting internal errors, md5 returning inconsistent results) at
random times. The test that seems to work best, though it is not a
great test, is to md5 a large file. Older versions of the kernel will
return a different (and incorrect) result occasionally (1 or 2 times out
of 30). Newer kernels fail significantly more often. For example here
are the results for a kernel built using a cvs date of 11/07/2008:
MD5 (pkgsrc-2008Q3.tar.gz) = 0710cd9aa73651cd00b274fed0399a3d (Note:
this is the correct answer)
MD5 (pkgsrc-2008Q3.tar.gz) = 52925bf5588c9643ee58f4f24ab024b0
MD5 (pkgsrc-2008Q3.tar.gz) = b5af39add036cd54f78ff38384a60370
MD5 (pkgsrc-2008Q3.tar.gz) = f0d5f16bdc59d09f906557149bc9a326
MD5 (pkgsrc-2008Q3.tar.gz) = 0710cd9aa73651cd00b274fed0399a3d
MD5 (pkgsrc-2008Q3.tar.gz) = 0f6c17c863a497165e78729c6c19f042
MD5 (pkgsrc-2008Q3.tar.gz) = 767c33a02ce12ef37b0cfed747586451
MD5 (pkgsrc-2008Q3.tar.gz) = 39ae3194a7306e5cafdd1767bd26d141
MD5 (pkgsrc-2008Q3.tar.gz) = 550be4e993b76ccd8c218c6b59e69f03
MD5 (pkgsrc-2008Q3.tar.gz) = 60beb07311a37b4076d39aa85eadf748
MD5 (pkgsrc-2008Q3.tar.gz) = 0710cd9aa73651cd00b274fed0399a3d
MD5 (pkgsrc-2008Q3.tar.gz) = 0710cd9aa73651cd00b274fed0399a3d
MD5 (pkgsrc-2008Q3.tar.gz) = 680e4b443e0984efdc3f8f3ac6d67b62
MD5 (pkgsrc-2008Q3.tar.gz) = 273d8d3bf711ab59fb55bede9cb077d2
MD5 (pkgsrc-2008Q3.tar.gz) = 25edba177456c0059964ddff9371095d
MD5 (pkgsrc-2008Q3.tar.gz) = b0cc81b7fc8d66e8e65d174b432762d6
MD5 (pkgsrc-2008Q3.tar.gz) = 0710cd9aa73651cd00b274fed0399a3d
MD5 (pkgsrc-2008Q3.tar.gz) = 0710cd9aa73651cd00b274fed0399a3d
MD5 (pkgsrc-2008Q3.tar.gz) = 0951fb446714bfc3842dd57891e7288a
MD5 (pkgsrc-2008Q3.tar.gz) = 7c7b8bb852e567dec180bee4fbb70888
MD5 (pkgsrc-2008Q3.tar.gz) = a426775dee944c97159098e0119efa26
MD5 (pkgsrc-2008Q3.tar.gz) = 0710cd9aa73651cd00b274fed0399a3d
MD5 (pkgsrc-2008Q3.tar.gz) = bc60fe91f8409fda6fc8cbb834b45102
MD5 (pkgsrc-2008Q3.tar.gz) = a2725280cd57be4e388903e933708852
MD5 (pkgsrc-2008Q3.tar.gz) = 9902781605916302983831b48947592b
MD5 (pkgsrc-2008Q3.tar.gz) = 3adf6c0a2616b7f9720b9874e013b8b2
MD5 (pkgsrc-2008Q3.tar.gz) = 86c0e9d9ba56bde4587d01d5606e9a90
MD5 (pkgsrc-2008Q3.tar.gz) = 0710cd9aa73651cd00b274fed0399a3d
MD5 (pkgsrc-2008Q3.tar.gz) = 0710cd9aa73651cd00b274fed0399a3d
MD5 (pkgsrc-2008Q3.tar.gz) = c442a730b262580d7f3ba6ef44622057
MD5 (pkgsrc-2008Q3.tar.gz) = 72d8b997c41de9da6d7fbe0202115ca6
MD5 (pkgsrc-2008Q3.tar.gz) = fc963410678d6b514580762e0feb2126
MD5 (pkgsrc-2008Q3.tar.gz) = 16209fe1355c850392dd46775cd8547e
MD5 (pkgsrc-2008Q3.tar.gz) = 0710cd9aa73651cd00b274fed0399a3d
MD5 (pkgsrc-2008Q3.tar.gz) = 0710cd9aa73651cd00b274fed0399a3d
MD5 (pkgsrc-2008Q3.tar.gz) = 7c11cbe472c9e16fff77b20d9bede6b7
# uname -a
NetBSD netbsd. 5.99.01 NetBSD 5.99.01 (NSLU2_ALL) #0: Sun Mar 8
22:42:32 EDT 2009
hayford@free-2k:/usr/home/hayford/netbsd-20081107/obj-armeb/sys/arch/evbarm/compile/NSLU2_ALL
I have tested kernels back to 5/5/2008 and still see the problem, though
the failure rates are pretty low (1 in 30 to 1 in 50). I tried to build
a kernel from 4/26/2008, but was unable to, for some reason. However, I
was able to substitute the following two directories from 4/26/2008 into
later builds (5/12/2008, 5/16/2008 and 6/1/2008) and get the kernel and
world to build correctly:
src/sys/arch/arm
src/sys/arch/evbarm
These bastardized kernels seem to run correctly - i.e., no failures in
more than 100 trials. I tried to be more selective with the files that
were substituted (i.e., just the arm/xscale directory or just the
evbarm/nslu2 directory), but unfortunately there are enough dependencies
scattered about that the build fails. Likewise, I can't substitute
these directories into anything approaching -current and build
correctly. The following command (thanks, Havard and Wim):
cvs diff -u -D 20080426-UTC -D 20080512-UTC src/sys/arch/arm
src/sys/arch/evbarm >diff0426-0512
produces a large file with lots of changes between the two dates. I
have attached that file for those interested.
I will try again to build kernels from 4/26/2008 through early May to
see if I can pinpoint the problem date a little better and reduce the
number of files to look at.
Other than pinpointing the date, I'm not sure what is the next best
course of action. Any suggestions greatly appreciated.
A PR (kern/41058) has been submitted.
Regards,
Don
? src/sys/arch/arm/xscale/IxNpeMicrocode.dat
Index: src/sys/arch/arm/arm/ast.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm/ast.c,v
retrieving revision 1.13
retrieving revision 1.14
diff -u -r1.13 -r1.14
--- src/sys/arch/arm/arm/ast.c 5 Nov 2007 20:43:01 -0000 1.13
+++ src/sys/arch/arm/arm/ast.c 27 Apr 2008 18:58:43 -0000 1.14
@@ -1,4 +1,4 @@
-/* $NetBSD: ast.c,v 1.13 2007/11/05 20:43:01 ad Exp $ */
+/* $NetBSD: ast.c,v 1.14 2008/04/27 18:58:43 matt Exp $ */
/*
* Copyright (c) 1994,1995 Mark Brinicombe
@@ -41,7 +41,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ast.c,v 1.13 2007/11/05 20:43:01 ad Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ast.c,v 1.14 2008/04/27 18:58:43 matt Exp $");
#include "opt_ddb.h"
@@ -69,16 +69,28 @@
/*
* Prototypes
*/
-void ast __P((struct trapframe *));
+void ast(struct trapframe *);
-int astpending;
-
void
userret(struct lwp *l)
{
+#ifdef CPU_ARM11
+ struct cpu_info * const ci = curcpu();
+#endif
/* Invoke MI userret code */
mi_userret(l);
+
+#ifdef CPU_ARM11
+ /*
+ * This is a hack to work around an unknown cache bug on the ARM11
+ * Before returning we clean the data cache.
+ */
+ if (ci->ci_arm_cputype == CPU_ID_ARM1136JS
+ || ci->ci_arm_cputype == CPU_ID_ARM1136JSR1) {
+ __asm("mcr\tp15, 0, %0, c7, c10, 0" :: "r"(0));
+ }
+#endif
}
@@ -120,10 +132,8 @@
}
/* Allow a forced task switch. */
- if (curcpu()->ci_want_resched)
+ if (l->l_cpu->ci_want_resched)
preempt();
userret(l);
}
-
-/* End of ast.c */
Index: src/sys/arch/arm/arm/bcopyinout.S
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm/bcopyinout.S,v
retrieving revision 1.14
retrieving revision 1.15
diff -u -r1.14 -r1.15
--- src/sys/arch/arm/arm/bcopyinout.S 11 Dec 2005 12:16:41 -0000 1.14
+++ src/sys/arch/arm/arm/bcopyinout.S 27 Apr 2008 18:58:43 -0000 1.15
@@ -1,4 +1,4 @@
-/* $NetBSD: bcopyinout.S,v 1.14 2005/12/11 12:16:41 christos Exp $ */
+/* $NetBSD: bcopyinout.S,v 1.15 2008/04/27 18:58:43 matt Exp $ */
/*
* Copyright (c) 2002 Wasabi Systems, Inc.
@@ -36,26 +36,30 @@
*/
#include "opt_multiprocessor.h"
+#include "opt_cpuoptions.h"
#include "assym.h"
#include <machine/asm.h>
+#include <machine/cpu.h>
#ifdef __XSCALE__
#include "bcopyinout_xscale.S"
#else
-RCSID("$NetBSD: bcopyinout.S,v 1.14 2005/12/11 12:16:41 christos Exp $")
+RCSID("$NetBSD: bcopyinout.S,v 1.15 2008/04/27 18:58:43 matt Exp $")
.text
.align 0
+#if !defined(PROCESS_ID_IS_CURCPU) && !defined(PROCESS_ID_IS_CURLWP)
#ifdef MULTIPROCESSOR
.Lcpu_info:
.word _C_LABEL(cpu_info)
#else
.Lcurpcb:
- .word _C_LABEL(curpcb)
+ .word _C_LABEL(cpu_info_store) + CI_CURPCB
+#endif
#endif
#ifdef __PROG32
@@ -67,7 +71,7 @@
#define RESTORE_REGS ldmfd sp!, {r4-r11, r14}
#endif
-#if defined(__XSCALE__)
+#if defined(__XSCALE__) || defined(_ARCH_ARM_6)
#define HELLOCPP #
#define PREFETCH(rx,o) pld [ rx , HELLOCPP (o) ]
#else
@@ -88,10 +92,12 @@
/* Quick exit if length is zero */
teq r2, #0
moveq r0, #0
- moveq pc, lr
+ RETc(eq)
SAVE_REGS
-#ifdef MULTIPROCESSOR
+#if defined(PROCESS_ID_IS_CURCPU) || defined(PROCESS_ID_IS_CURLWP)
+ GET_CURPCB(r4)
+#elif defined(MULTIPROCESSOR)
/* XXX Probably not appropriate for non-Hydra SMPs */
stmfd sp!, {r0-r2, r14}
bl _C_LABEL(cpu_number)
@@ -288,13 +294,13 @@
str r5, [r4, #PCB_ONFAULT]
RESTORE_REGS
- mov pc, lr
+ RET
.Lcopyfault:
str r5, [r4, #PCB_ONFAULT]
RESTORE_REGS
- mov pc, lr
+ RET
/*
* r0 = kernel space address
@@ -314,7 +320,9 @@
moveq pc, lr
SAVE_REGS
-#ifdef MULTIPROCESSOR
+#if defined(PROCESS_ID_IS_CURCPU) || defined(PROCESS_ID_IS_CURLWP)
+ GET_CURPCB(r4)
+#elif defined(MULTIPROCESSOR)
/* XXX Probably not appropriate for non-Hydra SMPs */
stmfd sp!, {r0-r2, r14}
bl _C_LABEL(cpu_number)
@@ -508,7 +516,7 @@
str r5, [r4, #PCB_ONFAULT]
RESTORE_REGS
- mov pc, lr
+ RET
/*
* r0 = kernel space source address
@@ -527,7 +535,9 @@
moveq pc, lr
SAVE_REGS
-#ifdef MULTIPROCESSOR
+#if defined(PROCESS_ID_IS_CURCPU) || defined(PROCESS_ID_IS_CURLWP)
+ GET_CURPCB(r4)
+#elif defined(MULTIPROCESSOR)
/* XXX Probably not appropriate for non-Hydra SMPs */
stmfd sp!, {r0-r2, r14}
bl _C_LABEL(cpu_number)
@@ -710,7 +720,7 @@
str r5, [r4, #PCB_ONFAULT]
RESTORE_REGS
- mov pc, lr
+ RET
#endif /* !__XSCALE__ */
#ifdef __PROG32
@@ -721,7 +731,9 @@
* else EFAULT if a page fault occurred.
*/
ENTRY(badaddr_read_1)
-#ifdef MULTIPROCESSOR
+#if defined(PROCESS_ID_IS_CURCPU) || defined(PROCESS_ID_IS_CURLWP)
+ GET_CURPCB(r2)
+#elif defined(MULTIPROCESSOR)
/* XXX Probably not appropriate for non-Hydra SMPs */
stmfd sp!, {r0-r1, r14}
bl _C_LABEL(cpu_number)
@@ -746,7 +758,7 @@
strb r3, [r1]
mov r0, #0 /* No fault */
1: str ip, [r2, #PCB_ONFAULT]
- mov pc, lr
+ RET
/*
* int badaddr_read_2(const uint16_t *src, uint16_t *dest)
@@ -755,14 +767,16 @@
* else EFAULT if a page fault occurred.
*/
ENTRY(badaddr_read_2)
-#ifdef MULTIPROCESSOR
+#if defined(PROCESS_ID_IS_CURCPU) || defined(PROCESS_ID_IS_CURLWP)
+ GET_CURPCB(r2)
+#elif defined(MULTIPROCESSOR)
/* XXX Probably not appropriate for non-Hydra SMPs */
- stmfd sp!, {r0-r1, r14}
+ stmfd sp!, {r0-r1, r3, r14}
bl _C_LABEL(cpu_number)
ldr r2, .Lcpu_info
ldr r2, [r2, r0, lsl #2]
ldr r2, [r2, #CI_CURPCB]
- ldmfd sp!, {r0-r1, r14}
+ ldmfd sp!, {r0-r1, r3, r14}
#else
ldr r2, .Lcurpcb
ldr r2, [r2]
@@ -780,7 +794,7 @@
strh r3, [r1]
mov r0, #0 /* No fault */
1: str ip, [r2, #PCB_ONFAULT]
- mov pc, lr
+ RET
/*
* int badaddr_read_4(const uint32_t *src, uint32_t *dest)
@@ -789,14 +803,16 @@
* else EFAULT if a page fault occurred.
*/
ENTRY(badaddr_read_4)
-#ifdef MULTIPROCESSOR
+#if defined(PROCESS_ID_IS_CURCPU) || defined(PROCESS_ID_IS_CURLWP)
+ GET_CURPCB(r2)
+#elif defined(MULTIPROCESSOR)
/* XXX Probably not appropriate for non-Hydra SMPs */
- stmfd sp!, {r0-r1, r14}
+ stmfd sp!, {r0-r1, r3, r14}
bl _C_LABEL(cpu_number)
ldr r2, .Lcpu_info
ldr r2, [r2, r0, lsl #2]
ldr r2, [r2, #CI_CURPCB]
- ldmfd sp!, {r0-r1, r14}
+ ldmfd sp!, {r0-r1, r3, r14}
#else
ldr r2, .Lcurpcb
ldr r2, [r2]
@@ -814,5 +830,5 @@
str r3, [r1]
mov r0, #0 /* No fault */
1: str ip, [r2, #PCB_ONFAULT]
- mov pc, lr
+ RET
#endif /* __PROG32 */
Index: src/sys/arch/arm/arm/bcopyinout_xscale.S
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm/bcopyinout_xscale.S,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -r1.4 -r1.5
--- src/sys/arch/arm/arm/bcopyinout_xscale.S 6 Dec 2005 08:05:31 -0000
1.4
+++ src/sys/arch/arm/arm/bcopyinout_xscale.S 27 Apr 2008 18:58:43 -0000
1.5
@@ -1,4 +1,4 @@
-/* $NetBSD: bcopyinout_xscale.S,v 1.4 2005/12/06 08:05:31 ross Exp $
*/
+/* $NetBSD: bcopyinout_xscale.S,v 1.5 2008/04/27 18:58:43 matt Exp $
*/
/*
* Copyright 2003 Wasabi Systems, Inc.
@@ -35,7 +35,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
-RCSID("$NetBSD: bcopyinout_xscale.S,v 1.4 2005/12/06 08:05:31 ross Exp $")
+RCSID("$NetBSD: bcopyinout_xscale.S,v 1.5 2008/04/27 18:58:43 matt Exp $")
.text
.align 0
@@ -45,7 +45,7 @@
.word _C_LABEL(cpu_info)
#else
.Lcurpcb:
- .word _C_LABEL(curpcb)
+ .word _C_LABEL(cpu_info_store) + CI_CURPCB
#endif
/*
Index: src/sys/arch/arm/arm/copystr.S
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm/copystr.S,v
retrieving revision 1.8
retrieving revision 1.9
diff -u -r1.8 -r1.9
--- src/sys/arch/arm/arm/copystr.S 13 Oct 2002 14:54:48 -0000 1.8
+++ src/sys/arch/arm/arm/copystr.S 27 Apr 2008 18:58:43 -0000 1.9
@@ -1,4 +1,4 @@
-/* $NetBSD: copystr.S,v 1.8 2002/10/13 14:54:48 bjh21 Exp $ */
+/* $NetBSD: copystr.S,v 1.9 2008/04/27 18:58:43 matt Exp $ */
/*
* Copyright (c) 1995 Mark Brinicombe.
@@ -39,22 +39,26 @@
*/
#include "opt_multiprocessor.h"
+#include "opt_cpuoptions.h"
#include "assym.h"
#include <machine/asm.h>
+#include <machine/cpu.h>
-RCSID("$NetBSD: copystr.S,v 1.8 2002/10/13 14:54:48 bjh21 Exp $")
+RCSID("$NetBSD: copystr.S,v 1.9 2008/04/27 18:58:43 matt Exp $")
#include <sys/errno.h>
.text
.align 0
+#if !defined(PROCESS_ID_IS_CURCPU) && !defined(PROCESS_ID_IS_CURLWP)
#ifdef MULTIPROCESSOR
.Lcpu_info:
.word _C_LABEL(cpu_info)
#else
.Lcurpcb:
- .word _C_LABEL(curpcb)
+ .word _C_LABEL(cpu_info_store) + CI_CURPCB
+#endif
#endif
/*
@@ -87,7 +91,7 @@
strne r5, [r3]
ldmfd sp!, {r4-r5} /* stack is 8 byte aligned */
- mov pc, lr
+ RET
#ifdef __PROG32
#define SAVE_REGS stmfd sp!, {r4-r6}
@@ -114,7 +118,9 @@
moveq r0, #ENAMETOOLONG
beq 2f
-#ifdef MULTIPROCESSOR
+#if defined(PROCESS_ID_IS_CURCPU) || defined(PROCESS_ID_IS_CURLWP)
+ GET_CURPCB(r4)
+#elif defined(MULTIPROCESSOR)
/* XXX Probably not appropriate for non-Hydra SMPs */
stmfd sp!, {r0-r3, r14}
bl _C_LABEL(cpu_number)
@@ -153,7 +159,7 @@
strne r6, [r3]
RESTORE_REGS
- mov pc, lr
+ RET
/*
* r0 - kernel space address
@@ -171,7 +177,9 @@
moveq r0, #ENAMETOOLONG
beq 2f
-#ifdef MULTIPROCESSOR
+#if defined(PROCESS_ID_IS_CURCPU) || defined(PROCESS_ID_IS_CURLWP)
+ GET_CURPCB(r4)
+#elif defined(MULTIPROCESSOR)
/* XXX Probably not appropriate for non-Hydra SMPs */
stmfd sp!, {r0-r3, r14}
bl _C_LABEL(cpu_number)
@@ -210,14 +218,14 @@
strne r6, [r3]
RESTORE_REGS
- mov pc, lr
+ RET
/* A fault occurred during the copy */
.Lcopystrfault:
mov r1, #0x00000000
str r1, [r4, #PCB_ONFAULT]
RESTORE_REGS
- mov pc, lr
+ RET
#ifdef DIAGNOSTIC
.Lcopystrpcbfault:
Index: src/sys/arch/arm/arm/cpufunc.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm/cpufunc.c,v
retrieving revision 1.83
retrieving revision 1.84
diff -u -r1.83 -r1.84
--- src/sys/arch/arm/arm/cpufunc.c 15 Mar 2008 10:35:30 -0000 1.83
+++ src/sys/arch/arm/arm/cpufunc.c 27 Apr 2008 18:58:43 -0000 1.84
@@ -1,10 +1,11 @@
-/* $NetBSD: cpufunc.c,v 1.83 2008/03/15 10:35:30 rearnsha Exp $ */
+/* $NetBSD: cpufunc.c,v 1.84 2008/04/27 18:58:43 matt Exp $ */
/*
* arm7tdmi support code Copyright (c) 2001 John Fremlin
* arm8 support code Copyright (c) 1997 ARM Limited
* arm8 support code Copyright (c) 1997 Causality Limited
* arm9 support code Copyright (C) 2001 ARM Ltd
+ * arm11 support code Copyright (c) 2007 Microsoft
* Copyright (c) 1997 Mark Brinicombe.
* Copyright (c) 1997 Causality Limited
* All rights reserved.
@@ -46,7 +47,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.83 2008/03/15 10:35:30 rearnsha Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.84 2008/04/27 18:58:43 matt Exp $");
#include "opt_compat_netbsd.h"
#include "opt_cpuoptions.h"
@@ -96,6 +97,10 @@
int arm_pdcache_size; /* and unified */
int arm_pdcache_line_size;
int arm_pdcache_ways;
+#if (ARM_MMU_V6) != 0
+int arm_cache_prefer_mask;
+#endif
+
int arm_pcache_type;
int arm_pcache_unified;
@@ -697,16 +702,16 @@
/* Cache operations */
- .cf_icache_sync_all = armv5_icache_sync_all,
- .cf_icache_sync_range = armv5_icache_sync_range,
+ .cf_icache_sync_all = armv6_icache_sync_all,
+ .cf_icache_sync_range = armv6_icache_sync_range,
- .cf_dcache_wbinv_all = armv5_dcache_wbinv_all,
- .cf_dcache_wbinv_range = armv5_dcache_wbinv_range,
-/*XXX*/ .cf_dcache_inv_range = armv5_dcache_wbinv_range,
- .cf_dcache_wb_range = armv5_dcache_wb_range,
+ .cf_dcache_wbinv_all = armv6_dcache_wbinv_all,
+ .cf_dcache_wbinv_range = armv6_dcache_wbinv_range,
+ .cf_dcache_inv_range = armv6_dcache_inv_range,
+ .cf_dcache_wb_range = armv6_dcache_wb_range,
- .cf_idcache_wbinv_all = armv5_idcache_wbinv_all,
- .cf_idcache_wbinv_range = armv5_idcache_wbinv_range,
+ .cf_idcache_wbinv_all = armv6_idcache_wbinv_all,
+ .cf_idcache_wbinv_range = armv6_idcache_wbinv_range,
/* Other functions */
@@ -715,7 +720,7 @@
.cf_flush_brnchtgt_C = cpufunc_nullop,
.cf_flush_brnchtgt_E = (void *)cpufunc_nullop,
- .cf_sleep = (void *)cpufunc_nullop,
+ .cf_sleep = arm11_sleep,
/* Soft functions */
@@ -729,6 +734,64 @@
};
#endif /* CPU_ARM11 */
+#ifdef CPU_ARM1136
+struct cpu_functions arm1136_cpufuncs = {
+ /* CPU functions */
+
+ .cf_id = cpufunc_id,
+ .cf_cpwait = cpufunc_nullop,
+
+ /* MMU functions */
+
+ .cf_control = cpufunc_control,
+ .cf_domains = cpufunc_domains,
+ .cf_setttb = arm1136_setttb,
+ .cf_faultstatus = cpufunc_faultstatus,
+ .cf_faultaddress = cpufunc_faultaddress,
+
+ /* TLB functions */
+
+ .cf_tlb_flushID = arm11_tlb_flushID,
+ .cf_tlb_flushID_SE = arm11_tlb_flushID_SE,
+ .cf_tlb_flushI = arm11_tlb_flushI,
+ .cf_tlb_flushI_SE = arm11_tlb_flushI_SE,
+ .cf_tlb_flushD = arm11_tlb_flushD,
+ .cf_tlb_flushD_SE = arm11_tlb_flushD_SE,
+
+ /* Cache operations */
+
+ .cf_icache_sync_all = arm1136_icache_sync_all, /* 411920 */
+ .cf_icache_sync_range = arm1136_icache_sync_range, /* 371025 */
+
+ .cf_dcache_wbinv_all = arm1136_dcache_wbinv_all, /* 411920 */
+ .cf_dcache_wbinv_range = armv6_dcache_wbinv_range,
+ .cf_dcache_inv_range = armv6_dcache_inv_range,
+ .cf_dcache_wb_range = armv6_dcache_wb_range,
+
+ .cf_idcache_wbinv_all = arm1136_idcache_wbinv_all, /* 411920 */
+ .cf_idcache_wbinv_range = arm1136_idcache_wbinv_range, /* 371025 */
+
+ /* Other functions */
+
+ .cf_flush_prefetchbuf = arm1136_flush_prefetchbuf,
+ .cf_drain_writebuf = arm11_drain_writebuf,
+ .cf_flush_brnchtgt_C = cpufunc_nullop,
+ .cf_flush_brnchtgt_E = (void *)cpufunc_nullop,
+
+ .cf_sleep = arm11_sleep,
+
+ /* Soft functions */
+
+ .cf_dataabt_fixup = cpufunc_null_fixup,
+ .cf_prefetchabt_fixup = cpufunc_null_fixup,
+
+ .cf_context_switch = arm11_context_switch,
+
+ .cf_setup = arm1136_setup
+
+};
+#endif /* CPU_ARM1136 */
+
#ifdef CPU_SA110
struct cpu_functions sa110_cpufuncs = {
/* CPU functions */
@@ -1019,6 +1082,13 @@
} else {
arm_picache_ways = multiplier <<
(CPU_CT_xSIZE_ASSOC(isize) - 1);
+#if (ARM_MMU_V6) > 0
+ if (CPU_CT_xSIZE_P & isize)
+ arm_cache_prefer_mask |=
+ __BIT(9 + CPU_CT_xSIZE_SIZE(isize)
+ - CPU_CT_xSIZE_ASSOC(isize))
+ - PAGE_SIZE;
+#endif
}
arm_picache_size = multiplier << (CPU_CT_xSIZE_SIZE(isize) + 8);
}
@@ -1034,6 +1104,12 @@
} else {
arm_pdcache_ways = multiplier <<
(CPU_CT_xSIZE_ASSOC(dsize) - 1);
+#if (ARM_MMU_V6) > 0
+ if (CPU_CT_xSIZE_P & dsize)
+ arm_cache_prefer_mask |=
+ __BIT(9 + CPU_CT_xSIZE_SIZE(dsize)
+ - CPU_CT_xSIZE_ASSOC(dsize)) - PAGE_SIZE;
+#endif
}
arm_pdcache_size = multiplier << (CPU_CT_xSIZE_SIZE(dsize) + 8);
@@ -1246,19 +1322,25 @@
return 0;
}
#endif /* CPU_ARM10 */
-#ifdef CPU_ARM11
+#if defined(CPU_ARM11)
if (cputype == CPU_ID_ARM1136JS ||
- cputype == CPU_ID_ARM1136JSR1) {
+ cputype == CPU_ID_ARM1136JSR1 ||
+ cputype == CPU_ID_ARM1176JS) {
cpufuncs = arm11_cpufuncs;
+#if defined(CPU_ARM1136)
+ if (cputype != CPU_ID_ARM1176JS) {
+ cpufuncs = arm1136_cpufuncs;
+ if (cputype == CPU_ID_ARM1136JS)
+ cpufuncs.cf_sleep = arm1136_sleep_rev0;
+ }
+#endif
cpu_reset_needs_v4_MMU_disable = 1; /* V4 or higher */
+ cpu_do_powersave = 1; /* Enable powersave */
get_cachetype_cp15();
- armv5_dcache_sets_inc = 1U << arm_dcache_l2_linesize;
- armv5_dcache_sets_max =
- (1U << (arm_dcache_l2_linesize + arm_dcache_l2_nsets)) -
- armv5_dcache_sets_inc;
- armv5_dcache_index_inc = 1U << (32 - arm_dcache_l2_assoc);
- armv5_dcache_index_max = 0U - armv5_dcache_index_inc;
pmap_pte_init_generic();
+ if (arm_cache_prefer_mask)
+ uvmexp.ncolors = (arm_cache_prefer_mask >> PGSHIFT) + 1;
+
return 0;
}
#endif /* CPU_ARM11 */
@@ -1818,7 +1900,7 @@
defined(CPU_SA110) || defined(CPU_SA1100) || defined(CPU_SA1110) || \
defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \
defined(__CPU_XSCALE_PXA2XX) || defined(CPU_XSCALE_IXP425) || \
- defined(CPU_ARM10) || defined(CPU_ARM11)
+ defined(CPU_ARM10) || defined(CPU_ARM11) || defined(CPU_ARM1136)
#define IGN 0
#define OR 1
@@ -2198,12 +2280,21 @@
cpuctrl |= CPU_CONTROL_BEND_ENABLE;
#endif
+ if (vector_page == ARM_VECTORS_HIGH)
+ cpuctrl |= CPU_CONTROL_VECRELOC;
+
+ if (vector_page == ARM_VECTORS_HIGH)
+ cpuctrl |= CPU_CONTROL_VECRELOC;
+
/* Clear out the cache */
cpu_idcache_wbinv_all();
/* Now really make sure they are clean. */
__asm volatile ("mcr\tp15, 0, r0, c7, c7, 0" : : );
+ /* Allow detection code to find the VFP if it's fitted. */
+ __asm volatile ("mcr\tp15, 0, %0, c1, c0, 2" : : "r" (0x0fffffff));
+
/* Set the control register */
curcpu()->ci_ctrl = cpuctrl;
cpu_control(0xffffffff, cpuctrl);
@@ -2213,7 +2304,7 @@
}
#endif /* CPU_ARM9E || CPU_ARM10 */
-#ifdef CPU_ARM11
+#if defined(CPU_ARM11)
struct cpu_option arm11_options[] = {
{ "cpu.cache", BIC, OR, (CPU_CONTROL_IC_ENABLE |
CPU_CONTROL_DC_ENABLE) },
{ "cpu.nocache", OR, BIC, (CPU_CONTROL_IC_ENABLE |
CPU_CONTROL_DC_ENABLE) },
@@ -2229,6 +2320,14 @@
{
int cpuctrl, cpuctrlmask;
+#if defined(PROCESS_ID_IS_CURCPU)
+ /* set curcpu() */
+ __asm("mcr\tp15, 0, %0, c13, c0, 4" : : "r"(&cpu_info_store));
+#elif defined(PROCESS_ID_IS_CURLWP)
+ /* set curlwp() */
+ __asm("mcr\tp15, 0, %0, c13, c0, 4" : : "r"(&lwp0));
+#endif
+
cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABLE
| CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
/* | CPU_CONTROL_BPRD_ENABLE */;
@@ -2251,15 +2350,15 @@
if (vector_page == ARM_VECTORS_HIGH)
cpuctrl |= CPU_CONTROL_VECRELOC;
+ if (vector_page == ARM_VECTORS_HIGH)
+ cpuctrl |= CPU_CONTROL_VECRELOC;
+
/* Clear out the cache */
cpu_idcache_wbinv_all();
/* Now really make sure they are clean. */
__asm volatile ("mcr\tp15, 0, r0, c7, c7, 0" : : );
- /* Allow detection code to find the VFP if it's fitted. */
- __asm volatile ("mcr\tp15, 0, %0, c1, c0, 2" : : "r" (0x0fffffff));
-
/* Set the control register */
curcpu()->ci_ctrl = cpuctrl;
cpu_control(0xffffffff, cpuctrl);
@@ -2269,6 +2368,71 @@
}
#endif /* CPU_ARM11 */
+#if defined(CPU_ARM1136)
+void
+arm1136_setup(char *args)
+{
+ int cpuctrl, cpuctrl_wax;
+ uint32_t sbz=0;
+
+#if defined(PROCESS_ID_IS_CURCPU)
+ /* set curcpu() */
+ __asm("mcr\tp15, 0, %0, c13, c0, 4" : : "r"(&cpu_info_store));
+#elif defined(PROCESS_ID_IS_CURLWP)
+ /* set curlwp() */
+ __asm("mcr\tp15, 0, %0, c13, c0, 4" : : "r"(&lwp0));
+#endif
+
+ cpuctrl =
+ CPU_CONTROL_MMU_ENABLE |
+ CPU_CONTROL_DC_ENABLE |
+ CPU_CONTROL_WBUF_ENABLE |
+ CPU_CONTROL_32BP_ENABLE |
+ CPU_CONTROL_32BD_ENABLE |
+ CPU_CONTROL_LABT_ENABLE |
+ CPU_CONTROL_SYST_ENABLE |
+ CPU_CONTROL_IC_ENABLE;
+
+ /*
+ * "write as existing" bits
+ * inverse of this is mask
+ */
+ cpuctrl_wax =
+ (3 << 30) |
+ (1 << 29) |
+ (1 << 28) |
+ (3 << 26) |
+ (3 << 19) |
+ (1 << 17);
+
+#ifndef ARM32_DISABLE_ALIGNMENT_FAULTS
+ cpuctrl |= CPU_CONTROL_AFLT_ENABLE;
+#endif
+
+ cpuctrl = parse_cpu_options(args, arm11_options, cpuctrl);
+
+#ifdef __ARMEB__
+ cpuctrl |= CPU_CONTROL_BEND_ENABLE;
+#endif
+
+ if (vector_page == ARM_VECTORS_HIGH)
+ cpuctrl |= CPU_CONTROL_VECRELOC;
+
+ /* Clear out the cache */
+ cpu_idcache_wbinv_all();
+
+ /* Now really make sure they are clean. */
+ __asm volatile ("mcr\tp15, 0, %0, c7, c7, 0" : : "r"(sbz));
+
+ /* Set the control register */
+ curcpu()->ci_ctrl = cpuctrl;
+ cpu_control(~cpuctrl_wax, cpuctrl);
+
+ /* And again. */
+ cpu_idcache_wbinv_all();
+}
+#endif /* CPU_ARM1136 */
+
#ifdef CPU_SA110
struct cpu_option sa110_options[] = {
#ifdef COMPAT_12
@@ -2314,6 +2478,12 @@
cpuctrl |= CPU_CONTROL_BEND_ENABLE;
#endif
+ if (vector_page == ARM_VECTORS_HIGH)
+ cpuctrl |= CPU_CONTROL_VECRELOC;
+
+ if (vector_page == ARM_VECTORS_HIGH)
+ cpuctrl |= CPU_CONTROL_VECRELOC;
+
/* Clear out the cache */
cpu_idcache_wbinv_all();
Index: src/sys/arch/arm/arm/cpufunc_asm.S
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm/cpufunc_asm.S,v
retrieving revision 1.13
retrieving revision 1.14
diff -u -r1.13 -r1.14
--- src/sys/arch/arm/arm/cpufunc_asm.S 11 Dec 2005 12:16:41 -0000 1.13
+++ src/sys/arch/arm/arm/cpufunc_asm.S 27 Apr 2008 18:58:43 -0000 1.14
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc_asm.S,v 1.13 2005/12/11 12:16:41 christos Exp $
*/
+/* $NetBSD: cpufunc_asm.S,v 1.14 2008/04/27 18:58:43 matt Exp $ */
/*
* Copyright (c) 1997,1998 Mark Brinicombe.
@@ -41,14 +41,14 @@
* Created : 30/01/97
*/
-#include <machine/cpu.h>
#include <machine/asm.h>
+#include <machine/cpu.h>
.text
.align 0
ENTRY(cpufunc_nullop)
- mov pc, lr
+ RET
/*
* Generic functions to read the internal coprocessor registers
@@ -62,23 +62,23 @@
ENTRY(cpufunc_id)
mrc p15, 0, r0, c0, c0, 0
- mov pc, lr
+ RET
ENTRY(cpu_get_control)
mrc p15, 0, r0, c1, c0, 0
- mov pc, lr
+ RET
ENTRY(cpu_read_cache_config)
mrc p15, 0, r0, c0, c0, 1
- mov pc, lr
+ RET
ENTRY(cpufunc_faultstatus)
mrc p15, 0, r0, c5, c0, 0
- mov pc, lr
+ RET
ENTRY(cpufunc_faultaddress)
mrc p15, 0, r0, c6, c0, 0
- mov pc, lr
+ RET
/*
@@ -95,12 +95,12 @@
#if 0 /* See below. */
ENTRY(cpufunc_control)
mcr p15, 0, r0, c1, c0, 0
- mov pc, lr
+ RET
#endif
ENTRY(cpufunc_domains)
mcr p15, 0, r0, c3, c0, 0
- mov pc, lr
+ RET
/*
* Generic functions to read/modify/write the internal coprocessor registers
@@ -120,7 +120,7 @@
teq r2, r3 /* Only write if there is a change */
mcrne p15, 0, r2, c1, c0, 0 /* Write new control register */
mov r0, r3 /* Return old value */
- mov pc, lr
+ RET
/*
* other potentially useful software functions are:
Index: src/sys/arch/arm/arm/cpufunc_asm_arm11.S
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm/cpufunc_asm_arm11.S,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -r1.4 -r1.5
--- src/sys/arch/arm/arm/cpufunc_asm_arm11.S 17 Oct 2007 19:53:29 -0000
1.4
+++ src/sys/arch/arm/arm/cpufunc_asm_arm11.S 27 Apr 2008 18:58:43 -0000
1.5
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc_asm_arm11.S,v 1.4 2007/10/17 19:53:29 garbled Exp $
*/
+/* $NetBSD: cpufunc_asm_arm11.S,v 1.5 2008/04/27 18:58:43 matt Exp $
*/
/*
* Copyright (c) 2002, 2005 ARM Limited
@@ -34,6 +34,7 @@
* architecture or physically tagged cache.
*/
+#include "assym.h"
#include <machine/cpu.h>
#include <machine/asm.h>
@@ -44,9 +45,11 @@
* addresses that are about to change.
*/
ENTRY(arm11_setttb)
+#ifdef PMAP_CACHE_VIVT
stmfd sp!, {r0, lr}
- bl _C_LABEL(armv5_idcache_wbinv_all)
+ bl _C_LABEL(armv6_idcache_wbinv_all)
ldmfd sp!, {r0, lr}
+#endif
mcr p15, 0, r0, c2, c0, 0 /* load new TTB */
@@ -96,26 +99,31 @@
ENTRY(arm11_tlb_flushID)
mcr p15, 0, r0, c8, c7, 0 /* flush I+D tlb */
mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
- mov pc, lr
+ RET
ENTRY(arm11_tlb_flushI)
mcr p15, 0, r0, c8, c5, 0 /* flush I tlb */
mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
- mov pc, lr
+ RET
ENTRY(arm11_tlb_flushD)
mcr p15, 0, r0, c8, c6, 0 /* flush D tlb */
mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
- mov pc, lr
+ RET
ENTRY(arm11_tlb_flushD_SE)
mcr p15, 0, r0, c8, c6, 1 /* flush D tlb single entry */
mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
- mov pc, lr
+ RET
/*
* Other functions
*/
ENTRY(arm11_drain_writebuf)
mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
- mov pc, lr
+ RET
+
+ENTRY_NP(arm11_sleep)
+ mov r0, #0
+ mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */
+ RET
Index: src/sys/arch/arm/arm/cpufunc_asm_arm8.S
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm/cpufunc_asm_arm8.S,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -r1.4 -r1.5
--- src/sys/arch/arm/arm/cpufunc_asm_arm8.S 17 Oct 2007 19:53:29 -0000
1.4
+++ src/sys/arch/arm/arm/cpufunc_asm_arm8.S 27 Apr 2008 18:58:43 -0000
1.5
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc_asm_arm8.S,v 1.4 2007/10/17 19:53:29 garbled Exp $
*/
+/* $NetBSD: cpufunc_asm_arm8.S,v 1.5 2008/04/27 18:58:43 matt Exp $
*/
/*
* Copyright (c) 1997 ARM Limited
Index: src/sys/arch/arm/arm/disassem.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm/disassem.c,v
retrieving revision 1.17
retrieving revision 1.18
diff -u -r1.17 -r1.18
--- src/sys/arch/arm/arm/disassem.c 11 Dec 2005 12:16:41 -0000 1.17
+++ src/sys/arch/arm/arm/disassem.c 27 Apr 2008 18:58:43 -0000 1.18
@@ -1,4 +1,4 @@
-/* $NetBSD: disassem.c,v 1.17 2005/12/11 12:16:41 christos Exp $ */
+/* $NetBSD: disassem.c,v 1.18 2008/04/27 18:58:43 matt Exp $ */
/*
* Copyright (c) 1996 Mark Brinicombe.
@@ -49,7 +49,7 @@
#include <sys/param.h>
-__KERNEL_RCSID(0, "$NetBSD: disassem.c,v 1.17 2005/12/11 12:16:41 christos Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: disassem.c,v 1.18 2008/04/27 18:58:43 matt Exp $");
#include <sys/systm.h>
#include <arch/arm/arm/disassem.h>
@@ -211,6 +211,9 @@
{ 0x0f100010, 0x0e100010, "mrc", "#z" },
{ 0xff000010, 0xfe000000, "cdp2", "#y" },
{ 0x0f000010, 0x0e000000, "cdp", "#y" },
+ { 0x0f100010, 0x0e000010, "mcr", "#z" },
+ { 0x0ff00000, 0x0c400000, "mcrr", "#&" },
+ { 0x0ff00000, 0x0c500000, "mrrc", "#&" },
{ 0xfe100090, 0xfc100000, "ldc2", "L#v" },
{ 0x0e100090, 0x0c100000, "ldc", "L#v" },
{ 0xfe100090, 0xfc000000, "stc2", "L#v" },
@@ -501,6 +504,12 @@
/* if (((insn >> 5) & 0x07) != 0)
di->di_printf(", %d", (insn >> 5) & 0x07);*/
break;
+ /* & - co-processor register range transfer registers */
+ case '&':
+ di->di_printf("%d, r%d, r%d, c%d",
+ (insn >> 4) & 0x0f, (insn >> 12) & 0x0f,
+ (insn >> 16) & 0x0f, insn & 0x0f);
+ break;
default:
di->di_printf("[%c - unknown]", *f_ptr);
break;
Index: src/sys/arch/arm/arm/fiq_subr.S
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm/fiq_subr.S,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -r1.3 -r1.4
--- src/sys/arch/arm/arm/fiq_subr.S 12 Apr 2002 18:50:31 -0000 1.3
+++ src/sys/arch/arm/arm/fiq_subr.S 27 Apr 2008 18:58:43 -0000 1.4
@@ -1,4 +1,4 @@
-/* $NetBSD: fiq_subr.S,v 1.3 2002/04/12 18:50:31 thorpej Exp $ */
+/* $NetBSD: fiq_subr.S,v 1.4 2008/04/27 18:58:43 matt Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -87,7 +87,7 @@
stmia r0, {r8-r13}
BACK_TO_SVC_MODE
- mov pc, lr
+ RET
/*
* fiq_setregs:
@@ -101,7 +101,7 @@
ldmia r0, {r8-r13}
BACK_TO_SVC_MODE
- mov pc, lr
+ RET
/*
* fiq_nullhandler:
Index: src/sys/arch/arm/arm/idle_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm/idle_machdep.c,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -r1.3 -r1.4
--- src/sys/arch/arm/arm/idle_machdep.c 6 Jan 2008 01:37:53 -0000 1.3
+++ src/sys/arch/arm/arm/idle_machdep.c 28 Apr 2008 20:23:13 -0000 1.4
@@ -1,4 +1,4 @@
-/* $NetBSD: idle_machdep.c,v 1.3 2008/01/06 01:37:53 matt Exp $ */
+/* $NetBSD: idle_machdep.c,v 1.4 2008/04/28 20:23:13 martin Exp $ */
/*-
* Copyright (c) 2007 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -38,7 +31,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: idle_machdep.c,v 1.3 2008/01/06 01:37:53 matt Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: idle_machdep.c,v 1.4 2008/04/28 20:23:13 martin
Exp $");
#include <sys/param.h>
#include <sys/cpu.h>
Index: src/sys/arch/arm/arm/linux_syscall.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm/linux_syscall.c,v
retrieving revision 1.20
retrieving revision 1.21
diff -u -r1.20 -r1.21
--- src/sys/arch/arm/arm/linux_syscall.c 6 Feb 2008 22:12:39 -0000
1.20
+++ src/sys/arch/arm/arm/linux_syscall.c 28 Apr 2008 20:23:13 -0000
1.21
@@ -1,4 +1,4 @@
-/* $NetBSD: linux_syscall.c,v 1.20 2008/02/06 22:12:39 dsl Exp $ */
+/* $NetBSD: linux_syscall.c,v 1.21 2008/04/28 20:23:13 martin Exp $
*/
/*-
* Copyright (c) 2000, 2003 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -76,7 +69,7 @@
#include <sys/param.h>
-__KERNEL_RCSID(0, "$NetBSD: linux_syscall.c,v 1.20 2008/02/06 22:12:39 dsl Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: linux_syscall.c,v 1.21 2008/04/28 20:23:13 martin
Exp $");
#include <sys/device.h>
#include <sys/errno.h>
Index: src/sys/arch/arm/arm/linux_trap.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm/linux_trap.c,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -r1.6 -r1.7
--- src/sys/arch/arm/arm/linux_trap.c 18 Feb 2007 07:25:35 -0000 1.6
+++ src/sys/arch/arm/arm/linux_trap.c 28 Apr 2008 20:23:13 -0000 1.7
@@ -1,4 +1,4 @@
-/* $NetBSD: linux_trap.c,v 1.6 2007/02/18 07:25:35 matt Exp $ */
+/* $NetBSD: linux_trap.c,v 1.7 2008/04/28 20:23:13 martin Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -37,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: linux_trap.c,v 1.6 2007/02/18 07:25:35 matt Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: linux_trap.c,v 1.7 2008/04/28 20:23:13 martin Exp
$");
#include <sys/param.h>
#include <sys/systm.h>
Index: src/sys/arch/arm/arm/lock_cas.S
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm/lock_cas.S,v
retrieving revision 1.3
retrieving revision 1.5
diff -u -r1.3 -r1.5
--- src/sys/arch/arm/arm/lock_cas.S 10 Feb 2008 13:32:14 -0000 1.3
+++ src/sys/arch/arm/arm/lock_cas.S 28 Apr 2008 20:23:13 -0000 1.5
@@ -1,4 +1,4 @@
-/* $NetBSD: lock_cas.S,v 1.3 2008/02/10 13:32:14 ad Exp $ */
+/* $NetBSD: lock_cas.S,v 1.5 2008/04/28 20:23:13 martin Exp $ */
/*-
* Copyright (c) 2007 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -66,6 +59,18 @@
* r2 New value.
*/
ENTRY_NP(_lock_cas)
+#ifdef _ARCH_ARM_6
+ .globl _C_LABEL(_lock_cas_end)
+ mov ip, r0
+1: ldrex r0, [ip] /* eventual return value */
+ cmp r1, r0
+ RETc(ne)
+ strex r3, r2, [ip]
+ cmp r3, #0
+ bne 1b
+ RET
+ END(_lock_cas)
+#else
ldr r3, [r0]
teq r3, r1
bne 1f
@@ -105,6 +110,7 @@
#endif /* ARM_LOCK_CAS_DEBUG */
mov r0, r3 /* return actual value */
RET
+#endif
STRONG_ALIAS(_atomic_cas_ulong,_lock_cas)
STRONG_ALIAS(atomic_cas_ulong,_lock_cas)
Index: src/sys/arch/arm/arm/syscall.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm/syscall.c,v
retrieving revision 1.40
retrieving revision 1.42
diff -u -r1.40 -r1.42
--- src/sys/arch/arm/arm/syscall.c 24 Apr 2008 11:51:18 -0000 1.40
+++ src/sys/arch/arm/arm/syscall.c 28 Apr 2008 20:23:13 -0000 1.42
@@ -1,4 +1,4 @@
-/* $NetBSD: syscall.c,v 1.40 2008/04/24 11:51:18 ad Exp $ */
+/* $NetBSD: syscall.c,v 1.42 2008/04/28 20:23:13 martin Exp $ */
/*-
* Copyright (c) 2000, 2003 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -78,7 +71,7 @@
#include <sys/param.h>
-__KERNEL_RCSID(0, "$NetBSD: syscall.c,v 1.40 2008/04/24 11:51:18 ad Exp $");
+__KERNEL_RCSID(0, "$NetBSD: syscall.c,v 1.42 2008/04/28 20:23:13 martin Exp
$");
#include <sys/device.h>
#include <sys/errno.h>
@@ -152,7 +145,10 @@
if (frame->tf_spsr & PSR_T_bit) {
/* Map a Thumb SWI onto the bottom 256 ARM SWIs. */
insn = fusword((void *)(frame->tf_pc - THUMB_INSN_SIZE));
- insn = (insn & 0x00ff) | 0xef000000;
+ if (insn & 0x00ff)
+ insn = (insn & 0x00ff) | 0xef000000;
+ else
+ insn = frame->tf_ip | 0xef000000;
}
else
#endif
Index: src/sys/arch/arm/arm/undefined.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm/undefined.c,v
retrieving revision 1.32
retrieving revision 1.33
diff -u -r1.32 -r1.33
--- src/sys/arch/arm/arm/undefined.c 5 Nov 2007 20:43:02 -0000 1.32
+++ src/sys/arch/arm/arm/undefined.c 27 Apr 2008 18:58:43 -0000 1.33
@@ -1,4 +1,4 @@
-/* $NetBSD: undefined.c,v 1.32 2007/11/05 20:43:02 ad Exp $ */
+/* $NetBSD: undefined.c,v 1.33 2008/04/27 18:58:43 matt Exp $ */
/*
* Copyright (c) 2001 Ben Harris.
@@ -54,7 +54,7 @@
#include <sys/kgdb.h>
#endif
-__KERNEL_RCSID(0, "$NetBSD: undefined.c,v 1.32 2007/11/05 20:43:02 ad Exp $");
+__KERNEL_RCSID(0, "$NetBSD: undefined.c,v 1.33 2008/04/27 18:58:43 matt Exp
$");
#include <sys/malloc.h>
#include <sys/queue.h>
@@ -128,7 +128,7 @@
gdb_trapper(u_int addr, u_int insn, struct trapframe *frame, int code)
{
struct lwp *l;
- l = (curlwp == NULL) ? &lwp0 : curlwp;
+ l = curlwp;
#ifdef THUMB_CODE
if (frame->tf_spsr & PSR_T_bit) {
@@ -227,7 +227,7 @@
#endif
/* Get the current lwp/proc structure or lwp0/proc0 if there is none. */
- l = curlwp == NULL ? &lwp0 : curlwp;
+ l = curlwp;
#ifdef __PROG26
if ((frame->tf_r15 & R15_MODE) == R15_MODE_USR) {
@@ -370,12 +370,10 @@
#ifdef FAST_FPE
/* Optimised exit code */
{
-
/*
* Check for reschedule request, at the moment there is only
* 1 ast so this code should always be run
*/
-
if (curcpu()->ci_want_resched) {
/*
* We are being preempted.
@@ -386,7 +384,6 @@
/* Invoke MI userret code */
mi_userret(l);
}
-
#else
userret(l);
#endif
Index: src/sys/arch/arm/arm32/arm32_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm32/arm32_machdep.c,v
retrieving revision 1.55
retrieving revision 1.56
diff -u -r1.55 -r1.56
--- src/sys/arch/arm/arm32/arm32_machdep.c 19 Jan 2008 15:04:09 -0000
1.55
+++ src/sys/arch/arm/arm32/arm32_machdep.c 27 Apr 2008 18:58:43 -0000
1.56
@@ -1,4 +1,4 @@
-/* $NetBSD: arm32_machdep.c,v 1.55 2008/01/19 15:04:09 chris Exp $ */
+/* $NetBSD: arm32_machdep.c,v 1.56 2008/04/27 18:58:43 matt Exp $ */
/*
* Copyright (c) 1994-1998 Mark Brinicombe.
@@ -42,9 +42,10 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: arm32_machdep.c,v 1.55 2008/01/19 15:04:09 chris
Exp $");
+__KERNEL_RCSID(0, "$NetBSD: arm32_machdep.c,v 1.56 2008/04/27 18:58:43 matt
Exp $");
#include "opt_md.h"
+#include "opt_cpuoptions.h"
#include "opt_pmap_debug.h"
#include <sys/param.h>
@@ -87,7 +88,12 @@
char machine_arch[] = MACHINE_ARCH; /* from <machine/param.h> */
/* Our exported CPU info; we can have only one. */
-struct cpu_info cpu_info_store;
+struct cpu_info cpu_info_store = {
+ .ci_cpl = IPL_HIGH,
+#ifndef PROCESS_ID_IS_CURLWP
+ .ci_curlwp = &lwp0,
+#endif
+};
void * msgbufaddr;
extern paddr_t msgbufphys;
@@ -434,6 +440,79 @@
bool
cpu_intr_p(void)
{
+ return curcpu()->ci_intr_depth != 0;
+}
+
+#ifdef __HAVE_FAST_SOFTINTS
+#if IPL_SOFTSERIAL != IPL_SOFTNET + 1
+#error IPLs are screwed up
+#endif
+#if IPL_SOFTNET != IPL_SOFTBIO + 1
+#error IPLs are screwed up
+#endif
+#if IPL_SOFTBIO != IPL_SOFTCLOCK + 1
+#error IPLs are screwed up
+#endif
+#if !(IPL_SOFTCLOCK > IPL_NONE)
+#error IPLs are screwed up
+#endif
+#define SOFTINT2IPLMAP \
+ ((IPL_SOFTSERIAL << (SOFTINT_SERIAL * 4)) | \
+ (IPL_SOFTNET << (SOFTINT_NET * 4)) | \
+ (IPL_SOFTBIO << (SOFTINT_BIO * 4)) | \
+ (IPL_SOFTCLOCK << (SOFTINT_CLOCK * 4)))
+#define SOFTINT2IPL(l) ((SOFTINT2IPLMAP >> ((l) * 4)) & 0x0f)
+
+/*
+ * This returns a mask of softint IPLs that be dispatch at <ipl>
+ * We want to shift 2 since we want a mask of <ipl> + 1.
+ * SOFTIPLMASK(IPL_NONE) = 0xfffffffe
+ * SOFTIPLMASK(IPL_SOFTCLOCK) = 0xffffffe0
+ */
+#define SOFTIPLMASK(ipl) ((~((2 << (ipl)) - 1)) & (15 << IPL_SOFTCLOCK))
+
+void softint_switch(lwp_t *, int);
+
+void
+softint_trigger(uintptr_t mask)
+{
+ curcpu()->ci_softints |= mask;
+}
+
+void
+softint_init_md(lwp_t *l, u_int level, uintptr_t *machdep)
+{
+ lwp_t ** lp = &curcpu()->ci_softlwps[level];
+ KASSERT(*lp == NULL || *lp == l);
+ *lp = l;
+ *machdep = 1 << SOFTINT2IPL(level);
+}
- return curcpu()->ci_idepth != 0;
+void
+dosoftints(void)
+{
+ struct cpu_info * const ci = curcpu();
+ const int opl = ci->ci_cpl;
+ const uint32_t softiplmask = SOFTIPLMASK(opl);
+
+ for (;;) {
+ u_int softints = ci->ci_softints & softiplmask;
+ if (softints == 0)
+ return;
+ ci->ci_cpl = IPL_HIGH;
+#define DOSOFTINT(n) \
+ if (softints & (1 << IPL_SOFT ## n)) { \
+ ci->ci_softints &= ~(1 << IPL_SOFT ## n); \
+ softint_switch(ci->ci_softlwps[SOFTINT_ ## n], \
+ IPL_SOFT ## n); \
+ ci->ci_cpl = opl; \
+ continue; \
+ }
+ DOSOFTINT(SERIAL);
+ DOSOFTINT(NET);
+ DOSOFTINT(BIO);
+ DOSOFTINT(CLOCK);
+ panic("dosoftints wtf (softints=%u?, ipl=%d)", softints, opl);
+ }
}
+#endif /* __HAVE_FAST_SOFTINTS */
Index: src/sys/arch/arm/arm32/atomic.S
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm32/atomic.S,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- src/sys/arch/arm/arm32/atomic.S 13 Jan 2008 11:19:05 -0000 1.2
+++ src/sys/arch/arm/arm32/atomic.S 27 Apr 2008 18:58:43 -0000 1.3
@@ -1,4 +1,4 @@
-/* $NetBSD: atomic.S,v 1.2 2008/01/13 11:19:05 chris Exp $ */
+/* $NetBSD: atomic.S,v 1.3 2008/04/27 18:58:43 matt Exp $ */
/*
* Copyright (C) 1994-1997 Mark Brinicombe
@@ -69,3 +69,47 @@
mov pc, lr
#endif /* ATOMIC_SET_BIT_NONINLINE_REQUIRED */
+
+#if 0 && defined(_ARM_ARCH_6)
+
+#define ATOMIC_OP(NAME, OP, ARG) \
+ENTRY_NP(atomic_##NAME##_32) ;\
+ mov ip, r0 ;\
+1: ldrex r0, [ip] ;\
+ OP r2, r0, ARG ;\
+ strex r3, r2, [ip] ;\
+ cmp r3, #0 ;\
+ bne 1b ;\
+ RET ;\
+ END(atomic_##NAME##_32)
+
+ATOMIC_OP(and, and, r1)
+ATOMIC_OP(nand, bic, r1)
+ATOMIC_OP(or, orr, r1)
+ATOMIC_OP(xor, eor, r1)
+ATOMIC_OP(add, add, r1)
+ATOMIC_OP(inc, add, #1)
+ATOMIC_OP(sub, sub, r1)
+ATOMIC_OP(dec, sub, #1)
+
+#define ATOMIC_OP_NV(NAME, OP, ARG) \
+ENTRY_NP(atomic_##NAME##_32_nv) ;\
+ mov ip, r0 ;\
+1: ldrex r0, [ip] ;\
+ OP r0, r0, ARG ;\
+ strex r3, r0, [ip] ;\
+ cmp r3, #0 ;\
+ bne 1b ;\
+ RET ;\
+ END(atomic_##NAME##_32_nv)
+
+ATOMIC_OP_NV(and, and, r1)
+ATOMIC_OP_NV(nand, bic, r1)
+ATOMIC_OP_NV(or, orr, r1)
+ATOMIC_OP_NV(xor, eor, r1)
+ATOMIC_OP_NV(add, add, r1)
+ATOMIC_OP_NV(inc, add, #1)
+ATOMIC_OP_NV(sub, sub, r1)
+ATOMIC_OP_NV(dec, sub, #1)
+
+#endif /* _ARM_ARCH_6 */
Index: src/sys/arch/arm/arm32/bus_dma.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm32/bus_dma.c,v
retrieving revision 1.50
retrieving revision 1.51
diff -u -r1.50 -r1.51
--- src/sys/arch/arm/arm32/bus_dma.c 4 Mar 2007 05:59:36 -0000 1.50
+++ src/sys/arch/arm/arm32/bus_dma.c 28 Apr 2008 20:23:13 -0000 1.51
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_dma.c,v 1.50 2007/03/04 05:59:36 christos Exp $ */
+/* $NetBSD: bus_dma.c,v 1.51 2008/04/28 20:23:13 martin Exp $ */
/*-
* Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
@@ -16,13 +16,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -40,7 +33,7 @@
#define _ARM32_BUS_DMA_PRIVATE
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.50 2007/03/04 05:59:36 christos Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.51 2008/04/28 20:23:13 martin Exp
$");
#include <sys/param.h>
#include <sys/systm.h>
Index: src/sys/arch/arm/arm32/cpu.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm32/cpu.c,v
retrieving revision 1.67
retrieving revision 1.68
diff -u -r1.67 -r1.68
--- src/sys/arch/arm/arm32/cpu.c 15 Mar 2008 10:19:40 -0000 1.67
+++ src/sys/arch/arm/arm32/cpu.c 27 Apr 2008 18:58:43 -0000 1.68
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.67 2008/03/15 10:19:40 rearnsha Exp $ */
+/* $NetBSD: cpu.c,v 1.68 2008/04/27 18:58:43 matt Exp $ */
/*
* Copyright (c) 1995 Mark Brinicombe.
@@ -46,7 +46,7 @@
#include <sys/param.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.67 2008/03/15 10:19:40 rearnsha Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.68 2008/04/27 18:58:43 matt Exp $");
#include <sys/systm.h>
#include <sys/malloc.h>
@@ -192,6 +192,11 @@
"rev 12", "rev 13", "rev 14", "rev 15",
};
+static const char * const pN_steppings[16] = {
+ "*p0", "*p1", "*p2", "*p3", "*p4", "*p5", "*p6", "*p7",
+ "*p8", "*p9", "*p10", "*p11", "*p12", "*p13", "*p14", "*p15",
+};
+
static const char * const sa110_steppings[16] = {
"rev 0", "step J", "step K", "step S",
"step T", "rev 5", "rev 6", "rev 7",
@@ -394,10 +399,12 @@
{ CPU_ID_IXP425_266, CPU_CLASS_XSCALE, "IXP425 266MHz",
ixp425_steppings },
- { CPU_ID_ARM1136JS, CPU_CLASS_ARM11J, "ARM1136J-S",
- generic_steppings },
- { CPU_ID_ARM1136JSR1, CPU_CLASS_ARM11J, "ARM1136J-S R1",
- generic_steppings },
+ { CPU_ID_ARM1136JS, CPU_CLASS_ARM11J, "ARM1136J-S r0",
+ pN_steppings },
+ { CPU_ID_ARM1136JSR1, CPU_CLASS_ARM11J, "ARM1136J-S r1",
+ pN_steppings },
+ { CPU_ID_ARM1176JS, CPU_CLASS_ARM11J, "ARM1176J-S r0",
+ pN_steppings },
{ 0, CPU_CLASS_NONE, NULL, NULL }
};
@@ -457,6 +464,7 @@
u_int cpuid;
enum cpu_class cpu_class = CPU_CLASS_NONE;
int i;
+ const char *steppingstr;
cpuid = ci->ci_arm_cpuid;
@@ -468,10 +476,12 @@
for (i = 0; cpuids[i].cpuid != 0; i++)
if (cpuids[i].cpuid == (cpuid & CPU_ID_CPU_MASK)) {
cpu_class = cpuids[i].cpu_class;
- sprintf(cpu_model, "%s %s (%s core)",
+ steppingstr = cpuids[i].cpu_steppings[cpuid &
+ CPU_ID_REVISION_MASK],
+ sprintf(cpu_model, "%s%s%s (%s core)",
cpuids[i].cpu_name,
- cpuids[i].cpu_steppings[cpuid &
- CPU_ID_REVISION_MASK],
+ steppingstr[0] == '*' ? "" : " ",
+ &steppingstr[steppingstr[0] == '*'],
cpu_classes[cpu_class].class_name);
break;
}
@@ -591,7 +601,7 @@
defined(__CPU_XSCALE_PXA2XX) || defined(CPU_XSCALE_IXP425)
case CPU_CLASS_XSCALE:
#endif
-#ifdef CPU_ARM11
+#if defined(CPU_ARM11)
case CPU_CLASS_ARM11J:
#endif
break;
Index: src/sys/arch/arm/arm32/cpuswitch.S
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm32/cpuswitch.S,v
retrieving revision 1.57
retrieving revision 1.58
diff -u -r1.57 -r1.58
--- src/sys/arch/arm/arm32/cpuswitch.S 20 Apr 2008 15:42:19 -0000 1.57
+++ src/sys/arch/arm/arm32/cpuswitch.S 27 Apr 2008 18:58:43 -0000 1.58
@@ -1,4 +1,4 @@
-/* $NetBSD: cpuswitch.S,v 1.57 2008/04/20 15:42:19 scw Exp $ */
+/* $NetBSD: cpuswitch.S,v 1.58 2008/04/27 18:58:43 matt Exp $ */
/*
* Copyright 2003 Wasabi Systems, Inc.
@@ -80,14 +80,17 @@
#include "opt_armfpe.h"
#include "opt_arm32_pmap.h"
#include "opt_multiprocessor.h"
+#include "opt_cpuoptions.h"
#include "opt_lockdebug.h"
#include "assym.h"
#include <arm/arm32/pte.h>
#include <machine/param.h>
-#include <machine/cpu.h>
#include <machine/frame.h>
#include <machine/asm.h>
+#include <machine/cpu.h>
+
+ RCSID("$NetBSD: cpuswitch.S,v 1.58 2008/04/27 18:58:43 matt Exp $")
/* LINTSTUB: include <sys/param.h> */
@@ -99,43 +102,23 @@
* These keep FIQ's enabled since FIQ's are special.
*/
+#ifdef _ARM_ARCH_6
+#define IRQdisable cpsid i
+#define IRQenable cpsie i
+#else
#define IRQdisable \
mrs r14, cpsr ; \
orr r14, r14, #(I32_bit) ; \
- msr cpsr_c, r14 ; \
+ msr cpsr_c, r14
#define IRQenable \
mrs r14, cpsr ; \
bic r14, r14, #(I32_bit) ; \
- msr cpsr_c, r14 ; \
-
- .text
+ msr cpsr_c, r14
-#ifdef MULTIPROCESSOR
-.Lcpu_info_store:
- .word _C_LABEL(cpu_info_store)
-.Lcurlwp:
- /* FIXME: This is bogus in the general case. */
- .word _C_LABEL(cpu_info_store) + CI_CURLWP
-
-.Lcurpcb:
- .word _C_LABEL(cpu_info_store) + CI_CURPCB
-#else
-.Lcurlwp:
- .word _C_LABEL(curlwp)
-
-.Lcurpcb:
- .word _C_LABEL(curpcb)
#endif
-#ifndef MULTIPROCESSOR
- .data
- .global _C_LABEL(curpcb)
-_C_LABEL(curpcb):
- .word 0x00000000
.text
-#endif
-
.Lpmap_previous_active_lwp:
.word _C_LABEL(pmap_previous_active_lwp)
@@ -146,38 +129,53 @@
* Switch to the specified next LWP
* Arguments:
*
- * r0 'struct lwp *' of the current LWP
+ * r0 'struct lwp *' of the current LWP (or NULL if exiting)
* r1 'struct lwp *' of the LWP to switch to
+ * r2 returning
*/
ENTRY(cpu_switchto)
mov ip, sp
stmfd sp!, {r4-r7, ip, lr}
- /* move lwps and new pcb into caller saved registers */
+ /* move lwps into caller saved registers */
mov r6, r1
mov r4, r0
- ldr r7, [r6, #(L_ADDR)]
+
+#ifdef PROCESS_ID_CURCPU
+ GET_CURCPU(r7)
+#elif defined(PROCESS_ID_IS_CURLWP)
+ mcr p15, 0, r0, c13, c0, 4 /* get old lwp (r4 maybe 0) */
+ ldr r7, [r0, #(L_CPU)] /* get cpu from old lwp */
+#elif !defined(MULTIPROCESSOR)
+ ldr r7, [r6, #L_CPU] /* get cpu from new lwp */
+#else
+#error curcpu() method not defined
+#endif
/* rem: r4 = old lwp */
/* rem: r6 = new lwp */
- /* rem: r7 = new pcb */
+ /* rem: r7 = curcpu() */
IRQdisable
#ifdef MULTIPROCESSOR
- /* XXX use curcpu() */
- ldr r0, .Lcpu_info_store
- str r0, [r6, #(L_CPU)]
+ str r7, [r6, #(L_CPU)]
#else
/* l->l_cpu initialized in fork1() for single-processor */
#endif
- /* We have a new curlwp and pcb so make a note of them */
- ldr r0, .Lcurlwp
- ldr r1, .Lcurpcb
+#if defined(PROCESS_ID_IS_CURLWP)
+ mcr p15, 0, r6, c13, c0, 4 /* set current lwp */
+#endif
+#if !defined(PROCESS_ID_IS_CURLWP) || defined(MULTIPROCESSOR)
+ /* We have a new curlwp now so make a note it */
+ str r6, [r7, #(CI_CURLWP)]
+#endif
- str r6, [r0]
- str r7, [r1]
+ /* Hook in a new pcb */
+ ldr r0, [r6, #(L_ADDR)]
+ str r0, [r7, #(CI_CURPCB)]
+ mov r7, r0
/* At this point we can allow IRQ's again. */
IRQenable
@@ -193,7 +191,7 @@
* not need to save the current context. Instead we can jump
* straight to restoring the context for the new process.
*/
- teq r4, #0x00000000
+ teq r4, #0
beq .Ldo_switch
/* rem: r4 = old lwp */
@@ -207,15 +205,22 @@
ldr r5, [r4, #(L_ADDR)]
/* Save all the registers in the old lwp's pcb */
-#ifndef __XSCALE__
- add r0, r5, #(PCB_R8)
- stmia r0, {r8-r13}
-#else
+#if defined(__XSCALE__) || defined(_ARM_ARCH_6)
strd r8, [r5, #(PCB_R8)]
strd r10, [r5, #(PCB_R10)]
strd r12, [r5, #(PCB_R12)]
+#else
+ add r0, r5, #(PCB_R8)
+ stmia r0, {r8-r13}
#endif
+#ifdef _ARM_ARCH_6
+ /*
+ * Save user read/write thread/process id register
+ */
+ mrc p15, 0, r0, c13, c0, 2
+ str r0, [r5, #(PCB_USER_PID_RW)]
+#endif
/*
* NOTE: We can now use r8-r13 until it is time to restore
* them for the new process.
@@ -227,7 +232,6 @@
/* rem: r7 = new pcb */
/* rem: interrupts are enabled */
- /* What else needs to be saved? Only FPA stuff when that is supported */
#ifdef FPU_VFP
/*
* Now's a good time to 'save' the VFP context. Note that we
@@ -245,23 +249,37 @@
/* rem: r7 = new pcb */
/* rem: interrupts are enabled */
- ldr r1, .Lpmap_previous_active_lwp
+#ifdef _ARM_ARCH_6
+ /*
+ * Restore user thread/process id registers
+ */
+ ldr r0, [r7, #(PCB_USER_PID_RW)]
+ mcr p15, 0, r0, c13, c0, 2
+ ldr r0, [r7, #(PCB_USER_PID_RO)]
+ mcr p15, 0, r0, c13, c0, 3
+#endif
+
ldr r5, [r6, #(L_PROC)] /* fetch the proc for below */
/* Restore all the saved registers */
-#ifndef __XSCALE__
- add r0, r7, #PCB_R8
- ldmia r0, {r8-r13}
-#else
+#ifdef __XSCALE__
ldr r8, [r7, #(PCB_R8)]
ldr r9, [r7, #(PCB_R9)]
ldr r10, [r7, #(PCB_R10)]
ldr r11, [r7, #(PCB_R11)]
ldr r12, [r7, #(PCB_R12)]
ldr r13, [r7, #(PCB_SP)]
+#elif defined(_ARM_ARCH_6)
+ ldrd r8, [r7, #(PCB_R8)]
+ ldrd r10, [r7, #(PCB_R10)]
+ ldrd r12, [r7, #(PCB_R12)]
+#else
+ add r0, r7, #PCB_R8
+ ldmia r0, {r8-r13}
#endif
/* Record the old lwp for pmap_activate()'s benefit */
+ ldr r1, .Lpmap_previous_active_lwp
str r4, [r1]
/* rem: r4 = old lwp */
@@ -336,3 +354,122 @@
PULLFRAME
movs pc, lr /* Exit */
+
+#ifdef __HAVE_FAST_SOFTINTS
+/*
+ * Called at IPL_HIGH
+ * r0 = new lwp
+ * r1 = ipl for softint_dispatch
+ */
+ENTRY_NP(softint_switch)
+ stmfd sp!, {r4, r6, r7, lr}
+
+ ldr r7, [r0, #L_CPU] /* get curcpu */
+#if defined(PROCESS_ID_IS_CURLWP)
+ mrc p15, 0, r4, c13, c0, 4 /* get old lwp */
+#else
+ ldr r4, [r7, #(CI_CURLWP)] /* get old lwp */
+#endif
+ mrs r6, cpsr /* we need to save this */
+
+ /*
+ * If the soft lwp blocks, it needs to return to softint_tramp
+ */
+ mov r2, sp /* think ip */
+ adr r3, softint_tramp /* think lr */
+ stmfd sp!, {r2-r3}
+ stmfd sp!, {r4-r7}
+
+ mov r5, r0 /* save new lwp */
+
+ ldr r2, [r4, #(L_ADDR)] /* get old lwp's pcb */
+
+ /* Save all the registers into the old lwp's pcb */
+#if defined(__XSCALE__) || defined(_ARM_ARCH_6)
+ strd r8, [r2, #(PCB_R8)]
+ strd r10, [r2, #(PCB_R10)]
+ strd r12, [r2, #(PCB_R12)]
+#else
+ add r3, r2, #(PCB_R8)
+ stmia r3, {r8-r13}
+#endif
+
+ /* this is an invariant so load before disabling intrs */
+ ldr r2, [r5, #(L_ADDR)] /* get new lwp's pcb */
+
+ IRQdisable
+ /*
+ * We're switching to a bound LWP so its l_cpu is already correct.
+ */
+#if defined(PROCESS_ID_IS_CURLWP)
+ mcr p15, 0, r5, c13, c0, 4 /* save new lwp */
+#endif
+#if !defined(PROCESS_ID_IS_CURLWP) || defined(MULTIPROCESSOR)
+ str r5, [r7, #(CI_CURLWP)] /* save new lwp */
+#endif
+
+ /* Hook in a new pcb */
+ str r2, [r7, #(CI_CURPCB)]
+
+ /*
+ * Normally, we'd get {r8-r13} but since this is a softint lwp
+ * it's existing state doesn't matter. We start the stack just
+ * below the trapframe.
+ */
+ ldr sp, [r2, #(PCB_TF)] /* get new lwp's stack ptr */
+
+ /* At this point we can allow IRQ's again. */
+ IRQenable
+
+ /* r1 still has ipl */
+ mov r0, r4 /* r0 has pinned (old) lwp */
+ bl _C_LABEL(softint_dispatch)
+ /*
+ * If we've returned, we need to change everything back and return.
+ */
+ ldr r2, [r4, #(L_ADDR)] /* get pinned lwp's pcb */
+
+ IRQdisable
+ /*
+ * We don't need to restore all the registers since another lwp was
+ * never executed. But we do need the SP from the formerly pinned lwp.
+ */
+
+#if defined(PROCESS_ID_IS_CURLWP)
+ mcr p15, 0, r4, c13, c0, 4 /* restore pinned lwp */
+#endif
+#if !defined(PROCESS_ID_IS_CURLWP) || defined(MULTIPROCESSOR)
+ str r4, [r7, #(CI_CURLWP)] /* restore pinned lwp */
+#endif
+ str r2, [r7, #(CI_CURPCB)] /* restore the curpcb */
+ ldr sp, [r2, #(PCB_SP)] /* now running on the old stack. */
+
+ /* At this point we can allow IRQ's again. */
+ msr cpsr_c, r6
+
+ /*
+ * Grab the registers that got pushed at the start and return.
+ */
+ ldmfd sp!, {r4-r7, ip, lr} /* eat switch frame */
+ ldmfd sp!, {r4, r6, r7, pc} /* pop stack and return */
+
+END(softint_switch)
+
+/*
+ * r0 = previous LWP (the soft lwp)
+ * r4 = original LWP (the current lwp)
+ * r6 = original CPSR
+ * r7 = curcpu()
+ */
+ENTRY_NP(softint_tramp)
+ ldr r3, [r7, #(CI_MTX_COUNT)] /* readust after mi_switch */
+ add r3, r3, #1
+ str r3, [r7, #(CI_MTX_COUNT)]
+
+ mov r3, #0 /* tell softint_dispatch */
+ str r3, [r0, #(L_CTXSWTCH)] /* the soft lwp blocked */
+
+ msr cpsr_c, r6 /* restore interrupts */
+ ldmfd sp!, {r4, r6, r7, pc} /* pop stack and return */
+END(softint_tramp)
+#endif /* __HAVE_FAST_SOFTINTS */
Index: src/sys/arch/arm/arm32/exception.S
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm32/exception.S,v
retrieving revision 1.15
retrieving revision 1.16
diff -u -r1.15 -r1.16
--- src/sys/arch/arm/arm32/exception.S 19 Jan 2008 13:11:09 -0000 1.15
+++ src/sys/arch/arm/arm32/exception.S 27 Apr 2008 18:58:44 -0000 1.16
@@ -1,4 +1,4 @@
-/* $NetBSD: exception.S,v 1.15 2008/01/19 13:11:09 chris Exp $ */
+/* $NetBSD: exception.S,v 1.16 2008/04/27 18:58:44 matt Exp $ */
/*
* Copyright (c) 1994-1997 Mark Brinicombe.
@@ -45,10 +45,12 @@
* Based on kate/display/abort.s
*/
+#include "assym.h"
#include <machine/asm.h>
#include <machine/cpu.h>
#include <machine/frame.h>
-#include "assym.h"
+
+ RCSID("$NetBSD: exception.S,v 1.16 2008/04/27 18:58:44 matt Exp $")
.text
.align 0
Index: src/sys/arch/arm/arm32/fault.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm32/fault.c,v
retrieving revision 1.66
retrieving revision 1.67
diff -u -r1.66 -r1.67
--- src/sys/arch/arm/arm32/fault.c 29 Mar 2008 22:05:15 -0000 1.66
+++ src/sys/arch/arm/arm32/fault.c 27 Apr 2008 18:58:44 -0000 1.67
@@ -1,4 +1,4 @@
-/* $NetBSD: fault.c,v 1.66 2008/03/29 22:05:15 chris Exp $ */
+/* $NetBSD: fault.c,v 1.67 2008/04/27 18:58:44 matt Exp $ */
/*
* Copyright 2003 Wasabi Systems, Inc.
@@ -81,7 +81,7 @@
#include "opt_kgdb.h"
#include <sys/types.h>
-__KERNEL_RCSID(0, "$NetBSD: fault.c,v 1.66 2008/03/29 22:05:15 chris Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fault.c,v 1.67 2008/04/27 18:58:44 matt Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -246,8 +246,9 @@
if (__predict_true((tf->tf_spsr & I32_bit) == 0))
enable_interrupts(I32_bit);
- /* Get the current lwp structure or lwp0 if there is none */
- l = (curlwp != NULL) ? curlwp : &lwp0;
+ /* Get the current lwp structure */
+ KASSERT(curlwp != NULL);
+ l = curlwp;
UVMHIST_LOG(maphist, " (pc=0x%x, l=0x%x, far=0x%x, fsr=0x%x)",
tf->tf_pc, l, far, fsr);
@@ -443,7 +444,7 @@
goto out;
}
- if (__predict_false(curcpu()->ci_idepth > 0)) {
+ if (__predict_false(curcpu()->ci_intr_depth > 0)) {
if (pcb->pcb_onfault) {
tf->tf_r0 = EINVAL;
tf->tf_pc = (register_t)(intptr_t) pcb->pcb_onfault;
@@ -832,7 +833,7 @@
}
#ifdef DIAGNOSTIC
- if (__predict_false(cpu_intr_p())) {
+ if (__predict_false(l->l_cpu->ci_intr_depth > 0)) {
printf("\nNon-emulated prefetch abort with intr_depth > 0\n");
dab_fatal(tf, 0, tf->tf_pc, NULL, NULL);
}
Index: src/sys/arch/arm/arm32/fusu.S
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm32/Attic/fusu.S,v
retrieving revision 1.12
retrieving revision 1.13
diff -u -r1.12 -r1.13
--- src/sys/arch/arm/arm32/fusu.S 4 Mar 2007 05:59:37 -0000 1.12
+++ src/sys/arch/arm/arm32/fusu.S 27 Apr 2008 18:58:44 -0000 1.13
@@ -1,4 +1,4 @@
-/* $NetBSD: fusu.S,v 1.12 2007/03/04 05:59:37 christos Exp $ */
+/* $NetBSD: fusu.S,v 1.13 2008/04/27 18:58:44 matt Exp $ */
/*
* Copyright (c) 1996-1998 Mark Brinicombe.
@@ -33,36 +33,44 @@
*/
#include "opt_multiprocessor.h"
+#include "opt_cpuoptions.h"
#include "assym.h"
#include <machine/asm.h>
+#include <machine/cpu.h>
+#if !defined(PROCESS_ID_IS_CURCPU) && !defined(PROCESS_ID_IS_CURLWP)
#ifdef MULTIPROCESSOR
.Lcpu_info:
.word _C_LABEL(cpu_info)
#else
.Lcurpcb:
- .word _C_LABEL(curpcb)
+ .word _C_LABEL(cpu_info_store) + CI_CURPCB
+#endif
#endif
+#if !defined(PROCESS_ID_IS_CURCPU) && !defined(PROCESS_ID_IS_CURLWP)
+#if defined(MULTIPROCESSOR)
+#define GET_CURPCB(rX) \
+ stmfd sp!, {r0, r1, r3, r14} ;\
+ bl _C_LABEL(cpu_number) ;\
+ ldr rX, .Lcpu_info ;\
+ ldr rX, [rX, r0, lsl #2] ;\
+ ldr rX, [rX, #CI_CURPCB] ;\
+ ldmfd sp!, {r0, r1, r3, r14}
+#else
+#define GET_CURPCB(rX) \
+ ldr rX, .Lcurpcb ;\
+ ldr rX, [rX]
+#endif
+#endif
/*
* fuword(void *uaddr);
* Fetch an int from the user's address space.
*/
ENTRY(fuword)
-#ifdef MULTIPROCESSOR
- /* XXX Probably not appropriate for non-Hydra SMPs */
- stmfd sp!, {r0, r14}
- bl _C_LABEL(cpu_number)
- ldr r2, .Lcpu_info
- ldr r2, [r2, r0, lsl #2]
- ldr r2, [r2, #CI_CURPCB]
- ldmfd sp!, {r0, r14}
-#else
- ldr r2, .Lcurpcb
- ldr r2, [r2]
-#endif
+ GET_CURPCB(r2)
#ifdef DIAGNOSTIC
teq r2, #0x00000000
@@ -85,18 +93,7 @@
*/
ENTRY(fusword)
-#ifdef MULTIPROCESSOR
- /* XXX Probably not appropriate for non-Hydra SMPs */
- stmfd sp!, {r0, r14}
- bl _C_LABEL(cpu_number)
- ldr r2, .Lcpu_info
- ldr r2, [r2, r0, lsl #2]
- ldr r2, [r2, #CI_CURPCB]
- ldmfd sp!, {r0, r14}
-#else
- ldr r2, .Lcurpcb
- ldr r2, [r2]
-#endif
+ GET_CURPCB(r2)
#ifdef DIAGNOSTIC
teq r2, #0x00000000
@@ -130,18 +127,7 @@
mvnne r0, #0x00000000
movne pc, lr
-#ifdef MULTIPROCESSOR
- /* XXX Probably not appropriate for non-Hydra SMPs */
- stmfd sp!, {r0, r14}
- bl _C_LABEL(cpu_number)
- ldr r2, .Lcpu_info
- ldr r2, [r2, r0, lsl #2]
- ldr r2, [r2, #CI_CURPCB]
- ldmfd sp!, {r0, r14}
-#else
- ldr r2, .Lcurpcb
- ldr r2, [r2]
-#endif
+ GET_CURPCB(r2)
#ifdef DIAGNOSTIC
teq r2, #0x00000000
@@ -179,18 +165,7 @@
*/
ENTRY(fubyte)
-#ifdef MULTIPROCESSOR
- /* XXX Probably not appropriate for non-Hydra SMPs */
- stmfd sp!, {r0, r14}
- bl _C_LABEL(cpu_number)
- ldr r2, .Lcpu_info
- ldr r2, [r2, r0, lsl #2]
- ldr r2, [r2, #CI_CURPCB]
- ldmfd sp!, {r0, r14}
-#else
- ldr r2, .Lcurpcb
- ldr r2, [r2]
-#endif
+ GET_CURPCB(r2)
#ifdef DIAGNOSTIC
teq r2, #0x00000000
@@ -252,18 +227,7 @@
*/
ENTRY(suword)
-#ifdef MULTIPROCESSOR
- /* XXX Probably not appropriate for non-Hydra SMPs */
- stmfd sp!, {r0, r1, r14}
- bl _C_LABEL(cpu_number)
- ldr r2, .Lcpu_info
- ldr r2, [r2, r0, lsl #2]
- ldr r2, [r2, #CI_CURPCB]
- ldmfd sp!, {r0, r1, r14}
-#else
- ldr r2, .Lcurpcb
- ldr r2, [r2]
-#endif
+ GET_CURPCB(r2)
#ifdef DIAGNOSTIC
teq r2, #0x00000000
@@ -292,17 +256,7 @@
mvnne r0, #0x00000000
movne pc, lr
-#ifdef MULTIPROCESSOR
- stmfd sp!, {r0, r1, r14}
- bl _C_LABEL(cpu_number)
- ldr r2, .Lcpu_info
- ldr r2, [r2, r0, lsl #2]
- ldr r2, [r2, #CI_CURPCB]
- ldmfd sp!, {r0, r1, r14}
-#else
- ldr r2, .Lcurpcb
- ldr r2, [r2]
-#endif
+ GET_CURPCB(r2)
#ifdef DIAGNOSTIC
teq r2, #0x00000000
@@ -331,17 +285,7 @@
*/
ENTRY(susword)
-#ifdef MULTIPROCESSOR
- stmfd sp!, {r0, r1, r14}
- bl _C_LABEL(cpu_number)
- ldr r2, .Lcpu_info
- ldr r2, [r2, r0, lsl #2]
- ldr r2, [r2, #CI_CURPCB]
- ldmfd sp!, {r0, r1, r14}
-#else
- ldr r2, .Lcurpcb
- ldr r2, [r2]
-#endif
+ GET_CURPCB(r2)
#ifdef DIAGNOSTIC
teq r2, #0x00000000
@@ -370,13 +314,15 @@
*/
ENTRY(subyte)
-#ifdef MULTIPROCESSOR
- stmfd sp!, {r0, r1, r14}
+#if defined(PROCESS_ID_IS_CURCPU) || defined(PROCESS_ID_IS_CURLWP)
+ GET_CURPCB(r2)
+#elif defined(MULTIPROCESSOR)
+ stmfd sp!, {r0, r1, r3, r14}
bl _C_LABEL(cpu_number)
ldr r2, .Lcpu_info
ldr r2, [r2, r0, lsl #2]
ldr r2, [r2, #CI_CURPCB]
- ldmfd sp!, {r0, r1, r14}
+ ldmfd sp!, {r0, r1, r3, r14}
#else
ldr r2, .Lcurpcb
ldr r2, [r2]
Index: src/sys/arch/arm/arm32/genassym.cf
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm32/genassym.cf,v
retrieving revision 1.38
retrieving revision 1.39
diff -u -r1.38 -r1.39
--- src/sys/arch/arm/arm32/genassym.cf 19 Jan 2008 15:04:10 -0000 1.38
+++ src/sys/arch/arm/arm32/genassym.cf 27 Apr 2008 18:58:44 -0000 1.39
@@ -1,4 +1,4 @@
-# $NetBSD: genassym.cf,v 1.38 2008/01/19 15:04:10 chris Exp $
+# $NetBSD: genassym.cf,v 1.39 2008/04/27 18:58:44 matt Exp $
# Copyright (c) 1982, 1990 The Regents of the University of California.
# All rights reserved.
@@ -90,6 +90,7 @@
define L_WCHAN offsetof(struct lwp, l_wchan)
define L_STAT offsetof(struct lwp, l_stat)
define L_PROC offsetof(struct lwp, l_proc)
+define L_CTXSWTCH offsetof(struct lwp, l_ctxswtch)
define P_RASLIST offsetof(struct proc, p_raslist)
define PCB_TF offsetof(struct pcb, pcb_tf)
@@ -102,6 +103,8 @@
define PCB_SP offsetof(struct pcb, pcb_un.un_32.pcb32_sp)
define PCB_LR offsetof(struct pcb, pcb_un.un_32.pcb32_lr)
define PCB_PC offsetof(struct pcb, pcb_un.un_32.pcb32_pc)
+define PCB_USER_PID_RW offsetof(struct pcb,
pcb_un.un_32.pcb32_user_pid_rw)
+define PCB_USER_PID_RO offsetof(struct pcb,
pcb_un.un_32.pcb32_user_pid_ro)
define PCB_ONFAULT offsetof(struct pcb, pcb_onfault)
define PCB_NOALIGNFLT PCB_NOALIGNFLT
@@ -139,11 +142,15 @@
define CF_CONTROL offsetof(struct cpu_functions, cf_control)
define CI_CURPRIORITY offsetof(struct cpu_info,
ci_schedstate.spc_curpriority)
-define CI_IDEPTH offsetof(struct cpu_info, ci_idepth)
-ifdef MULTIPROCESSOR
+ifndef PROCESS_ID_IS_CURLWP
define CI_CURLWP offsetof(struct cpu_info, ci_curlwp)
-define CI_CURPCB offsetof(struct cpu_info, ci_curpcb)
endif
+define CI_CURPCB offsetof(struct cpu_info, ci_curpcb)
+define CI_CPL offsetof(struct cpu_info, ci_cpl)
+define CI_ASTPENDING offsetof(struct cpu_info, ci_astpending)
+define CI_WANT_RESCHED offsetof(struct cpu_info, ci_want_resched)
+define CI_INTR_DEPTH offsetof(struct cpu_info, ci_intr_depth)
+define CI_MTX_COUNT offsetof(struct cpu_info, ci_mtx_count)
if defined(EXEC_AOUT)
define CI_CTRL offsetof(struct cpu_info, ci_ctrl)
endif
Index: src/sys/arch/arm/arm32/intr.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm32/intr.c,v
retrieving revision 1.27
retrieving revision 1.28
diff -u -r1.27 -r1.28
--- src/sys/arch/arm/arm32/intr.c 24 Feb 2008 20:51:52 -0000 1.27
+++ src/sys/arch/arm/arm32/intr.c 27 Apr 2008 18:58:44 -0000 1.28
@@ -1,4 +1,4 @@
-/* $NetBSD: intr.c,v 1.27 2008/02/24 20:51:52 matt Exp $ */
+/* $NetBSD: intr.c,v 1.28 2008/04/27 18:58:44 matt Exp $ */
/*
* Copyright (c) 1994-1998 Mark Brinicombe.
@@ -36,7 +36,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.27 2008/02/24 20:51:52 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.28 2008/04/27 18:58:44 matt Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -50,92 +50,10 @@
#include <machine/intr.h>
#include <machine/cpu.h>
-#include <net/netisr.h>
-
#include <arm/arm32/machdep.h>
-extern int current_spl_level;
-
-static u_int spl_smasks[_SPL_LEVELS];
-
-/* Eventually these will become macros */
-
-#ifdef __HAVE_FAST_SOFTINTS
-/* Generate soft interrupt counts if IRQSTATS is defined */
-/* Prototypes */
-static void clearsoftintr(u_int);
-
-static u_int soft_interrupts = 0;
-#define SI_SOFTMASK(si) (1U << (si))
-
-static inline void
-clearsoftintr(u_int intrmask)
-{
- atomic_clear_bit(&soft_interrupts, intrmask);
-}
-
-void
-_setsoftintr(int si)
-{
- atomic_set_bit(&soft_interrupts, SI_SOFTMASK(si));
-}
-
-/* Handle software interrupts */
-
-void
-dosoftints(void)
-{
- u_int softints;
- int s;
-
- softints = soft_interrupts & spl_smasks[current_spl_level];
- if (softints == 0) return;
-
- /*
- * Serial software interrupts
- */
- if (softints & SI_SOFTMASK(SI_SOFTSERIAL)) {
- s = splsoftserial();
- clearsoftintr(SI_SOFTMASK(SI_SOFTSERIAL));
- softintr_dispatch(SI_SOFTSERIAL);
- (void)splx(s);
- }
-
- /*
- * Network software interrupts
- */
- if (softints & SI_SOFTMASK(SI_SOFTNET)) {
- s = splsoftnet();
- clearsoftintr(SI_SOFTMASK(SI_SOFTNET));
- softintr_dispatch(SI_SOFTNET);
- (void)splx(s);
- }
-
- /*
- * Block software interrupts
- */
- if (softints & SI_SOFTMASK(SI_SOFTBIO)) {
- s = splsoftbio();
- clearsoftintr(SI_SOFTMASK(SI_SOFTBIO));
- softintr_dispatch(SI_SOFTBIO);
- (void)splx(s);
- }
-
- /*
- * Software clock interrupts
- */
- if (softints & SI_SOFTMASK(SI_SOFTCLOCK)) {
- s = splsoftclock();
- clearsoftintr(SI_SOFTMASK(SI_SOFTCLOCK));
- softintr_dispatch(SI_SOFTCLOCK);
- (void)splx(s);
- }
-}
-#endif
-
-int current_spl_level = _SPL_HIGH;
-u_int spl_masks[_SPL_LEVELS + 1];
-int safepri = _SPL_0;
+u_int spl_masks[NIPL];
+int safepri = IPL_NONE;
extern u_int irqmasks[];
@@ -144,52 +62,15 @@
{
int loop;
- for (loop = 0; loop < _SPL_LEVELS; ++loop) {
+ for (loop = 0; loop < NIPL; ++loop) {
spl_masks[loop] = 0xffffffff;
- spl_smasks[loop] = 0;
}
- spl_masks[_SPL_VM] = irqmasks[IPL_VM];
- spl_masks[_SPL_SCHED] = irqmasks[IPL_SCHED];
- spl_masks[_SPL_HIGH] = irqmasks[IPL_HIGH];
- spl_masks[_SPL_LEVELS] = 0;
-
- spl_smasks[_SPL_0] = 0xffffffff;
-#ifdef __HAVE_FAST_SOFTINTS
- for (loop = 0; loop < _SPL_SOFTSERIAL; ++loop)
- spl_smasks[loop] |= SI_SOFTMASK(SI_SOFTSERIAL);
- for (loop = 0; loop < _SPL_SOFTNET; ++loop)
- spl_smasks[loop] |= SI_SOFTMASK(SI_SOFTNET);
- for (loop = 0; loop < _SPL_SOFTCLOCK; ++loop)
- spl_smasks[loop] |= SI_SOFTMASK(SI_SOFTCLOCK);
- for (loop = 0; loop < _SPL_SOFTBIO; ++loop)
- spl_smasks[loop] |= SI_SOFTMASK(SI_SOFTBIO);
-#endif
-}
+ spl_masks[IPL_VM] = irqmasks[IPL_VM];
+ spl_masks[IPL_SCHED] = irqmasks[IPL_SCHED];
+ spl_masks[IPL_HIGH] = irqmasks[IPL_HIGH];
+ spl_masks[IPL_NONE] = 0;
-static const int ipl_to_spl_map[] = {
- [IPL_NONE] = 1 + _SPL_0,
- [IPL_SOFTCLOCK] = 1 + _SPL_SOFTCLOCK,
- [IPL_SOFTBIO] = 1 + _SPL_SOFTBIO,
- [IPL_SOFTNET] = 1 + _SPL_SOFTNET,
- [IPL_SOFTSERIAL] = 1 + _SPL_SOFTSERIAL,
- [IPL_VM] = 1 + _SPL_VM,
- [IPL_SCHED] = 1 + _SPL_SCHED,
- [IPL_HIGH] = 1 + _SPL_HIGH,
-};
-
-int
-ipl_to_spl(ipl_t ipl)
-{
- int spl;
-
- KASSERT(ipl < __arraycount(ipl_to_spl_map));
- KASSERT(ipl_to_spl_map[ipl]);
-
- spl = ipl_to_spl_map[ipl] - 1;
- KASSERT(spl < 0x100);
-
- return spl;
}
#ifdef DIAGNOSTIC
@@ -198,10 +79,8 @@
{
int loop;
- for (loop = 0; loop < _SPL_LEVELS; ++loop) {
- printf("spl_masks[%d]=%08x splsmask[%d]=%08x\n", loop,
- spl_masks[loop], loop, spl_smasks[loop]);
- }
+ for (loop = 0; loop < NIPL; ++loop)
+ printf("spl_masks[%d]=%08x\n", loop, spl_masks[loop]);
}
#endif
Index: src/sys/arch/arm/arm32/irq_dispatch.S
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm32/irq_dispatch.S,v
retrieving revision 1.9
retrieving revision 1.10
diff -u -r1.9 -r1.10
--- src/sys/arch/arm/arm32/irq_dispatch.S 6 Jan 2008 03:45:26 -0000
1.9
+++ src/sys/arch/arm/arm32/irq_dispatch.S 27 Apr 2008 18:58:44 -0000
1.10
@@ -1,4 +1,4 @@
-/* $NetBSD: irq_dispatch.S,v 1.9 2008/01/06 03:45:26 matt Exp $ */
+/* $NetBSD: irq_dispatch.S,v 1.10 2008/04/27 18:58:44 matt Exp $ */
/*
* Copyright (c) 2002 Fujitsu Component Limited
@@ -92,7 +92,7 @@
.text
.align 0
.Lcurrent_intr_depth:
- .word _C_LABEL(cpu_info_store) + CI_IDEPTH
+ .word _C_LABEL(cpu_info_store) + CI_INTR_DEPTH
LOCK_CAS_CHECK_LOCALS
@@ -102,7 +102,7 @@
sub lr, lr, #0x00000004 /* Adjust the lr */
PUSHFRAMEINSVC /* Push an interrupt frame */
- ENABLE_ALIGNMENT_FAULTS
+ ENABLE_ALIGNMENT_FAULTS /* finishes with curcpu() in r4 */
/*
* Increment the interrupt nesting depth and call the interrupt
@@ -110,14 +110,13 @@
* callee-saved regs here. We use the following registers, which
* we expect to presist:
*
- * r5 address of `current_intr_depth' variable
- * r6 old value of `current_intr_depth'
+ * r4 address of current cpu_info
+ * r6 old value of `ci_intr_depth'
*/
- ldr r5, .Lcurrent_intr_depth
mov r0, sp /* arg for dispatcher */
- ldr r6, [r5]
+ ldr r6, [r4, #CI_INTR_DEPTH]
add r1, r6, #1
- str r1, [r5]
+ str r1, [r4, #CI_INTR_DEPTH]
bl ARM_IRQ_HANDLER
@@ -125,17 +124,10 @@
* Restore the old interrupt depth value (which should be the
* same as decrementing it at this point).
*/
- str r6, [r5]
+ str r6, [r4, #CI_INTR_DEPTH]
LOCK_CAS_CHECK
DO_AST_AND_RESTORE_ALIGNMENT_FAULTS
PULLFRAMEFROMSVCANDEXIT
movs pc, lr /* Exit */
-
- .bss
- .align 0
-
- .global _C_LABEL(astpending)
-_C_LABEL(astpending):
- .word 0
Index: src/sys/arch/arm/arm32/kobj_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm32/kobj_machdep.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- src/sys/arch/arm/arm32/kobj_machdep.c 4 Jan 2008 16:23:39 -0000
1.1
+++ src/sys/arch/arm/arm32/kobj_machdep.c 28 Apr 2008 20:23:13 -0000
1.2
@@ -1,4 +1,4 @@
-/* $NetBSD: kobj_machdep.c,v 1.1 2008/01/04 16:23:39 ad Exp $ */
+/* $NetBSD: kobj_machdep.c,v 1.2 2008/04/28 20:23:13 martin Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
@@ -12,13 +12,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -59,7 +52,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: kobj_machdep.c,v 1.1 2008/01/04 16:23:39 ad Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: kobj_machdep.c,v 1.2 2008/04/28 20:23:13 martin
Exp $");
#define ELFSIZE ARCH_ELFSIZE
Index: src/sys/arch/arm/arm32/locore.S
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm32/locore.S,v
retrieving revision 1.22
retrieving revision 1.23
diff -u -r1.22 -r1.23
--- src/sys/arch/arm/arm32/locore.S 19 Jan 2008 13:11:09 -0000 1.22
+++ src/sys/arch/arm/arm32/locore.S 27 Apr 2008 18:58:44 -0000 1.23
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.22 2008/01/19 13:11:09 chris Exp $ */
+/* $NetBSD: locore.S,v 1.23 2008/04/27 18:58:44 matt Exp $ */
/*
* Copyright (C) 1994-1997 Mark Brinicombe
@@ -42,6 +42,8 @@
/* What size should this really be ? It is only used by init_arm() */
#define INIT_ARM_STACK_SIZE 2048
+ RCSID("$NetBSD: locore.S,v 1.23 2008/04/27 18:58:44 matt Exp $")
+
/*
* This is for kvm_mkdb, and should be the address of the beginning
* of the kernel text segment (not necessarily the same as kernbase).
Index: src/sys/arch/arm/arm32/pmap.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm32/pmap.c,v
retrieving revision 1.173
retrieving revision 1.175
diff -u -r1.173 -r1.175
--- src/sys/arch/arm/arm32/pmap.c 20 Apr 2008 15:42:19 -0000 1.173
+++ src/sys/arch/arm/arm32/pmap.c 28 Apr 2008 20:23:13 -0000 1.175
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.173 2008/04/20 15:42:19 scw Exp $ */
+/* $NetBSD: pmap.c,v 1.175 2008/04/28 20:23:13 martin Exp $ */
/*
* Copyright 2003 Wasabi Systems, Inc.
@@ -78,13 +78,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -140,6 +133,11 @@
*/
/*
+ * armv6 and VIPT cache support by 3am Software Foundry,
+ * Copyright (c) 2007 Microsoft
+ */
+
+/*
* Performance improvements, UVM changes, overhauls and part-rewrites
* were contributed by Neil A. Carson <neil%causality.com@localhost>.
*/
@@ -213,7 +211,7 @@
#include <machine/param.h>
#include <arm/arm32/katelib.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.173 2008/04/20 15:42:19 scw Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.175 2008/04/28 20:23:13 martin Exp $");
#ifdef PMAP_DEBUG
@@ -241,6 +239,7 @@
#define PDB_VAC 0x10000
#define PDB_KENTER 0x20000
#define PDB_KREMOVE 0x40000
+#define PDB_EXEC 0x80000
int debugmap = 1;
int pmapdebug = 0;
@@ -304,6 +303,134 @@
static vaddr_t pmap_kernel_l2ptp_kva;
static paddr_t pmap_kernel_l2ptp_phys;
+#ifdef PMAPCOUNT
+#define PMAP_EVCNT_INITIALIZER(name) \
+ EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "pmap", name)
+
+#ifdef PMAP_CACHE_VIPT
+static struct evcnt pmap_ev_vac_color_new =
+ PMAP_EVCNT_INITIALIZER("new page color");
+static struct evcnt pmap_ev_vac_color_reuse =
+ PMAP_EVCNT_INITIALIZER("ok first page color");
+static struct evcnt pmap_ev_vac_color_ok =
+ PMAP_EVCNT_INITIALIZER("ok page color");
+static struct evcnt pmap_ev_vac_color_change =
+ PMAP_EVCNT_INITIALIZER("change page color");
+static struct evcnt pmap_ev_vac_color_erase =
+ PMAP_EVCNT_INITIALIZER("erase page color");
+static struct evcnt pmap_ev_vac_color_none =
+ PMAP_EVCNT_INITIALIZER("no page color");
+static struct evcnt pmap_ev_vac_color_restore =
+ PMAP_EVCNT_INITIALIZER("restore page color");
+
+EVCNT_ATTACH_STATIC(pmap_ev_vac_color_new);
+EVCNT_ATTACH_STATIC(pmap_ev_vac_color_reuse);
+EVCNT_ATTACH_STATIC(pmap_ev_vac_color_ok);
+EVCNT_ATTACH_STATIC(pmap_ev_vac_color_change);
+EVCNT_ATTACH_STATIC(pmap_ev_vac_color_erase);
+EVCNT_ATTACH_STATIC(pmap_ev_vac_color_none);
+EVCNT_ATTACH_STATIC(pmap_ev_vac_color_restore);
+#endif
+
+static struct evcnt pmap_ev_mappings =
+ PMAP_EVCNT_INITIALIZER("pages mapped");
+static struct evcnt pmap_ev_unmappings =
+ PMAP_EVCNT_INITIALIZER("pages unmapped");
+static struct evcnt pmap_ev_remappings =
+ PMAP_EVCNT_INITIALIZER("pages remapped");
+
+EVCNT_ATTACH_STATIC(pmap_ev_mappings);
+EVCNT_ATTACH_STATIC(pmap_ev_unmappings);
+EVCNT_ATTACH_STATIC(pmap_ev_remappings);
+
+static struct evcnt pmap_ev_kernel_mappings =
+ PMAP_EVCNT_INITIALIZER("kernel pages mapped");
+static struct evcnt pmap_ev_kernel_unmappings =
+ PMAP_EVCNT_INITIALIZER("kernel pages unmapped");
+static struct evcnt pmap_ev_kernel_remappings =
+ PMAP_EVCNT_INITIALIZER("kernel pages remapped");
+
+EVCNT_ATTACH_STATIC(pmap_ev_kernel_mappings);
+EVCNT_ATTACH_STATIC(pmap_ev_kernel_unmappings);
+EVCNT_ATTACH_STATIC(pmap_ev_kernel_remappings);
+
+static struct evcnt pmap_ev_kenter_mappings =
+ PMAP_EVCNT_INITIALIZER("kenter pages mapped");
+static struct evcnt pmap_ev_kenter_unmappings =
+ PMAP_EVCNT_INITIALIZER("kenter pages unmapped");
+static struct evcnt pmap_ev_kenter_remappings =
+ PMAP_EVCNT_INITIALIZER("kenter pages remapped");
+static struct evcnt pmap_ev_pt_mappings =
+ PMAP_EVCNT_INITIALIZER("page table pages mapped");
+
+EVCNT_ATTACH_STATIC(pmap_ev_kenter_mappings);
+EVCNT_ATTACH_STATIC(pmap_ev_kenter_unmappings);
+EVCNT_ATTACH_STATIC(pmap_ev_kenter_remappings);
+EVCNT_ATTACH_STATIC(pmap_ev_pt_mappings);
+
+#ifdef PMAP_CACHE_VIPT
+static struct evcnt pmap_ev_exec_mappings =
+ PMAP_EVCNT_INITIALIZER("exec pages mapped");
+static struct evcnt pmap_ev_exec_cached =
+ PMAP_EVCNT_INITIALIZER("exec pages cached");
+
+EVCNT_ATTACH_STATIC(pmap_ev_exec_mappings);
+EVCNT_ATTACH_STATIC(pmap_ev_exec_cached);
+
+static struct evcnt pmap_ev_exec_synced =
+ PMAP_EVCNT_INITIALIZER("exec pages synced");
+static struct evcnt pmap_ev_exec_synced_map =
+ PMAP_EVCNT_INITIALIZER("exec pages synced (MP)");
+static struct evcnt pmap_ev_exec_synced_unmap =
+ PMAP_EVCNT_INITIALIZER("exec pages synced (UM)");
+static struct evcnt pmap_ev_exec_synced_remap =
+ PMAP_EVCNT_INITIALIZER("exec pages synced (RM)");
+static struct evcnt pmap_ev_exec_synced_clearbit =
+ PMAP_EVCNT_INITIALIZER("exec pages synced (DG)");
+static struct evcnt pmap_ev_exec_synced_kremove =
+ PMAP_EVCNT_INITIALIZER("exec pages synced (KU)");
+
+EVCNT_ATTACH_STATIC(pmap_ev_exec_synced);
+EVCNT_ATTACH_STATIC(pmap_ev_exec_synced_map);
+EVCNT_ATTACH_STATIC(pmap_ev_exec_synced_unmap);
+EVCNT_ATTACH_STATIC(pmap_ev_exec_synced_remap);
+EVCNT_ATTACH_STATIC(pmap_ev_exec_synced_clearbit);
+EVCNT_ATTACH_STATIC(pmap_ev_exec_synced_kremove);
+
+static struct evcnt pmap_ev_exec_discarded_unmap =
+ PMAP_EVCNT_INITIALIZER("exec pages discarded (UM)");
+static struct evcnt pmap_ev_exec_discarded_zero =
+ PMAP_EVCNT_INITIALIZER("exec pages discarded (ZP)");
+static struct evcnt pmap_ev_exec_discarded_copy =
+ PMAP_EVCNT_INITIALIZER("exec pages discarded (CP)");
+static struct evcnt pmap_ev_exec_discarded_page_protect =
+ PMAP_EVCNT_INITIALIZER("exec pages discarded (PP)");
+static struct evcnt pmap_ev_exec_discarded_clearbit =
+ PMAP_EVCNT_INITIALIZER("exec pages discarded (DG)");
+static struct evcnt pmap_ev_exec_discarded_kremove =
+ PMAP_EVCNT_INITIALIZER("exec pages discarded (KU)");
+
+EVCNT_ATTACH_STATIC(pmap_ev_exec_discarded_unmap);
+EVCNT_ATTACH_STATIC(pmap_ev_exec_discarded_zero);
+EVCNT_ATTACH_STATIC(pmap_ev_exec_discarded_copy);
+EVCNT_ATTACH_STATIC(pmap_ev_exec_discarded_page_protect);
+EVCNT_ATTACH_STATIC(pmap_ev_exec_discarded_clearbit);
+EVCNT_ATTACH_STATIC(pmap_ev_exec_discarded_kremove);
+#endif /* PMAP_CACHE_VIPT */
+
+static struct evcnt pmap_ev_updates = PMAP_EVCNT_INITIALIZER("updates");
+static struct evcnt pmap_ev_collects = PMAP_EVCNT_INITIALIZER("collects");
+static struct evcnt pmap_ev_activations =
PMAP_EVCNT_INITIALIZER("activations");
+
+EVCNT_ATTACH_STATIC(pmap_ev_updates);
+EVCNT_ATTACH_STATIC(pmap_ev_collects);
+EVCNT_ATTACH_STATIC(pmap_ev_activations);
+
+#define PMAPCOUNT(x) ((void)(pmap_ev_##x.ev_count++))
+#else
+#define PMAPCOUNT(x) ((void)0)
+#endif
+
/*
* pmap copy/zero page, and mem(5) hook point
*/
@@ -474,6 +601,7 @@
* instruction cache and/or TLB
*/
#define PV_BEEN_EXECD(f) (((f) & (PVF_REF | PVF_EXEC)) == (PVF_REF |
PVF_EXEC))
+#define PV_IS_EXEC_P(f) (((f) & PVF_EXEC) != 0)
/*
* Macro to determine if a mapping might be resident in the
@@ -510,11 +638,19 @@
static int pmap_l2dtable_ctor(void *, void *, int);
static void pmap_vac_me_harder(struct vm_page *, pmap_t, vaddr_t);
+#ifdef PMAP_CACHE_VIVT
static void pmap_vac_me_kpmap(struct vm_page *, pmap_t, vaddr_t);
static void pmap_vac_me_user(struct vm_page *, pmap_t, vaddr_t);
+#endif
static void pmap_clearbit(struct vm_page *, u_int);
+#ifdef PMAP_CACHE_VIVT
static int pmap_clean_page(struct pv_entry *, bool);
+#endif
+#ifdef PMAP_CACHE_VIPT
+static void pmap_syncicache_page(struct vm_page *);
+static void pmap_flush_page(struct vm_page *);
+#endif
static void pmap_page_remove(struct vm_page *);
static void pmap_init_l1(struct l1_ttable *, pd_entry_t *);
@@ -537,7 +673,10 @@
vaddr_t avail_start;
vaddr_t avail_end;
-extern pv_addr_t systempage;
+pv_addrqh_t pmap_boot_freeq = SLIST_HEAD_INITIALIZER(&pmap_boot_freeq);
+pv_addr_t kernelpages;
+pv_addr_t kernel_l1pt;
+pv_addr_t systempage;
/* Function to set the debug level of the pmap code */
@@ -591,12 +730,13 @@
}
}
+#ifdef PMAP_CACHE_VIVT
static inline void
pmap_idcache_wbinv_range(pmap_t pm, vaddr_t va, vsize_t len)
{
-
- if (pm->pm_cstate.cs_cache_id)
+ if (pm->pm_cstate.cs_cache_id) {
cpu_idcache_wbinv_range(va, len);
+ }
}
static inline void
@@ -619,7 +759,6 @@
static inline void
pmap_idcache_wbinv_all(pmap_t pm)
{
-
if (pm->pm_cstate.cs_cache_id) {
cpu_idcache_wbinv_all();
pm->pm_cstate.cs_cache = 0;
@@ -629,12 +768,12 @@
static inline void
pmap_dcache_wbinv_all(pmap_t pm)
{
-
if (pm->pm_cstate.cs_cache_d) {
cpu_dcache_wbinv_all();
pm->pm_cstate.cs_cache_d = 0;
}
}
+#endif /* PMAP_CACHE_VIVT */
static inline bool
pmap_is_current(pmap_t pm)
@@ -642,9 +781,9 @@
if (pm == pmap_kernel() ||
(curproc && curproc->p_vmspace->vm_map.pmap == pm))
- return (true);
+ return true;
- return (false);
+ return false;
}
static inline bool
@@ -655,7 +794,7 @@
pmap_recent_user == pm)
return (true);
- return (false);
+ return false;
}
/*
@@ -713,6 +852,7 @@
pg->mdpage.pvh_list = pve; /* ... locked list */
pg->mdpage.pvh_attrs |= flags & (PVF_REF | PVF_MOD);
if (pm == pmap_kernel()) {
+ PMAPCOUNT(kernel_mappings);
if (flags & PVF_WRITE)
pg->mdpage.krw_mappings++;
else
@@ -722,6 +862,22 @@
pg->mdpage.urw_mappings++;
else
pg->mdpage.uro_mappings++;
+
+#ifdef PMAP_CACHE_VIPT
+ /*
+ * If this is an exec mapping and its the first exec mapping
+ * for this page, make sure to sync the I-cache.
+ */
+ if (PV_IS_EXEC_P(flags)) {
+ if (!PV_IS_EXEC_P(pg->mdpage.pvh_attrs)) {
+ pmap_syncicache_page(pg);
+ PMAPCOUNT(exec_synced_map);
+ }
+ PMAPCOUNT(exec_mappings);
+ }
+#endif
+
+ PMAPCOUNT(mappings);
simple_unlock(&pg->mdpage.pvh_slock); /* unlock, done! */
if (pve->pv_flags & PVF_WIRED)
@@ -779,6 +935,7 @@
}
*prevptr = pve->pv_next; /* remove it! */
if (pm == pmap_kernel()) {
+ PMAPCOUNT(kernel_unmappings);
if (pve->pv_flags & PVF_WRITE)
pg->mdpage.krw_mappings--;
else
@@ -788,6 +945,26 @@
pg->mdpage.urw_mappings--;
else
pg->mdpage.uro_mappings--;
+
+ PMAPCOUNT(unmappings);
+#ifdef PMAP_CACHE_VIPT
+ if (!(pve->pv_flags & PVF_WRITE))
+ break;
+ /*
+ * If this page has had an exec mapping, then if
+ * this was the last mapping, discard the contents,
+ * otherwise sync the i-cache for this page.
+ */
+ if (PV_IS_EXEC_P(pg->mdpage.pvh_attrs)) {
+ if (pg->mdpage.pvh_list == NULL) {
+ pg->mdpage.pvh_attrs &= ~PVF_EXEC;
+ PMAPCOUNT(exec_discarded_unmap);
+ } else {
+ pmap_syncicache_page(pg);
+ PMAPCOUNT(exec_synced_unmap);
+ }
+ }
+#endif /* PMAP_CACHE_VIPT */
break;
}
prevptr = &pve->pv_next; /* previous pointer */
@@ -857,6 +1034,22 @@
pg->mdpage.urw_mappings--;
}
}
+#ifdef PMAP_CACHE_VIPT
+ /*
+ * We have two cases here: the first is from enter_pv (new exec
+ * page), the second is a combined pmap_remove_pv/pmap_enter_pv.
+ * Since in latter, pmap_enter_pv won't do anything, we just have
+ * to do what pmap_remove_pv would do.
+ */
+ if ((PV_IS_EXEC_P(flags) && !PV_IS_EXEC_P(pg->mdpage.pvh_attrs))
+ || (PV_IS_EXEC_P(pg->mdpage.pvh_attrs)
+ || (!(flags & PVF_WRITE) && (oflags & PVF_WRITE)))) {
+ pmap_syncicache_page(pg);
+ PMAPCOUNT(exec_synced_remap);
+ }
+#endif
+
+ PMAPCOUNT(remappings);
return (oflags);
}
@@ -993,12 +1186,13 @@
#endif
{
#ifdef PMAP_INCLUDE_PTE_SYNC
+#ifdef PMAP_CACHE_VIVT
/*
* Note: With a write-back cache, we may need to sync this
* L2 table before re-using it.
* This is because it may have belonged to a non-current
* pmap, in which case the cache syncs would have been
- * skipped when the pages were being unmapped. If the
+ * skipped for the pages that were being unmapped. If the
* L2 table were then to be immediately re-allocated to
* the *current* pmap, it may well contain stale mappings
* which have not yet been cleared by a cache write-back
@@ -1006,7 +1200,8 @@
*/
if (need_sync)
PTE_SYNC_RANGE(l2, L2_TABLE_SIZE_REAL / sizeof(pt_entry_t));
-#endif
+#endif /* PMAP_CACHE_VIVT */
+#endif /* PMAP_INCLUDE_PTE_SYNC */
pool_cache_put_paddr(&pmap_l2ptp_cache, (void *)l2, pa);
}
@@ -1265,6 +1460,7 @@
pm->pm_pl1vec = NULL;
}
+#ifdef PMAP_CACHE_VIVT
/*
* Since we have a virtually indexed cache, we may need to inhibit caching if
* there is more than one mapping and at least one of them is writable.
@@ -1484,15 +1680,19 @@
if ((va != pv->pv_va || pm != pv->pv_pmap) &&
l2pte_valid(pte)) {
if (PV_BEEN_EXECD(pv->pv_flags)) {
+#ifdef PMAP_CACHE_VIVT
pmap_idcache_wbinv_range(pv->pv_pmap,
pv->pv_va, PAGE_SIZE);
+#endif
pmap_tlb_flushID_SE(pv->pv_pmap,
pv->pv_va);
} else
if (PV_BEEN_REFD(pv->pv_flags)) {
+#ifdef PMAP_CACHE_VIVT
pmap_dcache_wb_range(pv->pv_pmap,
pv->pv_va, PAGE_SIZE, true,
(pv->pv_flags & PVF_WRITE) == 0);
+#endif
pmap_tlb_flushD_SE(pv->pv_pmap,
pv->pv_va);
}
@@ -1535,6 +1735,219 @@
}
}
}
+#endif
+
+#ifdef PMAP_CACHE_VIPT
+/*
+ * For virtually indexed / physically tagged caches, what we have to worry
+ * about is illegal cache aliases. To prevent this, we must ensure that
+ * virtual addresses that map the physical page use the same bits for those
+ * bits masked by "arm_cache_prefer_mask" (bits 12+). If there is a conflict,
+ * all mappings of the page must be non-cached.
+ */
+#if 0
+static inline vaddr_t
+pmap_check_sets(paddr_t pa)
+{
+ extern int arm_dcache_l2_nsets;
+ int set, way;
+ vaddr_t mask = 0;
+ int v;
+ pa |= 1;
+ for (set = 0; set < (1 << arm_dcache_l2_nsets); set++) {
+ for (way = 0; way < 4; way++) {
+ v = (way << 30) | (set << 5);
+ asm("mcr p15, 3, %0, c15, c2, 0" :: "r"(v));
+ asm("mrc p15, 3, %0, c15, c0, 0" : "=r"(v));
+
+ if ((v & (1 | ~(PAGE_SIZE-1))) == pa) {
+ mask |= 1 << (set >> 7);
+ }
+ }
+ }
+ return mask;
+}
+#endif
+static void
+pmap_vac_me_harder(struct vm_page *pg, pmap_t pm, vaddr_t va)
+{
+ struct pv_entry *pv, pv0;
+ vaddr_t tst_mask;
+ bool bad_alias;
+ struct l2_bucket *l2b;
+ pt_entry_t *ptep, pte, opte;
+
+ /* do we need to do anything? */
+ if (arm_cache_prefer_mask == 0)
+ return;
+
+ NPDEBUG(PDB_VAC, printf("pmap_vac_me_harder: pg=%p, pmap=%p va=%08lx\n",
+ pg, pm, va));
+
+#define popc4(x) \
+ (((0x94 >> ((x & 3) << 1)) & 3) + ((0x94 >> ((x & 12) >> 1)) & 3))
+#if 0
+ tst_mask = pmap_check_sets(pg->phys_addr);
+ KASSERT(popc4(tst_mask) < 2);
+#endif
+
+ KASSERT(!va || pm || (pg->mdpage.pvh_attrs & PVF_KENTRY));
+
+ /* Already a conflict? */
+ if (__predict_false(pg->mdpage.pvh_attrs & PVF_NC)) {
+ /* just an add, things are already non-cached */
+ bad_alias = false;
+ if (va) {
+ PMAPCOUNT(vac_color_none);
+ bad_alias = true;
+ goto fixup;
+ }
+ pv = pg->mdpage.pvh_list;
+ /* the list can't be empty because it would be cachable */
+ if (pg->mdpage.pvh_attrs & PVF_KENTRY) {
+ tst_mask = pg->mdpage.pvh_attrs;
+ } else {
+ KASSERT(pv);
+ tst_mask = pv->pv_va;
+ pv = pv->pv_next;
+ }
+ tst_mask &= arm_cache_prefer_mask;
+ for (; pv && !bad_alias; pv = pv->pv_next) {
+ /* if there's a bad alias, stop checking. */
+ if (tst_mask != (pv->pv_va & arm_cache_prefer_mask))
+ bad_alias = true;
+ }
+ /* If no conflicting colors, set everything back to cached */
+ if (!bad_alias) {
+ PMAPCOUNT(vac_color_restore);
+ pg->mdpage.pvh_attrs |= PVF_COLORED;
+ if (!(pg->mdpage.pvh_attrs & PVF_KENTRY)) {
+ pg->mdpage.pvh_attrs &= PAGE_SIZE - 1;
+ pg->mdpage.pvh_attrs |= tst_mask;
+ }
+ pg->mdpage.pvh_attrs &= ~PVF_NC;
+ } else {
+ KASSERT(pg->mdpage.pvh_list != NULL);
+ KASSERT((pg->mdpage.pvh_attrs & PVF_KENTRY)
+ || pg->mdpage.pvh_list->pv_next != NULL);
+ }
+ } else if (!va) {
+ KASSERT(pmap_is_page_colored_p(pg));
+ if (pm == NULL)
+ pg->mdpage.pvh_attrs &=
+ (PAGE_SIZE - 1) | arm_cache_prefer_mask;
+ return;
+ } else if (!pmap_is_page_colored_p(pg)) {
+ /* not colored so we just use its color */
+ PMAPCOUNT(vac_color_new);
+ pg->mdpage.pvh_attrs &= PAGE_SIZE - 1;
+ if (pm == NULL)
+ pg->mdpage.pvh_attrs |= PVF_COLORED | va;
+ else
+ pg->mdpage.pvh_attrs |= PVF_COLORED
+ | (va & arm_cache_prefer_mask);
+ return;
+ } else if (!((pg->mdpage.pvh_attrs ^ va) & arm_cache_prefer_mask)) {
+ if (pm == NULL) {
+ pg->mdpage.pvh_attrs &= PAGE_SIZE - 1;
+ pg->mdpage.pvh_attrs |= va;
+ }
+ if (pg->mdpage.pvh_list)
+ PMAPCOUNT(vac_color_reuse);
+ else
+ PMAPCOUNT(vac_color_ok);
+ /* matching color, just return */
+ return;
+ } else {
+ /* color conflict. evict from cache. */
+ pmap_flush_page(pg);
+
+ /* the list can't be empty because this was a enter/modify */
+ pv = pg->mdpage.pvh_list;
+ KASSERT((pg->mdpage.pvh_attrs & PVF_KENTRY) || pv);
+
+ /*
+ * If there's only one mapped page, change color to the
+ * page's new color and return.
+ */
+ if (((pg->mdpage.pvh_attrs & PVF_KENTRY)
+ ? pv : pv->pv_next) == NULL) {
+ PMAPCOUNT(vac_color_change);
+ pg->mdpage.pvh_attrs &= PAGE_SIZE - 1;
+ if (pm == NULL)
+ pg->mdpage.pvh_attrs |= va;
+ else
+ pg->mdpage.pvh_attrs |=
+ (va & arm_cache_prefer_mask);
+ return;
+ }
+ bad_alias = true;
+ pg->mdpage.pvh_attrs &= ~PVF_COLORED;
+ pg->mdpage.pvh_attrs |= PVF_NC;
+ PMAPCOUNT(vac_color_erase);
+ }
+
+ fixup:
+ /*
+ * If the pmap is NULL, then we got called from pmap_kenter_pa
+ * and we must save the kenter'ed va. And this changes the
+ * color to match the kenter'ed page. if this is a remove clear
+ * saved va bits which retaining the color bits.
+ */
+ if (pm == NULL) {
+ if (va) {
+ pg->mdpage.pvh_attrs &= (PAGE_SIZE - 1);
+ pg->mdpage.pvh_attrs |= va;
+ } else {
+ pg->mdpage.pvh_attrs &=
+ ((PAGE_SIZE - 1) | arm_cache_prefer_mask);
+ }
+ }
+
+ pv = pg->mdpage.pvh_list;
+
+ /*
+ * If this page has an kenter'ed mapping, fake up a pv entry.
+ */
+ if (__predict_false(pg->mdpage.pvh_attrs & PVF_KENTRY)) {
+ pv0.pv_pmap = pmap_kernel();
+ pv0.pv_va = pg->mdpage.pvh_attrs & ~(PAGE_SIZE - 1);
+ pv0.pv_next = pv;
+ pv0.pv_flags = PVF_REF;
+ pv = &pv0;
+ }
+
+ /*
+ * Turn cacheing on/off for all pages.
+ */
+ for (; pv; pv = pv->pv_next) {
+ l2b = pmap_get_l2_bucket(pv->pv_pmap, pv->pv_va);
+ ptep = &l2b->l2b_kva[l2pte_index(pv->pv_va)];
+ opte = *ptep;
+ pte = opte & ~L2_S_CACHE_MASK;
+ if (bad_alias) {
+ pv->pv_flags |= PVF_NC;
+ } else {
+ pv->pv_flags &= ~PVF_NC;
+ pte |= pte_l2_s_cache_mode;
+ }
+ if (opte == pte) /* only update is there's a change */
+ continue;
+
+ if (l2pte_valid(pte)) {
+ if (PV_BEEN_EXECD(pv->pv_flags)) {
+ pmap_tlb_flushID_SE(pv->pv_pmap, pv->pv_va);
+ } else if (PV_BEEN_REFD(pv->pv_flags)) {
+ pmap_tlb_flushD_SE(pv->pv_pmap, pv->pv_va);
+ }
+ }
+
+ *ptep = pte;
+ PTE_SYNC_CURRENT(pv->pv_pmap, ptep);
+ }
+}
+#endif /* PMAP_CACHE_VIPT */
+
/*
* Modify pte bits for all ptes corresponding to the given physical address.
@@ -1550,6 +1963,11 @@
pmap_t pm;
vaddr_t va;
u_int oflags;
+#ifdef PMAP_CACHE_VIPT
+ const bool want_syncicache = PV_IS_EXEC_P(pg->mdpage.pvh_attrs);
+ bool need_syncicache = false;
+ bool did_syncicache = false;
+#endif
NPDEBUG(PDB_BITS,
printf("pmap_clearbit: pg %p (0x%08lx) mask 0x%x\n",
@@ -1558,12 +1976,30 @@
PMAP_HEAD_TO_MAP_LOCK();
simple_lock(&pg->mdpage.pvh_slock);
+#ifdef PMAP_CACHE_VIPT
+ /*
+ * If we might want to sync the I-cache and we've modified it,
+ * then we know we definitely need to sync or discard it.
+ */
+ if (want_syncicache)
+ need_syncicache = pg->mdpage.pvh_attrs & PVF_MOD;
+#endif
/*
* Clear saved attributes (modify, reference)
*/
pg->mdpage.pvh_attrs &= ~(maskbits & (PVF_MOD | PVF_REF));
if (pg->mdpage.pvh_list == NULL) {
+#ifdef PMAP_CACHE_VIPT
+ if (need_syncicache) {
+ /*
+ * No one has it mapped, so just discard it. The next
+ * exec remapping will cause it to be synced.
+ */
+ pg->mdpage.pvh_attrs &= ~PVF_EXEC;
+ PMAPCOUNT(exec_discarded_clearbit);
+ }
+#endif
simple_unlock(&pg->mdpage.pvh_slock);
PMAP_HEAD_TO_MAP_UNLOCK();
return;
@@ -1592,6 +2028,7 @@
pv, pv->pv_pmap, pv->pv_va, oflags));
if (maskbits & (PVF_WRITE|PVF_MOD)) {
+#ifdef PMAP_CACHE_VIVT
if ((pv->pv_flags & PVF_NC)) {
/*
* Entry is not cacheable:
@@ -1624,61 +2061,53 @@
if (PV_BEEN_REFD(oflags))
pmap_dcache_wb_range(pm, pv->pv_va,
PAGE_SIZE,
- (maskbits & PVF_REF) ? true : false,
- false);
+ (maskbits & PVF_REF) != 0, false);
}
+#endif
/* make the pte read only */
npte &= ~L2_S_PROT_W;
- if (maskbits & PVF_WRITE) {
+ if (maskbits & oflags & PVF_WRITE) {
/*
* Keep alias accounting up to date
*/
if (pv->pv_pmap == pmap_kernel()) {
- if (oflags & PVF_WRITE) {
- pg->mdpage.krw_mappings--;
- pg->mdpage.kro_mappings++;
- }
- } else
- if (oflags & PVF_WRITE) {
+ pg->mdpage.krw_mappings--;
+ pg->mdpage.kro_mappings++;
+ } else {
pg->mdpage.urw_mappings--;
pg->mdpage.uro_mappings++;
}
+#ifdef PMAP_CACHE_VIPT
+ if (want_syncicache)
+ need_syncicache = true;
+#endif
}
}
if (maskbits & PVF_REF) {
+#ifdef PMAP_CACHE_VIVT
if ((pv->pv_flags & PVF_NC) == 0 &&
- (maskbits & (PVF_WRITE|PVF_MOD)) == 0) {
+ (maskbits & (PVF_WRITE|PVF_MOD)) == 0 &&
+ l2pte_valid(npte)) {
/*
* Check npte here; we may have already
* done the wbinv above, and the validity
* of the PTE is the same for opte and
* npte.
*/
- if (npte & L2_S_PROT_W) {
- if (PV_BEEN_EXECD(oflags))
- pmap_idcache_wbinv_range(pm,
- pv->pv_va, PAGE_SIZE);
- else
- if (PV_BEEN_REFD(oflags))
- pmap_dcache_wb_range(pm,
- pv->pv_va, PAGE_SIZE,
- true, false);
- } else
- if ((npte & L2_TYPE_MASK) != L2_TYPE_INV) {
- /* XXXJRT need idcache_inv_range */
- if (PV_BEEN_EXECD(oflags))
- pmap_idcache_wbinv_range(pm,
- pv->pv_va, PAGE_SIZE);
- else
- if (PV_BEEN_REFD(oflags))
- pmap_dcache_wb_range(pm,
- pv->pv_va, PAGE_SIZE,
- true, true);
- }
+ /* XXXJRT need idcache_inv_range */
+ if (PV_BEEN_EXECD(oflags))
+ pmap_idcache_wbinv_range(pm,
+ pv->pv_va, PAGE_SIZE);
+ else
+ if (PV_BEEN_REFD(oflags))
+ pmap_dcache_wb_range(pm,
+ pv->pv_va, PAGE_SIZE,
+ true, true);
}
+#endif
/*
* Make the PTE invalid so that we will take a
@@ -1707,6 +2136,16 @@
pm, va, opte, npte));
}
+#ifdef PMAP_CACHE_VIPT
+ /*
+ * If we need to sync the I-cache and we haven't done it yet, do it.
+ */
+ if (need_syncicache && !did_syncicache) {
+ pmap_syncicache_page(pg);
+ PMAPCOUNT(exec_synced_clearbit);
+ }
+#endif
+
simple_unlock(&pg->mdpage.pvh_slock);
PMAP_HEAD_TO_MAP_UNLOCK();
}
@@ -1731,6 +2170,7 @@
* just the 1 page. Since this should not occur in everyday use and if it does
* it will just result in not the most efficient clean for the page.
*/
+#ifdef PMAP_CACHE_VIVT
static int
pmap_clean_page(struct pv_entry *pv, bool is_src)
{
@@ -1798,6 +2238,100 @@
}
return (0);
}
+#endif
+
+#ifdef PMAP_CACHE_VIPT
+/*
+ * Sync a page with the I-cache. Since this is a VIPT, we must pick the
+ * right cache alias to make sure we flush the right stuff.
+ */
+void
+pmap_syncicache_page(struct vm_page *pg)
+{
+ const vsize_t va_offset = pg->mdpage.pvh_attrs & arm_cache_prefer_mask;
+ pt_entry_t * const ptep = &cdst_pte[va_offset >> PGSHIFT];
+
+ NPDEBUG(PDB_EXEC, printf("pmap_syncicache_page: pg=%p (attrs=%#x)\n",
+ pg, pg->mdpage.pvh_attrs));
+ /*
+ * No need to clean the page if it's non-cached.
+ */
+ if (pg->mdpage.pvh_attrs & PVF_NC)
+ return;
+ KASSERT(pg->mdpage.pvh_attrs & PVF_COLORED);
+
+ pmap_tlb_flushID_SE(pmap_kernel(), cdstp + va_offset);
+ /*
+ * Set up a PTE with the right coloring to flush existing cache lines.
+ */
+ *ptep = L2_S_PROTO |
+ VM_PAGE_TO_PHYS(pg)
+ | L2_S_PROT(PTE_KERNEL, VM_PROT_READ|VM_PROT_WRITE)
+ | pte_l2_s_cache_mode;
+ PTE_SYNC(ptep);
+
+ /*
+ * Flush it.
+ */
+ cpu_icache_sync_range(cdstp + va_offset, PAGE_SIZE);
+ /*
+ * Unmap the page.
+ */
+ *ptep = 0;
+ PTE_SYNC(ptep);
+ pmap_tlb_flushID_SE(pmap_kernel(), cdstp + va_offset);
+
+ pg->mdpage.pvh_attrs |= PVF_EXEC;
+ PMAPCOUNT(exec_synced);
+}
+
+void
+pmap_flush_page(struct vm_page *pg)
+{
+ const vsize_t va_offset = pg->mdpage.pvh_attrs & arm_cache_prefer_mask;
+ const size_t pte_offset = va_offset >> PGSHIFT;
+ pt_entry_t * const ptep = &cdst_pte[pte_offset];
+ const pt_entry_t oldpte = *ptep;
+#if 0
+ vaddr_t mask;
+#endif
+
+ KASSERT(!(pg->mdpage.pvh_attrs & PVF_NC));
+#if 0
+ mask = pmap_check_sets(pg->phys_addr);
+ KASSERT(popc4(mask) < 2);
+#endif
+
+ NPDEBUG(PDB_VAC, printf("pmap_flush_page: pg=%p (attrs=%#x)\n",
+ pg, pg->mdpage.pvh_attrs));
+ pmap_tlb_flushID_SE(pmap_kernel(), cdstp + va_offset);
+ /*
+ * Set up a PTE with the right coloring to flush existing cache entries.
+ */
+ *ptep = L2_S_PROTO
+ | VM_PAGE_TO_PHYS(pg)
+ | L2_S_PROT(PTE_KERNEL, VM_PROT_READ|VM_PROT_WRITE)
+ | pte_l2_s_cache_mode;
+ PTE_SYNC(ptep);
+
+ /*
+ * Flush it.
+ */
+ cpu_idcache_wbinv_range(cdstp + va_offset, PAGE_SIZE);
+
+ /*
+ * Restore the page table entry since we might have interrupted
+ * pmap_zero_page or pmap_copy_page which was already using this pte.
+ */
+ *ptep = oldpte;
+ PTE_SYNC(ptep);
+ pmap_tlb_flushID_SE(pmap_kernel(), cdstp + va_offset);
+#if 0
+ mask = pmap_check_sets(pg->phys_addr);
+ KASSERT(mask == 0);
+#endif
+}
+#endif /* PMAP_CACHE_VIPT */
/*
* Routine: pmap_page_remove
@@ -1825,10 +2359,22 @@
pv = pg->mdpage.pvh_list;
if (pv == NULL) {
+#ifdef PMAP_CACHE_VIPT
+ /*
+ * We *know* the page contents are about to be replaced.
+ * Discard the exec contents
+ */
+ if (PV_IS_EXEC_P(pg->mdpage.pvh_attrs))
+ PMAPCOUNT(exec_discarded_page_protect);
+ pg->mdpage.pvh_attrs &= ~PVF_EXEC;
+#endif
simple_unlock(&pg->mdpage.pvh_slock);
PMAP_HEAD_TO_MAP_UNLOCK();
return;
}
+#ifdef PMAP_CACHE_VIPT
+ KASSERT(pmap_is_page_colored_p(pg));
+#endif
/*
* Clear alias counts
@@ -1843,13 +2389,19 @@
else
curpm = pmap_kernel();
+#ifdef PMAP_CACHE_VIVT
pmap_clean_page(pv, false);
+#endif
while (pv) {
pm = pv->pv_pmap;
if (flush == false && (pm == curpm || pm == pmap_kernel()))
flush = true;
+ if (pm == pmap_kernel())
+ PMAPCOUNT(kernel_unmappings);
+ PMAPCOUNT(unmappings);
+
pmap_acquire_pmap_lock(pm);
l2b = pmap_get_l2_bucket(pm, pv->pv_va);
@@ -1879,9 +2431,25 @@
npv = pv->pv_next;
pool_put(&pmap_pv_pool, pv);
pv = npv;
+ if (pv == NULL) {
+ pg->mdpage.pvh_list = NULL;
+ if (pg->mdpage.pvh_attrs & PVF_KENTRY)
+ pmap_vac_me_harder(pg, pm, 0);
+ }
pmap_release_pmap_lock(pm);
}
+#ifdef PMAP_CACHE_VIPT
+ /*
+ * Since there are now no mappings, there isn't reason to mark it
+ * as uncached. Its EXEC cache is also gone.
+ */
+ if (PV_IS_EXEC_P(pg->mdpage.pvh_attrs))
+ PMAPCOUNT(exec_discarded_page_protect);
+ pg->mdpage.pvh_attrs &= ~(PVF_NC|PVF_EXEC);
+#endif
+#ifdef PMAP_CACHE_VIVT
pg->mdpage.pvh_list = NULL;
+#endif
simple_unlock(&pg->mdpage.pvh_slock);
PMAP_HEAD_TO_MAP_UNLOCK();
@@ -2057,6 +2625,7 @@
PVF_MOD | PVF_REF, nflags);
simple_unlock(&pg->mdpage.pvh_slock);
+#ifdef PMAP_CACHE_VIVT
/*
* We may need to flush the cache if we're
* doing rw-ro...
@@ -2066,6 +2635,7 @@
(opte & L2_S_PROT_W) != 0 &&
(prot & VM_PROT_WRITE) == 0)
cpu_dcache_wb_range(va, PAGE_SIZE);
+#endif
} else {
/*
* New mapping, or changing the backing page
@@ -2083,6 +2653,7 @@
simple_unlock(&opg->mdpage.pvh_slock);
oflags = pve->pv_flags;
+#ifdef PMAP_CACHE_VIVT
/*
* If the old mapping was valid (ref/mod
* emulation creates 'invalid' mappings
@@ -2101,6 +2672,7 @@
(oflags & PVF_WRITE) == 0);
}
}
+#endif
} else
if ((pve = pool_get(&pmap_pv_pool, PR_NOWAIT)) == NULL){
if ((flags & PMAP_CANFAIL) == 0)
@@ -2144,6 +2716,7 @@
simple_unlock(&opg->mdpage.pvh_slock);
oflags = pve->pv_flags;
+#ifdef PMAP_CACHE_VIVT
if ((oflags & PVF_NC) == 0 && l2pte_valid(opte)) {
if (PV_BEEN_EXECD(oflags))
pmap_idcache_wbinv_range(pm, va,
@@ -2153,6 +2726,7 @@
pmap_dcache_wb_range(pm, va, PAGE_SIZE,
true, (oflags & PVF_WRITE) == 0);
}
+#endif
pool_put(&pmap_pv_pool, pve);
}
}
@@ -2261,7 +2835,7 @@
u_int cleanlist_idx, total, cnt;
struct {
vaddr_t va;
- pt_entry_t *pte;
+ pt_entry_t *ptep;
} cleanlist[PMAP_REMOVE_CLEAN_LIST_SIZE];
u_int mappings, is_exec, is_refd;
@@ -2360,14 +2934,16 @@
if (cleanlist_idx < PMAP_REMOVE_CLEAN_LIST_SIZE) {
/* Add to the clean list. */
- cleanlist[cleanlist_idx].pte = ptep;
+ cleanlist[cleanlist_idx].ptep = ptep;
cleanlist[cleanlist_idx].va =
sva | (is_exec & 1);
cleanlist_idx++;
} else
if (cleanlist_idx == PMAP_REMOVE_CLEAN_LIST_SIZE) {
/* Nuke everything if needed. */
+#ifdef PMAP_CACHE_VIVT
pmap_idcache_wbinv_all(pm);
+#endif
pmap_tlb_flushID(pm);
/*
@@ -2376,7 +2952,7 @@
*/
for (cnt = 0;
cnt < PMAP_REMOVE_CLEAN_LIST_SIZE; cnt++) {
- *cleanlist[cnt].pte = 0;
+ *cleanlist[cnt].ptep = 0;
}
*ptep = 0;
PTE_SYNC(ptep);
@@ -2404,18 +2980,22 @@
if (pm->pm_cstate.cs_all != 0) {
vaddr_t clva = cleanlist[cnt].va & ~1;
if (cleanlist[cnt].va & 1) {
+#ifdef PMAP_CACHE_VIVT
pmap_idcache_wbinv_range(pm,
clva, PAGE_SIZE);
+#endif
pmap_tlb_flushID_SE(pm, clva);
} else {
+#ifdef PMAP_CACHE_VIVT
pmap_dcache_wb_range(pm,
clva, PAGE_SIZE, true,
false);
+#endif
pmap_tlb_flushD_SE(pm, clva);
}
}
- *cleanlist[cnt].pte = 0;
- PTE_SYNC_CURRENT(pm, cleanlist[cnt].pte);
+ *cleanlist[cnt].ptep = 0;
+ PTE_SYNC_CURRENT(pm, cleanlist[cnt].ptep);
}
/*
@@ -2428,7 +3008,9 @@
cleanlist_idx = 0;
else {
cleanlist_idx = PMAP_REMOVE_CLEAN_LIST_SIZE + 1;
+#ifdef PMAP_CACHE_VIVT
pmap_idcache_wbinv_all(pm);
+#endif
pm->pm_remove_all = true;
}
}
@@ -2453,6 +3035,11 @@
{
struct l2_bucket *l2b;
pt_entry_t *ptep, opte;
+#ifdef PMAP_CACHE_VIPT
+ struct vm_page *pg = PHYS_TO_VM_PAGE(pa);
+ struct vm_page *opg;
+#endif
+
NPDEBUG(PDB_KENTER,
printf("pmap_kenter_pa: va 0x%08lx, pa 0x%08lx, prot 0x%x\n",
@@ -2464,17 +3051,55 @@
ptep = &l2b->l2b_kva[l2pte_index(va)];
opte = *ptep;
- if (l2pte_valid(opte)) {
- cpu_dcache_wbinv_range(va, PAGE_SIZE);
- cpu_tlb_flushD_SE(va);
- cpu_cpwait();
- } else
- if (opte == 0)
+ if (opte == 0) {
+ PMAPCOUNT(kenter_mappings);
l2b->l2b_occupancy++;
+ } else {
+ PMAPCOUNT(kenter_remappings);
+#ifdef PMAP_CACHE_VIPT
+ opg = PHYS_TO_VM_PAGE(l2pte_pa(opte));
+ if (opg) {
+ KASSERT(opg != pg);
+ simple_lock(&opg->mdpage.pvh_slock);
+ KASSERT(opg->mdpage.pvh_attrs & PVF_KENTRY);
+ if (PV_IS_EXEC_P(opg->mdpage.pvh_attrs)
+ && !(opg->mdpage.pvh_attrs & PVF_NC)) {
+ if (opg->mdpage.pvh_list == NULL) {
+ opg->mdpage.pvh_attrs &= ~PVF_EXEC;
+ PMAPCOUNT(exec_discarded_kremove);
+ } else {
+ pmap_syncicache_page(opg);
+ PMAPCOUNT(exec_synced_kremove);
+ }
+ }
+ KASSERT(opg->mdpage.pvh_attrs | (PVF_COLORED|PVF_NC));
+ opg->mdpage.pvh_attrs &= ~PVF_KENTRY;
+ pmap_vac_me_harder(opg, NULL, 0);
+ simple_unlock(&opg->mdpage.pvh_slock);
+ }
+#endif
+ if (l2pte_valid(opte)) {
+#ifdef PMAP_CACHE_VIVT
+ cpu_dcache_wbinv_range(va, PAGE_SIZE);
+#endif
+ cpu_tlb_flushD_SE(va);
+ cpu_cpwait();
+ }
+ }
*ptep = L2_S_PROTO | pa | L2_S_PROT(PTE_KERNEL, prot) |
pte_l2_s_cache_mode;
PTE_SYNC(ptep);
+
+#ifdef PMAP_CACHE_VIPT
+ if (pg) {
+ simple_lock(&pg->mdpage.pvh_slock);
+ KASSERT((pg->mdpage.pvh_attrs & PVF_KENTRY) == 0);
+ pg->mdpage.pvh_attrs |= PVF_KENTRY;
+ pmap_vac_me_harder(pg, NULL, va);
+ simple_unlock(&pg->mdpage.pvh_slock);
+ }
+#endif
}
void
@@ -2484,6 +3109,11 @@
pt_entry_t *ptep, *sptep, opte;
vaddr_t next_bucket, eva;
u_int mappings;
+#ifdef PMAP_CACHE_VIPT
+ struct vm_page *opg;
+#endif
+
+ PMAPCOUNT(kenter_unmappings);
NPDEBUG(PDB_KREMOVE, printf("pmap_kremove: va 0x%08lx, len 0x%08lx\n",
va, len));
@@ -2503,8 +3133,32 @@
while (va < next_bucket) {
opte = *ptep;
+#ifdef PMAP_CACHE_VIPT
+ opg = PHYS_TO_VM_PAGE(l2pte_pa(opte));
+ if (opg) {
+ simple_lock(&opg->mdpage.pvh_slock);
+ KASSERT(opg->mdpage.pvh_attrs & PVF_KENTRY);
+ if (PV_IS_EXEC_P(opg->mdpage.pvh_attrs)
+ && !(opg->mdpage.pvh_attrs & PVF_NC)) {
+ if (opg->mdpage.pvh_list == NULL) {
+ opg->mdpage.pvh_attrs &=
+ ~PVF_EXEC;
+
PMAPCOUNT(exec_discarded_kremove);
+ } else {
+ pmap_syncicache_page(opg);
+ PMAPCOUNT(exec_synced_kremove);
+ }
+ }
+ KASSERT(opg->mdpage.pvh_attrs |
(PVF_COLORED|PVF_NC));
+ opg->mdpage.pvh_attrs &= ~PVF_KENTRY;
+ pmap_vac_me_harder(opg, NULL, 0);
+ simple_unlock(&opg->mdpage.pvh_slock);
+ }
+#endif
if (l2pte_valid(opte)) {
+#ifdef PMAP_CACHE_VIVT
cpu_dcache_wbinv_range(va, PAGE_SIZE);
+#endif
cpu_tlb_flushD_SE(va);
}
if (opte) {
@@ -2554,7 +3208,7 @@
if (l2 == NULL ||
(ptep = l2->l2_bucket[L2_BUCKET(l1idx)].l2b_kva) == NULL) {
pmap_release_pmap_lock(pm);
- return (false);
+ return false;
}
ptep = &ptep[l2pte_index(va)];
@@ -2562,7 +3216,7 @@
pmap_release_pmap_lock(pm);
if (pte == 0)
- return (false);
+ return false;
switch (pte & L2_TYPE_MASK) {
case L2_TYPE_L:
@@ -2578,7 +3232,7 @@
if (pap != NULL)
*pap = pa;
- return (true);
+ return true;
}
void
@@ -2588,6 +3242,7 @@
pt_entry_t *ptep, pte;
vaddr_t next_bucket;
u_int flags;
+ u_int clr_mask;
int flush;
NPDEBUG(PDB_PROTECT,
@@ -2610,14 +3265,9 @@
PMAP_MAP_TO_HEAD_LOCK();
pmap_acquire_pmap_lock(pm);
- /*
- * OK, at this point, we know we're doing write-protect operation.
- * If the pmap is active, write-back the range.
- */
- pmap_dcache_wb_range(pm, sva, eva - sva, false, false);
-
flush = ((eva - sva) >= (PAGE_SIZE * 4)) ? 0 : -1;
flags = 0;
+ clr_mask = PVF_WRITE | ((prot & VM_PROT_EXECUTE) ? 0 : PVF_EXEC);
while (sva < eva) {
next_bucket = L2_NEXT_BUCKET(sva);
@@ -2633,10 +3283,21 @@
ptep = &l2b->l2b_kva[l2pte_index(sva)];
while (sva < next_bucket) {
- if ((pte = *ptep) != 0 && (pte & L2_S_PROT_W) != 0) {
+ pte = *ptep;
+ if (l2pte_valid(pte) != 0 && (pte & L2_S_PROT_W) != 0) {
struct vm_page *pg;
u_int f;
+#ifdef PMAP_CACHE_VIVT
+ /*
+ * OK, at this point, we know we're doing
+ * write-protect operation. If the pmap is
+ * active, write-back the page.
+ */
+ pmap_dcache_wb_range(pm, sva, PAGE_SIZE,
+ false, false);
+#endif
+
pg = PHYS_TO_VM_PAGE(l2pte_pa(pte));
pte &= ~L2_S_PROT_W;
*ptep = pte;
@@ -2645,7 +3306,7 @@
if (pg != NULL) {
simple_lock(&pg->mdpage.pvh_slock);
f = pmap_modify_pv(pg, pm, sva,
- PVF_WRITE, 0);
+ clr_mask, 0);
pmap_vac_me_harder(pg, pm, sva);
simple_unlock(&pg->mdpage.pvh_slock);
} else
@@ -2680,6 +3341,46 @@
}
void
+pmap_icache_sync_range(pmap_t pm, vaddr_t sva, vaddr_t eva)
+{
+ struct l2_bucket *l2b;
+ pt_entry_t *ptep;
+ vaddr_t next_bucket;
+ vsize_t page_size = trunc_page(sva) + PAGE_SIZE - sva;
+
+ NPDEBUG(PDB_EXEC,
+ printf("pmap_icache_sync_range: pm %p sva 0x%lx eva 0x%lx\n",
+ pm, sva, eva));
+
+ PMAP_MAP_TO_HEAD_LOCK();
+ pmap_acquire_pmap_lock(pm);
+
+ while (sva < eva) {
+ next_bucket = L2_NEXT_BUCKET(sva);
+ if (next_bucket > eva)
+ next_bucket = eva;
+
+ l2b = pmap_get_l2_bucket(pm, sva);
+ if (l2b == NULL) {
+ sva = next_bucket;
+ continue;
+ }
+
+ for (ptep = &l2b->l2b_kva[l2pte_index(sva)];
+ sva < next_bucket;
+ sva += page_size, ptep++, page_size = PAGE_SIZE) {
+ if (l2pte_valid(*ptep)) {
+ cpu_icache_sync_range(sva,
+ min(page_size, eva - sva));
+ }
+ }
+ }
+
+ pmap_release_pmap_lock(pm);
+ PMAP_MAP_TO_HEAD_UNLOCK();
+}
+
+void
pmap_page_protect(struct vm_page *pg, vm_prot_t prot)
{
@@ -2688,11 +3389,20 @@
pg, VM_PAGE_TO_PHYS(pg), prot));
switch(prot) {
- case VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE:
- case VM_PROT_READ|VM_PROT_WRITE:
return;
+ case VM_PROT_READ|VM_PROT_WRITE:
+#if defined(PMAP_CHECK_VIPT) && defined(PMAP_APX)
+ pmap_clearbit(pg, PVF_EXEC);
+ break;
+#endif
+ case VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE:
+ break;
case VM_PROT_READ:
+#if defined(PMAP_CHECK_VIPT) && defined(PMAP_APX)
+ pmap_clearbit(pg, PVF_WRITE|PVF_EXEC);
+ break;
+#endif
case VM_PROT_READ|VM_PROT_EXECUTE:
pmap_clearbit(pg, PVF_WRITE);
break;
@@ -2995,10 +3705,13 @@
pmap_collect(pmap_t pm)
{
+#ifdef PMAP_CACHE_VIVT
pmap_idcache_wbinv_all(pm);
+#endif
pm->pm_remove_all = true;
pmap_do_remove(pm, VM_MIN_ADDRESS, VM_MAX_ADDRESS, 1);
pmap_update(pm);
+ PMAPCOUNT(collects);
}
/*
@@ -3090,6 +3803,7 @@
} else
opm = NULL;
+ PMAPCOUNT(activations);
block_userspace_access = 1;
/*
@@ -3102,7 +3816,9 @@
if (npm != pmap_kernel() && rpm && npm != rpm &&
rpm->pm_cstate.cs_cache) {
rpm->pm_cstate.cs_cache = 0;
+#ifdef PMAP_CACHE_VIVT
cpu_idcache_wbinv_all();
+#endif
}
/* No interrupts while we frob the TTB/DACR */
@@ -3198,6 +3914,8 @@
pm->pm_cstate.cs_all = PMAP_CACHE_STATE_ALL;
}
+ PMAPCOUNT(updates);
+
/*
* make sure TLB/cache operations have completed.
*/
@@ -3214,7 +3932,9 @@
* to pmap_remove(). We can make life much simpler by flushing
* the cache now, and deferring TLB invalidation to pmap_update().
*/
+#ifdef PMAP_CACHE_VIVT
pmap_idcache_wbinv_all(pm);
+#endif
pm->pm_remove_all = true;
}
@@ -3295,6 +4015,33 @@
mutex_exit(&pm->pm_lock);
}
+#if ARM_MMU_V6 > 0
+
+static struct evcnt pmap_prefer_nochange_ev =
+ EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "pmap prefer", "nochange");
+static struct evcnt pmap_prefer_change_ev =
+ EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "pmap prefer", "change");
+
+EVCNT_ATTACH_STATIC(pmap_prefer_change_ev);
+EVCNT_ATTACH_STATIC(pmap_prefer_nochange_ev);
+
+void
+pmap_prefer(vaddr_t hint, vaddr_t *vap, int td)
+{
+ vsize_t mask = arm_cache_prefer_mask | (PAGE_SIZE - 1);
+ vaddr_t va = *vap;
+ vaddr_t diff = (hint - va) & mask;
+ if (diff == 0) {
+ pmap_prefer_nochange_ev.ev_count++;
+ } else {
+ pmap_prefer_change_ev.ev_count++;
+ if (__predict_false(td))
+ va -= mask + 1;
+ *vap = va + diff;
+ }
+}
+#endif /* ARM_MMU_V6 */
+
/*
* pmap_zero_page()
*
@@ -3303,13 +4050,22 @@
* StrongARM accesses to non-cached pages are non-burst making writing
* _any_ bulk data very slow.
*/
-#if (ARM_MMU_GENERIC + ARM_MMU_SA1) != 0
+#if (ARM_MMU_GENERIC + ARM_MMU_SA1 + ARM_MMU_V6) != 0
void
pmap_zero_page_generic(paddr_t phys)
{
-#ifdef DEBUG
+#if defined(PMAP_CACHE_VIPT) || defined(DEBUG)
struct vm_page *pg = PHYS_TO_VM_PAGE(phys);
+#endif
+#ifdef PMAP_CACHE_VIPT
+ /* Choose the last page color it had, if any */
+ const vsize_t va_offset = pg->mdpage.pvh_attrs & arm_cache_prefer_mask;
+#else
+ const vsize_t va_offset = 0;
+#endif
+ pt_entry_t * const ptep = &cdst_pte[va_offset >> PGSHIFT];
+#ifdef DEBUG
if (pg->mdpage.pvh_list != NULL)
panic("pmap_zero_page: page has mappings");
#endif
@@ -3320,15 +4076,37 @@
* Hook in the page, zero it, and purge the cache for that
* zeroed page. Invalidate the TLB as needed.
*/
- *cdst_pte = L2_S_PROTO | phys |
+ *ptep = L2_S_PROTO | phys |
L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode;
- PTE_SYNC(cdst_pte);
- cpu_tlb_flushD_SE(cdstp);
+ PTE_SYNC(ptep);
+ cpu_tlb_flushD_SE(cdstp + va_offset);
cpu_cpwait();
- bzero_page(cdstp);
- cpu_dcache_wbinv_range(cdstp, PAGE_SIZE);
+ bzero_page(cdstp + va_offset);
+ /*
+ * Unmap the page.
+ */
+ *ptep = 0;
+ PTE_SYNC(ptep);
+ cpu_tlb_flushD_SE(cdstp + va_offset);
+#ifdef PMAP_CACHE_VIVT
+ cpu_dcache_wbinv_range(cdstp + va_offset, PAGE_SIZE);
+#endif
+#ifdef PMAP_CACHE_VIPT
+ /*
+ * This page is now cache resident so it now has a page color.
+ * Any contents have been obliterated so clear the EXEC flag.
+ */
+ if (!pmap_is_page_colored_p(pg)) {
+ PMAPCOUNT(vac_color_new);
+ pg->mdpage.pvh_attrs |= PVF_COLORED;
+ }
+ if (PV_IS_EXEC_P(pg->mdpage.pvh_attrs)) {
+ pg->mdpage.pvh_attrs &= ~PVF_EXEC;
+ PMAPCOUNT(exec_discarded_zero);
+ }
+#endif
}
-#endif /* (ARM_MMU_GENERIC + ARM_MMU_SA1) != 0 */
+#endif /* (ARM_MMU_GENERIC + ARM_MMU_SA1 + ARM_MMU_V6) != 0 */
#if ARM_MMU_XSCALE == 1
void
@@ -3349,7 +4127,7 @@
*/
*cdst_pte = L2_S_PROTO | phys |
L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) |
- L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */
+ L2_C | L2_XS_T_TEX(TEX_XSCALE_X); /* mini-data */
PTE_SYNC(cdst_pte);
cpu_tlb_flushD_SE(cdstp);
cpu_cpwait();
@@ -3370,10 +4148,19 @@
unsigned int i;
int *ptr;
bool rv = true;
+#if defined(PMAP_CACHE_VIPT) || defined(DEBUG)
+ struct vm_page * const pg = PHYS_TO_VM_PAGE(phys);
+#endif
+#ifdef PMAP_CACHE_VIPT
+ /* Choose the last page color it had, if any */
+ const vsize_t va_offset = pg->mdpage.pvh_attrs & arm_cache_prefer_mask;
+#else
+ const vsize_t va_offset = 0;
+#endif
+ pt_entry_t * const ptep = &csrc_pte[va_offset >> PGSHIFT];
+
+
#ifdef DEBUG
- struct vm_page *pg;
-
- pg = PHYS_TO_VM_PAGE(phys);
if (pg->mdpage.pvh_list != NULL)
panic("pmap_pageidlezero: page has mappings");
#endif
@@ -3384,15 +4171,15 @@
* Hook in the page, zero it, and purge the cache for that
* zeroed page. Invalidate the TLB as needed.
*/
- *cdst_pte = L2_S_PROTO | phys |
+ *ptep = L2_S_PROTO | phys |
L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode;
- PTE_SYNC(cdst_pte);
- cpu_tlb_flushD_SE(cdstp);
+ PTE_SYNC(ptep);
+ cpu_tlb_flushD_SE(cdstp + va_offset);
cpu_cpwait();
- for (i = 0, ptr = (int *)cdstp;
+ for (i = 0, ptr = (int *)(cdstp + va_offset);
i < (PAGE_SIZE / sizeof(int)); i++) {
- if (sched_curcpu_runnable_p()) {
+ if (sched_curcpu_runnable_p() != 0) {
/*
* A process has become ready. Abort now,
* so we don't keep it waiting while we
@@ -3405,12 +4192,33 @@
*ptr++ = 0;
}
+#ifdef PMAP_CACHE_VIVT
if (rv)
/*
* if we aborted we'll rezero this page again later so don't
* purge it unless we finished it
*/
cpu_dcache_wbinv_range(cdstp, PAGE_SIZE);
+#elif defined(PMAP_CACHE_VIPT)
+ /*
+ * This page is now cache resident so it now has a page color.
+ * Any contents have been obliterated so clear the EXEC flag.
+ */
+ if (!pmap_is_page_colored_p(pg)) {
+ PMAPCOUNT(vac_color_new);
+ pg->mdpage.pvh_attrs |= PVF_COLORED;
+ }
+ if (PV_IS_EXEC_P(pg->mdpage.pvh_attrs)) {
+ pg->mdpage.pvh_attrs &= ~PVF_EXEC;
+ PMAPCOUNT(exec_discarded_zero);
+ }
+#endif
+ /*
+ * Unmap the page.
+ */
+ *ptep = 0;
+ PTE_SYNC(ptep);
+ cpu_tlb_flushD_SE(cdstp + va_offset);
return (rv);
}
@@ -3422,18 +4230,32 @@
* hook points. The same comment regarding cachability as in
* pmap_zero_page also applies here.
*/
-#if (ARM_MMU_GENERIC + ARM_MMU_SA1) != 0
+#if (ARM_MMU_GENERIC + ARM_MMU_SA1 + ARM_MMU_V6) != 0
void
pmap_copy_page_generic(paddr_t src, paddr_t dst)
{
- struct vm_page *src_pg = PHYS_TO_VM_PAGE(src);
-#ifdef DEBUG
- struct vm_page *dst_pg = PHYS_TO_VM_PAGE(dst);
+ struct vm_page * const src_pg = PHYS_TO_VM_PAGE(src);
+#if defined(PMAP_CACHE_VIPT) || defined(DEBUG)
+ struct vm_page * const dst_pg = PHYS_TO_VM_PAGE(dst);
+#endif
+#ifdef PMAP_CACHE_VIPT
+ const vsize_t src_va_offset = src_pg->mdpage.pvh_attrs &
arm_cache_prefer_mask;
+ const vsize_t dst_va_offset = dst_pg->mdpage.pvh_attrs &
arm_cache_prefer_mask;
+#else
+ const vsize_t src_va_offset = 0;
+ const vsize_t dst_va_offset = 0;
+#endif
+ pt_entry_t * const src_ptep = &csrc_pte[src_va_offset >> PGSHIFT];
+ pt_entry_t * const dst_ptep = &cdst_pte[dst_va_offset >> PGSHIFT];
+#ifdef DEBUG
if (dst_pg->mdpage.pvh_list != NULL)
panic("pmap_copy_page: dst page has mappings");
#endif
+#ifdef PMAP_CACHE_VIPT
+ KASSERT(src_pg->mdpage.pvh_attrs & (PVF_COLORED|PVF_NC));
+#endif
KDASSERT((src & PGOFSET) == 0);
KDASSERT((dst & PGOFSET) == 0);
@@ -3443,28 +4265,64 @@
* be created while we have a potentially aliased mapping.
*/
simple_lock(&src_pg->mdpage.pvh_slock);
+#ifdef PMAP_CACHE_VIVT
(void) pmap_clean_page(src_pg->mdpage.pvh_list, true);
+#endif
/*
* Map the pages into the page hook points, copy them, and purge
* the cache for the appropriate page. Invalidate the TLB
* as required.
*/
- *csrc_pte = L2_S_PROTO | src |
- L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | pte_l2_s_cache_mode;
- PTE_SYNC(csrc_pte);
- *cdst_pte = L2_S_PROTO | dst |
+ *src_ptep = L2_S_PROTO
+ | src
+#ifdef PMAP_CACHE_VIPT
+ | ((src_pg->mdpage.pvh_attrs & PVF_NC) ? 0 : pte_l2_s_cache_mode)
+#endif
+#ifdef PMAP_CACHE_VIVT
+ | pte_l2_s_cache_mode
+#endif
+ | L2_S_PROT(PTE_KERNEL, VM_PROT_READ);
+ *dst_ptep = L2_S_PROTO | dst |
L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode;
- PTE_SYNC(cdst_pte);
- cpu_tlb_flushD_SE(csrcp);
- cpu_tlb_flushD_SE(cdstp);
+ PTE_SYNC(src_ptep);
+ PTE_SYNC(dst_ptep);
+ cpu_tlb_flushD_SE(csrcp + src_va_offset);
+ cpu_tlb_flushD_SE(cdstp + dst_va_offset);
cpu_cpwait();
- bcopy_page(csrcp, cdstp);
- cpu_dcache_inv_range(csrcp, PAGE_SIZE);
+ bcopy_page(csrcp + src_va_offset, cdstp + dst_va_offset);
+#ifdef PMAP_CACHE_VIVT
+ cpu_dcache_inv_range(csrcp + src_va_offset, PAGE_SIZE);
+#endif
simple_unlock(&src_pg->mdpage.pvh_slock); /* cache is safe again */
- cpu_dcache_wbinv_range(cdstp, PAGE_SIZE);
+#ifdef PMAP_CACHE_VIVT
+ cpu_dcache_wbinv_range(cdstp + dst_va_offset, PAGE_SIZE);
+#endif
+ /*
+ * Unmap the pages.
+ */
+ *src_ptep = 0;
+ *dst_ptep = 0;
+ PTE_SYNC(src_ptep);
+ PTE_SYNC(dst_ptep);
+ cpu_tlb_flushD_SE(csrcp + src_va_offset);
+ cpu_tlb_flushD_SE(cdstp + dst_va_offset);
+#ifdef PMAP_CACHE_VIPT
+ /*
+ * Now that the destination page is in the cache, mark it as colored.
+ * If this was an exec page, discard it.
+ */
+ if (!pmap_is_page_colored_p(dst_pg)) {
+ PMAPCOUNT(vac_color_new);
+ dst_pg->mdpage.pvh_attrs |= PVF_COLORED;
+ }
+ if (PV_IS_EXEC_P(dst_pg->mdpage.pvh_attrs)) {
+ dst_pg->mdpage.pvh_attrs &= ~PVF_EXEC;
+ PMAPCOUNT(exec_discarded_copy);
+ }
+#endif
}
-#endif /* (ARM_MMU_GENERIC + ARM_MMU_SA1) != 0 */
+#endif /* (ARM_MMU_GENERIC + ARM_MMU_SA1 + ARM_MMU_V6) != 0 */
#if ARM_MMU_XSCALE == 1
void
@@ -3487,7 +4345,9 @@
* be created while we have a potentially aliased mapping.
*/
simple_lock(&src_pg->mdpage.pvh_slock);
+#ifdef PMAP_CACHE_VIVT
(void) pmap_clean_page(src_pg->mdpage.pvh_list, true);
+#endif
/*
* Map the pages into the page hook points, copy them, and purge
@@ -3496,11 +4356,11 @@
*/
*csrc_pte = L2_S_PROTO | src |
L2_S_PROT(PTE_KERNEL, VM_PROT_READ) |
- L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */
+ L2_C | L2_XS_T_TEX(TEX_XSCALE_X); /* mini-data */
PTE_SYNC(csrc_pte);
*cdst_pte = L2_S_PROTO | dst |
L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) |
- L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */
+ L2_C | L2_XS_T_TEX(TEX_XSCALE_X); /* mini-data */
PTE_SYNC(cdst_pte);
cpu_tlb_flushD_SE(csrcp);
cpu_tlb_flushD_SE(cdstp);
@@ -3536,19 +4396,61 @@
paddr_t pa;
if (uvm.page_init_done == false) {
+#ifdef PMAP_STEAL_MEMORY
+ pv_addr_t pv;
+ pmap_boot_pagealloc(PAGE_SIZE,
+#ifdef PMAP_CACHE_VIPT
+ arm_cache_prefer_mask,
+ va & arm_cache_prefer_mask,
+#else
+ 0, 0,
+#endif
+ &pv);
+ pa = pv.pv_pa;
+#else
if (uvm_page_physget(&pa) == false)
return (1);
+#endif /* PMAP_STEAL_MEMORY */
} else {
struct vm_page *pg;
pg = uvm_pagealloc(NULL, 0, NULL, UVM_PGA_USERESERVE);
if (pg == NULL)
return (1);
pa = VM_PAGE_TO_PHYS(pg);
+#ifdef PMAP_CACHE_VIPT
+ /*
+ * This new page must not have any mappings. However, it might
+ * have previously used and therefore present in the cache. If
+ * it doesn't have the desired color, we have to flush it from
+ * the cache. And while we are at it, make sure to clear its
+ * EXEC status.
+ */
+ KASSERT(!(pg->mdpage.pvh_attrs & PVF_KENTRY));
+ KASSERT(pg->mdpage.pvh_list == NULL);
+ if (pmap_is_page_colored_p(pg)) {
+ if ((va ^ pg->mdpage.pvh_attrs) &
arm_cache_prefer_mask) {
+ pmap_flush_page(pg);
+ PMAPCOUNT(vac_color_change);
+ } else {
+ PMAPCOUNT(vac_color_reuse);
+ }
+ } else {
+ PMAPCOUNT(vac_color_new);
+ }
+ if (PV_IS_EXEC_P(pg->mdpage.pvh_attrs))
+ PMAPCOUNT(exec_discarded_kremove);
+ /*
+ * We'll pretend this page was entered by pmap_kenter_pa
+ */
+ pg->mdpage.pvh_attrs &= (PAGE_SIZE - 1) & ~PVF_EXEC;
+ pg->mdpage.pvh_attrs |= va | PVF_KENTRY | PVF_COLORED | PVF_REF
| PVF_MOD;
+#endif
}
if (pap)
*pap = pa;
+ PMAPCOUNT(pt_mappings);
l2b = pmap_get_l2_bucket(pmap_kernel(), va);
KDASSERT(l2b != NULL);
@@ -3748,7 +4650,7 @@
u_short l1idx;
if (pm->pm_l1 == NULL)
- return (false);
+ return false;
l1idx = L1_IDX(va);
*pdp = pl1pd = &pm->pm_l1->l1_kva[l1idx];
@@ -3756,21 +4658,21 @@
if (l1pte_section_p(l1pd)) {
*ptp = NULL;
- return (true);
+ return true;
}
if (pm->pm_l2 == NULL)
- return (false);
+ return false;
l2 = pm->pm_l2[L2_IDX(l1idx)];
if (l2 == NULL ||
(ptep = l2->l2_bucket[L2_BUCKET(l1idx)].l2b_kva) == NULL) {
- return (false);
+ return false;
}
*ptp = &ptep[l2pte_index(va)];
- return (true);
+ return true;
}
bool
@@ -3779,12 +4681,12 @@
u_short l1idx;
if (pm->pm_l1 == NULL)
- return (false);
+ return false;
l1idx = L1_IDX(va);
*pdp = &pm->pm_l1->l1_kva[l1idx];
- return (true);
+ return true;
}
/************************ Bootstrapping routines ****************************/
@@ -3835,20 +4737,21 @@
*/
#define PMAP_STATIC_L2_SIZE 16
void
-pmap_bootstrap(pd_entry_t *kernel_l1pt, vaddr_t vstart, vaddr_t vend)
+pmap_bootstrap(vaddr_t vstart, vaddr_t vend)
{
static struct l1_ttable static_l1;
static struct l2_dtable static_l2[PMAP_STATIC_L2_SIZE];
struct l1_ttable *l1 = &static_l1;
struct l2_dtable *l2;
struct l2_bucket *l2b;
+ pd_entry_t *l1pt = (pd_entry_t *) kernel_l1pt.pv_va;
pmap_t pm = pmap_kernel();
pd_entry_t pde;
pt_entry_t *ptep;
paddr_t pa;
vaddr_t va;
vsize_t size;
- int l1idx, l2idx, l2next = 0;
+ int nptes, l1idx, l2idx, l2next = 0;
/*
* Initialise the kernel pmap object
@@ -3864,7 +4767,7 @@
* the required metadata for all valid mappings found in it.
*/
for (l1idx = 0; l1idx < (L1_TABLE_SIZE / sizeof(pd_entry_t)); l1idx++) {
- pde = kernel_l1pt[l1idx];
+ pde = l1pt[l1idx];
/*
* We're only interested in Coarse mappings.
@@ -3925,7 +4828,7 @@
* should consider this a clue to fix up their initarm()
* function. :)
*/
- if (pmap_set_pt_cache_mode(kernel_l1pt, (vaddr_t)ptep)) {
+ if (pmap_set_pt_cache_mode(l1pt, (vaddr_t)ptep)) {
printf("pmap_bootstrap: WARNING! wrong cache mode for "
"L2 pte @ %p\n", ptep);
}
@@ -3935,9 +4838,9 @@
* Ensure the primary (kernel) L1 has the correct cache mode for
* a page table. Bitch if it is not correctly set.
*/
- for (va = (vaddr_t)kernel_l1pt;
- va < ((vaddr_t)kernel_l1pt + L1_TABLE_SIZE); va += PAGE_SIZE) {
- if (pmap_set_pt_cache_mode(kernel_l1pt, va))
+ for (va = (vaddr_t)l1pt;
+ va < ((vaddr_t)l1pt + L1_TABLE_SIZE); va += PAGE_SIZE) {
+ if (pmap_set_pt_cache_mode(l1pt, va))
printf("pmap_bootstrap: WARNING! wrong cache mode for "
"primary L1 @ 0x%lx\n", va);
}
@@ -3956,11 +4859,21 @@
virtual_avail = vstart;
virtual_end = vend;
- pmap_alloc_specials(&virtual_avail, 1, &csrcp, &csrc_pte);
- pmap_set_pt_cache_mode(kernel_l1pt, (vaddr_t)csrc_pte);
- pmap_alloc_specials(&virtual_avail, 1, &cdstp, &cdst_pte);
- pmap_set_pt_cache_mode(kernel_l1pt, (vaddr_t)cdst_pte);
- pmap_alloc_specials(&virtual_avail, 1, &memhook, NULL);
+#ifdef PMAP_CACHE_VIPT
+ /*
+ * If we have a VIPT cache, we need one page/pte per possible alias
+ * page so we won't violate cache aliasing rules.
+ */
+ virtual_avail = (virtual_avail + arm_cache_prefer_mask) &
~arm_cache_prefer_mask;
+ nptes = (arm_cache_prefer_mask >> PGSHIFT) + 1;
+#else
+ nptes = 1;
+#endif
+ pmap_alloc_specials(&virtual_avail, nptes, &csrcp, &csrc_pte);
+ pmap_set_pt_cache_mode(l1pt, (vaddr_t)csrc_pte);
+ pmap_alloc_specials(&virtual_avail, nptes, &cdstp, &cdst_pte);
+ pmap_set_pt_cache_mode(l1pt, (vaddr_t)cdst_pte);
+ pmap_alloc_specials(&virtual_avail, 1, (void *)&memhook, NULL);
pmap_alloc_specials(&virtual_avail, round_page(MSGBUFSIZE) / PAGE_SIZE,
(void *)&msgbufaddr, NULL);
@@ -3990,7 +4903,7 @@
SLIST_INIT(&l1_list);
TAILQ_INIT(&l1_lru_list);
simple_lock_init(&l1_lru_lock);
- pmap_init_l1(l1, kernel_l1pt);
+ pmap_init_l1(l1, l1pt);
/* Set up vector page L1 details, if necessary */
if (vector_page < KERNEL_BASE) {
@@ -4361,15 +5274,15 @@
if (pte == NULL)
panic("pmap_map_entry: can't find L2 table for VA 0x%08lx", va);
+ fl |= L2_S_PROTO | pa | L2_S_PROT(PTE_KERNEL, prot);
#ifndef ARM32_NEW_VM_LAYOUT
- pte[(va >> PGSHIFT) & 0x3ff] =
- L2_S_PROTO | pa | L2_S_PROT(PTE_KERNEL, prot) | fl;
- PTE_SYNC(&pte[(va >> PGSHIFT) & 0x3ff]);
+ pte += (va >> PGSHIFT) & 0x3ff;
#else
- pte[l2pte_index(va)] =
+ pte += l2pte_index(va);
L2_S_PROTO | pa | L2_S_PROT(PTE_KERNEL, prot) | fl;
- PTE_SYNC(&pte[l2pte_index(va)]);
#endif
+ *pte = fl;
+ PTE_SYNC(pte);
}
/*
@@ -4651,7 +5564,7 @@
void (*pmap_copy_page_func)(paddr_t, paddr_t);
void (*pmap_zero_page_func)(paddr_t);
-#if (ARM_MMU_GENERIC + ARM_MMU_SA1) != 0
+#if (ARM_MMU_GENERIC + ARM_MMU_SA1 + ARM_MMU_V6) != 0
void
pmap_pte_init_generic(void)
{
@@ -4675,9 +5588,15 @@
pte_l2_l_cache_mode_pt = L2_B|L2_C;
pte_l2_s_cache_mode_pt = L2_B|L2_C;
} else {
+#if ARM_MMU_V6 > 1
+ pte_l1_s_cache_mode_pt = L1_S_B|L1_S_C; /* arm116 errata 399234
*/
+ pte_l2_l_cache_mode_pt = L2_B|L2_C; /* arm116 errata 399234 */
+ pte_l2_s_cache_mode_pt = L2_B|L2_C; /* arm116 errata 399234 */
+#else
pte_l1_s_cache_mode_pt = L1_S_C;
pte_l2_l_cache_mode_pt = L2_C;
pte_l2_s_cache_mode_pt = L2_C;
+#endif
}
pte_l2_s_prot_u = L2_S_PROT_U_generic;
@@ -4729,7 +5648,7 @@
pte_l2_s_cache_mode_pt = L2_C;
}
#endif /* CPU_ARM9 */
-#endif /* (ARM_MMU_GENERIC + ARM_MMU_SA1) != 0 */
+#endif /* (ARM_MMU_GENERIC + ARM_MMU_SA1 + ARM_MMU_V6) != 0 */
#if defined(CPU_ARM10)
void
@@ -4805,9 +5724,9 @@
* is significantly faster than the traditional, write-through
* behavior of this case.
*/
- pte_l1_s_cache_mode |= L1_S_XSCALE_TEX(TEX_XSCALE_X);
- pte_l2_l_cache_mode |= L2_XSCALE_L_TEX(TEX_XSCALE_X);
- pte_l2_s_cache_mode |= L2_XSCALE_T_TEX(TEX_XSCALE_X);
+ pte_l1_s_cache_mode |= L1_S_XS_TEX(TEX_XSCALE_X);
+ pte_l2_l_cache_mode |= L2_XS_L_TEX(TEX_XSCALE_X);
+ pte_l2_s_cache_mode |= L2_XS_T_TEX(TEX_XSCALE_X);
#endif /* XSCALE_CACHE_READ_WRITE_ALLOCATE */
#ifdef XSCALE_CACHE_WRITE_THROUGH
@@ -4916,7 +5835,7 @@
pte[l2pte_index(va)] =
#endif
L2_S_PROTO | pa | L2_S_PROT(PTE_KERNEL, VM_PROT_READ) |
- L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X);
+ L2_C | L2_XS_T_TEX(TEX_XSCALE_X);
}
/*
@@ -5133,3 +6052,159 @@
}
}
#endif
+
+#ifdef PMAP_STEAL_MEMORY
+void
+pmap_boot_pageadd(pv_addr_t *newpv)
+{
+ pv_addr_t *pv, *npv;
+
+ if ((pv = SLIST_FIRST(&pmap_boot_freeq)) != NULL) {
+ if (newpv->pv_pa < pv->pv_va) {
+ KASSERT(newpv->pv_pa + newpv->pv_size <= pv->pv_pa);
+ if (newpv->pv_pa + newpv->pv_size == pv->pv_pa) {
+ newpv->pv_size += pv->pv_size;
+ SLIST_REMOVE_HEAD(&pmap_boot_freeq, pv_list);
+ }
+ pv = NULL;
+ } else {
+ for (; (npv = SLIST_NEXT(pv, pv_list)) != NULL;
+ pv = npv) {
+ KASSERT(pv->pv_pa + pv->pv_size < npv->pv_pa);
+ KASSERT(pv->pv_pa < newpv->pv_pa);
+ if (newpv->pv_pa > npv->pv_pa)
+ continue;
+ if (pv->pv_pa + pv->pv_size == newpv->pv_pa) {
+ pv->pv_size += newpv->pv_size;
+ return;
+ }
+ if (newpv->pv_pa + newpv->pv_size < npv->pv_pa)
+ break;
+ newpv->pv_size += npv->pv_size;
+ SLIST_INSERT_AFTER(pv, newpv, pv_list);
+ SLIST_REMOVE_AFTER(newpv, pv_list);
+ return;
+ }
+ }
+ }
+
+ if (pv) {
+ SLIST_INSERT_AFTER(pv, newpv, pv_list);
+ } else {
+ SLIST_INSERT_HEAD(&pmap_boot_freeq, newpv, pv_list);
+ }
+}
+
+void
+pmap_boot_pagealloc(psize_t amount, psize_t mask, psize_t match,
+ pv_addr_t *rpv)
+{
+ pv_addr_t *pv, **pvp;
+ struct vm_physseg *ps;
+ size_t i;
+
+ KASSERT(amount & PGOFSET);
+ KASSERT((mask & PGOFSET) == 0);
+ KASSERT((match & PGOFSET) == 0);
+ KASSERT(amount != 0);
+
+ for (pvp = &SLIST_FIRST(&pmap_boot_freeq);
+ (pv = *pvp) != NULL;
+ pvp = &SLIST_NEXT(pv, pv_list)) {
+ pv_addr_t *newpv;
+ psize_t off;
+ /*
+ * If this entry is too small to satify the request...
+ */
+ KASSERT(pv->pv_size > 0);
+ if (pv->pv_size < amount)
+ continue;
+
+ for (off = 0; off <= mask; off += PAGE_SIZE) {
+ if (((pv->pv_pa + off) & mask) == match
+ && off + amount <= pv->pv_size)
+ break;
+ }
+ if (off > mask)
+ continue;
+
+ rpv->pv_va = pv->pv_va + off;
+ rpv->pv_pa = pv->pv_pa + off;
+ rpv->pv_size = amount;
+ pv->pv_size -= amount;
+ if (pv->pv_size == 0) {
+ KASSERT(off == 0);
+ KASSERT((vaddr_t) pv == rpv->pv_va);
+ *pvp = SLIST_NEXT(pv, pv_list);
+ } else if (off == 0) {
+ KASSERT((vaddr_t) pv == rpv->pv_va);
+ newpv = (pv_addr_t *) (rpv->pv_va + amount);
+ *newpv = *pv;
+ newpv->pv_pa += amount;
+ newpv->pv_va += amount;
+ *pvp = newpv;
+ } else if (off < pv->pv_size) {
+ newpv = (pv_addr_t *) (rpv->pv_va + amount);
+ *newpv = *pv;
+ newpv->pv_size -= off;
+ newpv->pv_pa += off + amount;
+ newpv->pv_va += off + amount;
+
+ SLIST_NEXT(pv, pv_list) = newpv;
+ pv->pv_size = off;
+ } else {
+ KASSERT((vaddr_t) pv != rpv->pv_va);
+ }
+ memset((void *)rpv->pv_va, 0, amount);
+ return;
+ }
+
+ if (vm_nphysseg == 0)
+ panic("pmap_boot_pagealloc: couldn't allocate memory");
+
+ for (pvp = &SLIST_FIRST(&pmap_boot_freeq);
+ (pv = *pvp) != NULL;
+ pvp = &SLIST_NEXT(pv, pv_list)) {
+ if (SLIST_NEXT(pv, pv_list) == NULL)
+ break;
+ }
+ KASSERT(mask == 0);
+ for (ps = vm_physmem, i = 0; i < vm_nphysseg; ps++, i++) {
+ if (ps->avail_start == atop(pv->pv_pa + pv->pv_size)
+ && pv->pv_va + pv->pv_size <= ptoa(ps->avail_end)) {
+ rpv->pv_va = pv->pv_va;
+ rpv->pv_pa = pv->pv_pa;
+ rpv->pv_size = amount;
+ *pvp = NULL;
+ pmap_map_chunk(kernel_l1pt.pv_va,
+ ptoa(ps->avail_start) + (pv->pv_va - pv->pv_pa),
+ ptoa(ps->avail_start),
+ amount - pv->pv_size,
+ VM_PROT_READ|VM_PROT_WRITE,
+ PTE_CACHE);
+ ps->avail_start += atop(amount - pv->pv_size);
+ /*
+ * If we consumed the entire physseg, remove it.
+ */
+ if (ps->avail_start == ps->avail_end) {
+ for (--vm_nphysseg; i < vm_nphysseg; i++, ps++)
+ ps[0] = ps[1];
+ }
+ memset((void *)rpv->pv_va, 0, rpv->pv_size);
+ return;
+ }
+ }
+
+ panic("pmap_boot_pagealloc: couldn't allocate memory");
+}
+
+vaddr_t
+pmap_steal_memory(vsize_t size, vaddr_t *vstartp, vaddr_t *vendp)
+{
+ pv_addr_t pv;
+
+ pmap_boot_pagealloc(size, 0, 0, &pv);
+
+ return pv.pv_va;
+}
+#endif /* PMAP_STEAL_MEMORY */
Index: src/sys/arch/arm/arm32/setstack.S
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm32/setstack.S,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -r1.3 -r1.4
--- src/sys/arch/arm/arm32/setstack.S 19 Jan 2008 12:30:51 -0000 1.3
+++ src/sys/arch/arm/arm32/setstack.S 27 Apr 2008 18:58:44 -0000 1.4
@@ -1,4 +1,4 @@
-/* $NetBSD: setstack.S,v 1.3 2008/01/19 12:30:51 chris Exp $ */
+/* $NetBSD: setstack.S,v 1.4 2008/04/27 18:58:44 matt Exp $ */
/*
* Copyright (c) 1994 Mark Brinicombe.
@@ -50,6 +50,8 @@
#include <machine/cpu.h>
#include <machine/asm.h>
+ RCSID("$NetBSD: setstack.S,v 1.4 2008/04/27 18:58:44 matt Exp $")
+
/* To set the stack pointer for a particular mode we must switch
* to that mode update the banked r13 and then switch back.
* This routine provides an easy way of doing this for any mode
Index: src/sys/arch/arm/arm32/spl.S
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm32/spl.S,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -r1.7 -r1.8
--- src/sys/arch/arm/arm32/spl.S 3 Dec 2007 15:33:16 -0000 1.7
+++ src/sys/arch/arm/arm32/spl.S 27 Apr 2008 18:58:44 -0000 1.8
@@ -1,4 +1,4 @@
-/* $NetBSD: spl.S,v 1.7 2007/12/03 15:33:16 ad Exp $ */
+/* $NetBSD: spl.S,v 1.8 2008/04/27 18:58:44 matt Exp $ */
/*
* Copyright (c) 1996-1998 Mark Brinicombe.
@@ -41,58 +41,78 @@
#include "assym.h"
#include <arm/arm32/psl.h>
#include <machine/asm.h>
+#include <machine/cpu.h>
+
+ RCSID("$NetBSD: spl.S,v 1.8 2008/04/27 18:58:44 matt Exp $")
.text
.align 0
-.Lcurrent_spl_level:
- .word _C_LABEL(current_spl_level)
+.Lcpu_info_store:
+ .word _C_LABEL(cpu_info_store)
ENTRY(raisespl)
mov r3, r0 /* Save the new value */
- ldr r1, .Lcurrent_spl_level /* Get the current spl level */
- ldr r0, [r1]
+ ldr r1, .Lcpu_info_store /* Get the current spl level */
+ ldr r0, [r1, #CI_CPL]
cmp r3, r0
- movle pc, lr
+ RETc(le)
+
+ stmfd sp!, {r0, r1, r4, lr} /* Preserve registers */
- str r3, [r1] /* Store the new spl level */
+ /* Disable interrupts */
+ mrs r4, cpsr_all
+ orr r2, r4, #(I32_bit)
+ msr cpsr_c, r2
- /* stack alignment is 8 bytes */
- stmfd sp!, {r0, lr} /* Preserve registers */
+ str r3, [r1, #CI_CPL] /* Store the new spl level */
bl _C_LABEL(irq_setmasks) /* Update the actual masks */
- ldmfd sp!, {r0, pc} /* Exit */
+ msr cpsr_c, r4 /* Restore interrupts */
+
+ ldmfd sp!, {r0, r1, r4, pc} /* Restore registers */
ENTRY(lowerspl)
mov r3, r0 /* Save the new value */
- ldr r1, .Lcurrent_spl_level /* Get the current spl level */
- ldr r0, [r1]
+ ldr r1, .Lcpu_info_store /* Get the current spl level */
+ ldr r0, [r1, #CI_CPL]
cmp r3, r0
- movge pc, lr
+ RETc(ge)
- str r3, [r1] /* Store the new spl level */
+ stmfd sp!, {r0, r1, r4, lr} /* Preserve registers */
+
+ /* Disable interrupts */
+ mrs r4, cpsr_all
+ orr r2, r4, #(I32_bit)
+ msr cpsr_c, r2
+
+ str r3, [r1, #CI_CPL] /* Store the new spl level */
- /* stack alignment is 8 bytes */
- stmfd sp!, {r0, lr} /* Preserve registers */
bl _C_LABEL(irq_setmasks) /* Update the actual masks */
+ msr cpsr_all, r4
#ifdef __HAVE_FAST_SOFTINTS
bl _C_LABEL(dosoftints) /* Process any pending soft ints */
#endif
- ldmfd sp!, {r0, pc} /* Exit */
+ ldmfd sp!, {r0, r1, r4, pc} /* restore registers */
ENTRY(splx)
- ldr r1, .Lcurrent_spl_level /* Get the current spl level */
mov r3, r0 /* Save the new value */
- ldr r0, [r1]
+ ldr r1, .Lcpu_info_store /* Get the current spl level */
+ ldr r0, [r1, #CI_CPL]
cmp r3, r0
- moveq pc, lr
+ RETc(eq)
+
+ stmfd sp!, {r0, r1, r4, lr}
- str r3, [r1] /* Store the new spl level */
+ /* Disable interrupts */
+ mrs r4, cpsr_all
+ orr r2, r4, #(I32_bit)
+ msr cpsr_c, r2
- /* stack alignment is 8 bytes */
- stmfd sp!, {r0, lr} /* Preserve registers */
+ str r3, [r1, #CI_CPL] /* Store the new spl level */
bl _C_LABEL(irq_setmasks) /* Update the actual masks */
#ifdef __HAVE_FAST_SOFTINTS
bl _C_LABEL(dosoftints) /* Process any pending soft ints */
#endif
- ldmfd sp!, {r0, pc} /* Exit */
+ msr cpsr_c, r4
+ ldmfd sp!, {r0, r1, r4, pc}
Index: src/sys/arch/arm/arm32/sys_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/arm32/sys_machdep.c,v
retrieving revision 1.9
retrieving revision 1.10
diff -u -r1.9 -r1.10
--- src/sys/arch/arm/arm32/sys_machdep.c 20 Dec 2007 23:02:39 -0000
1.9
+++ src/sys/arch/arm/arm32/sys_machdep.c 27 Apr 2008 18:58:44 -0000
1.10
@@ -1,4 +1,4 @@
-/* $NetBSD: sys_machdep.c,v 1.9 2007/12/20 23:02:39 dsl Exp $ */
+/* $NetBSD: sys_machdep.c,v 1.10 2008/04/27 18:58:44 matt Exp $ */
/*
* Copyright (c) 1995-1997 Mark Brinicombe.
@@ -41,7 +41,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sys_machdep.c,v 1.9 2007/12/20 23:02:39 dsl Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: sys_machdep.c,v 1.10 2008/04/27 18:58:44 matt Exp
$");
#include <sys/param.h>
#include <sys/systm.h>
@@ -55,11 +55,11 @@
#include <machine/sysarch.h>
/* Prototypes */
-static int arm32_sync_icache __P((struct proc *, char *, register_t *));
-static int arm32_drain_writebuf __P((struct proc *, char *, register_t *));
+static int arm32_sync_icache(struct lwp *, const void *, register_t *);
+static int arm32_drain_writebuf(struct lwp *, const void *, register_t *);
static int
-arm32_sync_icache(struct proc *p, char *args, register_t *retval)
+arm32_sync_icache(struct lwp *l, const void *args, register_t *retval)
{
struct arm_sync_icache_args ua;
int error;
@@ -67,14 +67,15 @@
if ((error = copyin(args, &ua, sizeof(ua))) != 0)
return (error);
- cpu_icache_sync_range(ua.addr, ua.len);
+ pmap_icache_sync_range(vm_map_pmap(&l->l_proc->p_vmspace->vm_map),
+ ua.addr, ua.addr + ua.len);
*retval = 0;
return(0);
}
static int
-arm32_drain_writebuf(struct proc *p, char *args, register_t *retval)
+arm32_drain_writebuf(struct lwp *l, const void *args, register_t *retval)
{
/* No args. */
@@ -91,16 +92,15 @@
syscallarg(int) op;
syscallarg(void *) parms;
} */
- struct proc *p = l->l_proc;
int error = 0;
switch(SCARG(uap, op)) {
case ARM_SYNC_ICACHE :
- error = arm32_sync_icache(p, SCARG(uap, parms), retval);
+ error = arm32_sync_icache(l, SCARG(uap, parms), retval);
break;
case ARM_DRAIN_WRITEBUF :
- error = arm32_drain_writebuf(p, SCARG(uap, parms), retval);
+ error = arm32_drain_writebuf(l, SCARG(uap, parms), retval);
break;
default:
Index: src/sys/arch/arm/conf/Makefile.arm
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/conf/Makefile.arm,v
retrieving revision 1.31
retrieving revision 1.32
diff -u -r1.31 -r1.32
--- src/sys/arch/arm/conf/Makefile.arm 26 Jan 2008 02:06:04 -0000 1.31
+++ src/sys/arch/arm/conf/Makefile.arm 27 Apr 2008 03:23:13 -0000 1.32
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile.arm,v 1.31 2008/01/26 02:06:04 chris Exp $
+# $NetBSD: Makefile.arm,v 1.32 2008/04/27 03:23:13 tsutsui Exp $
# Makefile for NetBSD
#
@@ -90,10 +90,6 @@
## (7) misc settings
##
-# XXX gcc 3.3 generates incorrect code without this
-# XXX see PR 23044
-COPTS.uipc_socket.c+= -fno-strict-aliasing
-
##
## (8) config(8) generated machinery
##
Index: src/sys/arch/arm/conf/files.arm
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/conf/files.arm,v
retrieving revision 1.90
retrieving revision 1.91
diff -u -r1.90 -r1.91
--- src/sys/arch/arm/conf/files.arm 15 Mar 2008 10:23:01 -0000 1.90
+++ src/sys/arch/arm/conf/files.arm 27 Apr 2008 18:58:44 -0000 1.91
@@ -1,4 +1,4 @@
-# $NetBSD: files.arm,v 1.90 2008/03/15 10:23:01 rearnsha Exp $
+# $NetBSD: files.arm,v 1.91 2008/04/27 18:58:44 matt Exp $
# temporary define to allow easy moving to ../arch/arm/arm32
defflag ARM32
@@ -11,6 +11,8 @@
CPU_XSCALE_80200 CPU_XSCALE_80321
CPU_XSCALE_PXA250 CPU_XSCALE_PXA270
CPU_XSCALE_IXP425
+defflag opt_cputypes.h CPU_ARM1136: CPU_ARM11
+defflag opt_cputypes.h CPU_ARM1176: CPU_ARM11
defflag opt_cputypes.h FPU_VFP
defparam opt_cpuoptions.h XSCALE_CCLKCFG
@@ -20,6 +22,9 @@
defflag opt_cpuoptions.h XSCALE_CACHE_READ_WRITE_ALLOCATE
defflag opt_cpuoptions.h ARM32_DISABLE_ALIGNMENT_FAULTS
defflag opt_cpuoptions.h ARM9_CACHE_WRITE_THROUGH
+defflag opt_cpuoptions.h PROCESS_ID_IS_CURLWP
+defflag opt_cpuoptions.h PROCESS_ID_IS_CURCPU
+defflag opt_cpuoptions.h ARM11_PMC
# Interrupt implementation header definition.
defparam opt_arm_intr_impl.h ARM_INTR_IMPL
@@ -43,7 +48,8 @@
defflag PMAP_DEBUG
# New PMAP options
-defflag opt_arm32_pmap.h ARM32_NEW_VM_LAYOUT
+defflag opt_arm32_pmap.h ARM32_NEW_VM_LAYOUT PMAPCOUNTERS
+ PMAP_STEAL_MEMORY
# MI console support
file dev/cons.c
@@ -60,7 +66,7 @@
file arch/arm/arm/fiq_subr.S
# mainbus files
-device mainbus { [base = -1], [dack = -1], [irq = -1] }
+device mainbus { [base = -1], [size = 0], [dack = -1], [irq = -1] }
attach mainbus at root
file arch/arm/mainbus/mainbus.c mainbus & arm32
file arch/arm/mainbus/mainbus_io.c mainbus & arm32
@@ -96,6 +102,7 @@
file arch/arm/arm/cpufunc_asm_arm9.S cpu_arm9
file arch/arm/arm/cpufunc_asm_arm10.S cpu_arm9e | cpu_arm10
file arch/arm/arm/cpufunc_asm_arm11.S cpu_arm11
+file arch/arm/arm/cpufunc_asm_arm1136.S cpu_arm1136
file arch/arm/arm/cpufunc_asm_armv4.S cpu_arm9 | cpu_arm9e |
cpu_arm10 |
cpu_sa110 |
@@ -107,8 +114,10 @@
cpu_xscale_ixp425 |
cpu_xscale_pxa250 |
cpu_xscale_pxa270
-file arch/arm/arm/cpufunc_asm_armv5.S cpu_arm10 | cpu_arm11
+file arch/arm/arm/cpufunc_asm_armv5.S cpu_arm10
file arch/arm/arm/cpufunc_asm_armv5_ec.S cpu_arm9e | cpu_arm10
+file arch/arm/arm/cpufunc_asm_armv6.S cpu_arm11
+makeoptions cpu_arm11 "AOPTS.cpufunc_asm_armv6.S"+="-Wa,-march=armv6"
file arch/arm/arm/cpufunc_asm_sa1.S cpu_sa110 | cpu_sa1100 |
cpu_sa1110 |
cpu_ixp12x0
@@ -150,6 +159,10 @@
file arch/arm/arm32/vm_machdep.c arm32
file arch/arm/arm32/atomic.S arm32
+# files less common to arm32 implementations...
+file kern/kern_cctr.c arm11
+file arch/arm/arm32/arm11_pmc.c arm11_pmc
+
# arm32 library functions
file arch/arm/arm32/bcopy_page.S arm32
Index: src/sys/arch/arm/ep93xx/ep93xx_intr.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/ep93xx/ep93xx_intr.c,v
retrieving revision 1.11
retrieving revision 1.13
diff -u -r1.11 -r1.13
--- src/sys/arch/arm/ep93xx/ep93xx_intr.c 6 Jan 2008 03:45:26 -0000
1.11
+++ src/sys/arch/arm/ep93xx/ep93xx_intr.c 28 Apr 2008 20:23:14 -0000
1.13
@@ -1,4 +1,4 @@
-/* $NetBSD: ep93xx_intr.c,v 1.11 2008/01/06 03:45:26 matt Exp $ */
+/* $NetBSD: ep93xx_intr.c,v 1.13 2008/04/28 20:23:14 martin Exp $ */
/*
* Copyright (c) 2002 The NetBSD Foundation, Inc.
@@ -18,13 +18,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -40,7 +33,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ep93xx_intr.c,v 1.11 2008/01/06 03:45:26 matt Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: ep93xx_intr.c,v 1.13 2008/04/28 20:23:14 martin
Exp $");
/*
* Interrupt support for the Cirrus Logic EP93XX
@@ -69,7 +62,6 @@
static u_int32_t vic2_imask[NIPL];
/* Current interrupt priority level. */
-volatile int current_spl_level;
volatile int hardware_spl_level;
/* Software copy of the IRQs we have enabled. */
@@ -79,40 +71,6 @@
/* Interrupts pending. */
static volatile int ipending;
-#ifdef __HAVE_FAST_SOFTINTS
-#define SI_SOFTCLOCK 0
-#define SI_SOFTBIO 1
-#define SI_SOFTNET 2
-#define SI_SOFTSERIAL 3
-/*
- * Map a software interrupt queue index (to the unused bits in the
- * VIC1 register -- XXX will need to revisit this if those bits are
- * ever used in future steppings).
- */
-static const u_int32_t si_to_irqbit[] = {
- [SI_SOFTCLOCK] = EP93XX_INTR_bit30,
- [SI_SOFTBIO] = EP93XX_INTR_bit29,
- [SI_SOFTNET] = EP93XX_INTR_bit28,
- [SI_SOFTSERIAL] = EP93XX_INTR_bit27,
-};
-
-#define INT_SWMASK
\
- ((1U << EP93XX_INTR_bit30) | (1U << EP93XX_INTR_bit29) | \
- (1U << EP93XX_INTR_bit28) | (1U << EP93XX_INTR_bit27))
-
-#define SI_TO_IRQBIT(si) (1U << si_to_irqbit[(si)])
-
-/*
- * Map a software interrupt queue to an interrupt priority level.
- */
-static const int si_to_ipl[] = {
- [SI_SOFTCLOCK] = IPL_SOFTCLOCK,
- [SI_SOFTBIO] = IPL_SOFTBIO,
- [SI_SOFTNET] = IPL_SOFTNET,
- [SI_SOFTSERIAl] = IPL_SOFTSERIAL,
-};
-#endif /* __HAVE_FAST_SOFTINTS */
-
void ep93xx_intr_dispatch(struct irqframe *frame);
#define VIC1REG(reg) *((volatile u_int32_t*) (EP93XX_AHB_VBASE + \
@@ -193,66 +151,17 @@
KASSERT(vic1_imask[IPL_NONE] == 0);
KASSERT(vic2_imask[IPL_NONE] == 0);
-#ifdef __HAVE_FAST_SOFTINTS
- /*
- * Initialize the soft interrupt masks to block themselves.
- */
- vic1_imask[IPL_SOFT] = SI_TO_IRQBIT(SI_SOFT);
- vic1_imask[IPL_SOFTCLOCK] = SI_TO_IRQBIT(SI_SOFTCLOCK);
- vic1_imask[IPL_SOFTNET] = SI_TO_IRQBIT(SI_SOFTNET);
- vic1_imask[IPL_SOFTSERIAL] = SI_TO_IRQBIT(SI_SOFTSERIAL);
-
- /*
- * splsoftclock() is the only interface that users of the
- * generic software interrupt facility have to block their
- * soft intrs, so splsoftclock() must also block IPL_SOFT.
- */
- vic1_imask[IPL_SOFTCLOCK] |= vic1_imask[IPL_SOFT];
- vic2_imask[IPL_SOFTCLOCK] |= vic2_imask[IPL_SOFT];
-
- /*
- * splsoftbio() must also block splsoftclock(), since we don't
- * want timer-driven network events to occur while we're
- * processing incoming packets.
- */
- vic1_imask[IPL_SOFTBIO] |= vic1_imask[IPL_SOFTCLOCK];
- vic2_imask[IPL_SOFTBIO] |= vic2_imask[IPL_SOFTCLOCK];
-
- /*
- * splsoftnet() must also block splsoftclock(), since we don't
- * want timer-driven network events to occur while we're
- * processing incoming packets.
- */
- vic1_imask[IPL_SOFTNET] |= vic1_imask[IPL_SOFTBIO];
- vic2_imask[IPL_SOFTNET] |= vic2_imask[IPL_SOFTBIO];
-
- /*
- * Enforce a hierarchy that gives "slow" device (or devices with
- * limited input buffer space/"real-time" requirements) a better
- * chance at not dropping data.
- */
- vic1_imask[IPL_SOFTSERIAL] |= vic1_imask[IPL_SOFTNET];
- vic2_imask[IPL_SOFTSERIAL] |= vic2_imask[IPL_SOFTNET];
-
- /*
- * splvm() blocks all interrupts that use the kernel memory
- * allocation facilities.
- */
- vic1_imask[IPL_VM] |= vic1_imask[IPL_SOFTSERIAL];
- vic2_imask[IPL_VM] |= vic2_imask[IPL_SOFTSERIAL];
-#endif /* __HAVE_FAST_SOFTINTS */
-
/*
* splclock() must block anything that uses the scheduler.
*/
- vic1_imask[IPL_CLOCK] |= vic1_imask[IPL_VM];
- vic2_imask[IPL_CLOCK] |= vic2_imask[IPL_VM];
+ vic1_imask[IPL_SCHED] |= vic1_imask[IPL_VM];
+ vic2_imask[IPL_SCHED] |= vic2_imask[IPL_VM];
/*
* splhigh() must block "everything".
*/
- vic1_imask[IPL_HIGH] |= vic1_imask[IPL_CLOCK];
- vic2_imask[IPL_HIGH] |= vic2_imask[IPL_CLOCK];
+ vic1_imask[IPL_HIGH] |= vic1_imask[IPL_SCHED];
+ vic2_imask[IPL_HIGH] |= vic2_imask[IPL_SCHED];
/*
* Now compute which IRQs must be blocked when servicing any
@@ -282,42 +191,6 @@
}
}
-#ifdef __HAVE_FAST_SOFTINTS
-static void
-ep93xx_do_pending(void)
-{
- static __cpu_simple_lock_t processing = __SIMPLELOCK_UNLOCKED;
- int new;
- u_int oldirqstate, oldirqstate2;
-
- if (__cpu_simple_lock_try(&processing) == 0)
- return;
-
- new = current_spl_level;
-
- oldirqstate = disable_interrupts(I32_bit);
-
-#define DO_SOFTINT(si)
\
- if ((ipending & ~vic1_imask[new]) & SI_TO_IRQBIT(si)) { \
- ipending &= ~SI_TO_IRQBIT(si); \
- current_spl_level = si_to_ipl[(si)]; \
- oldirqstate2 = enable_interrupts(I32_bit); \
- softintr_dispatch(si); \
- restore_interrupts(oldirqstate2); \
- current_spl_level = new; \
- }
-
- DO_SOFTINT(SI_SOFTSERIAL);
- DO_SOFTINT(SI_SOFTNET);
- DO_SOFTINT(SI_SOFTCLOCK);
- DO_SOFTINT(SI_SOFT);
-
- __cpu_simple_unlock(&processing);
-
- restore_interrupts(oldirqstate);
-}
-#endif
-
inline void
splx(int new)
{
@@ -325,8 +198,8 @@
u_int oldirqstate;
oldirqstate = disable_interrupts(I32_bit);
- old = current_spl_level;
- current_spl_level = new;
+ old = curcpl();
+ set_curcpl(new);
if (new != hardware_spl_level) {
hardware_spl_level = new;
ep93xx_set_intrmask(vic1_imask[new], vic2_imask[new]);
@@ -334,9 +207,7 @@
restore_interrupts(oldirqstate);
#ifdef __HAVE_FAST_SOFTINTS
- /* If there are software interrupts to process, do it. */
- if ((ipending & INT_SWMASK) & ~vic1_imask[new])
- ep93xx_do_pending();
+ cpu_dosoftints();
#endif
}
@@ -347,8 +218,8 @@
u_int oldirqstate;
oldirqstate = disable_interrupts(I32_bit);
- old = current_spl_level;
- current_spl_level = ipl;
+ old = curcpl();
+ set_curcpl(ipl);
restore_interrupts(oldirqstate);
return (old);
}
@@ -356,7 +227,7 @@
int
_spllower(int ipl)
{
- int old = current_spl_level;
+ int old = curcpl();
if (old <= ipl)
return (old);
@@ -364,22 +235,6 @@
return (old);
}
-#ifdef __HAVE_FAST_SOFTINTS
-void
-_setsoftintr(int si)
-{
- u_int oldirqstate;
-
- oldirqstate = disable_interrupts(I32_bit);
- ipending |= SI_TO_IRQBIT(si);
- restore_interrupts(oldirqstate);
-
- /* Process unmasked pending soft interrupts. */
- if ((ipending & INT_SWMASK) & ~vic1_imask[current_spl_level])
- ep93xx_do_pending();
-}
-#endif
-
/*
* ep93xx_intr_init:
*
@@ -404,7 +259,8 @@
NULL, (i < VIC_NIRQ ? "vic1" : "vic2"),
iq->iq_name);
}
- current_spl_level = 0;
+ curcpu()->ci_intr_depth = 0;
+ set_curcpl(0);
hardware_spl_level = 0;
/* All interrupts should use IRQ not FIQ */
@@ -472,7 +328,7 @@
u_int32_t vic2_hwpend;
int irq;
- pcpl = current_spl_level;
+ pcpl = curcpl();
vic1_hwpend = VIC1REG(EP93XX_VIC_IRQStatus);
vic2_hwpend = VIC2REG(EP93XX_VIC_IRQStatus);
@@ -490,9 +346,8 @@
iq = &intrq[irq];
iq->iq_ev.ev_count++;
uvmexp.intrs++;
- for (ih = TAILQ_FIRST(&iq->iq_list); ih != NULL;
- ih = TAILQ_NEXT(ih, ih_list)) {
- current_spl_level = ih->ih_ipl;
+ TAILQ_FOREACH(ih, &iq->iq_list, ih_list) {
+ set_curcpl(ih->ih_ipl);
oldirqstate = enable_interrupts(I32_bit);
(void) (*ih->ih_func)(ih->ih_arg ? ih->ih_arg : frame);
restore_interrupts(oldirqstate);
@@ -503,23 +358,19 @@
iq = &intrq[irq + VIC_NIRQ];
iq->iq_ev.ev_count++;
uvmexp.intrs++;
- for (ih = TAILQ_FIRST(&iq->iq_list); ih != NULL;
- ih = TAILQ_NEXT(ih, ih_list)) {
- current_spl_level = ih->ih_ipl;
+ TAILQ_FOREACH(ih, &iq->iq_list, ih_list) {
+ set_curcpl(ih->ih_ipl);
oldirqstate = enable_interrupts(I32_bit);
(void) (*ih->ih_func)(ih->ih_arg ? ih->ih_arg : frame);
restore_interrupts(oldirqstate);
}
}
- current_spl_level = pcpl;
+ set_curcpl(pcpl);
hardware_spl_level = pcpl;
ep93xx_set_intrmask(vic1_imask[pcpl], vic2_imask[pcpl]);
#ifdef __HAVE_FAST_SOFTINTS
- /* Check for pendings soft intrs. */
- if ((ipending & INT_SWMASK) & ~vic1_imask[pcpl]) {
- ep93xx_do_pending();
- }
+ cpu_dosoftints();
#endif
}
Index: src/sys/arch/arm/ep93xx/ep93xx_intr.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/ep93xx/ep93xx_intr.h,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -r1.3 -r1.4
--- src/sys/arch/arm/ep93xx/ep93xx_intr.h 6 Jan 2008 01:37:53 -0000
1.3
+++ src/sys/arch/arm/ep93xx/ep93xx_intr.h 27 Apr 2008 18:58:44 -0000
1.4
@@ -1,4 +1,4 @@
-/* $NetBSD: ep93xx_intr.h,v 1.3 2008/01/06 01:37:53 matt Exp $ */
+/* $NetBSD: ep93xx_intr.h,v 1.4 2008/04/27 18:58:44 matt Exp $ */
/*
* Copyright (c) 2004 Jesse Off
@@ -43,9 +43,6 @@
int _splraise(int);
int _spllower(int);
void splx(int);
-#ifdef __HAVE_FAST_SOFTINTS
-void _setsoftintr(int);
-#endif
#endif /* ! _LOCORE */
Index: src/sys/arch/arm/ep93xx/epclk.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/ep93xx/epclk.c,v
retrieving revision 1.11
retrieving revision 1.13
diff -u -r1.11 -r1.13
--- src/sys/arch/arm/ep93xx/epclk.c 20 Jan 2008 16:28:22 -0000 1.11
+++ src/sys/arch/arm/ep93xx/epclk.c 10 May 2008 15:31:04 -0000 1.13
@@ -1,4 +1,4 @@
-/* $NetBSD: epclk.c,v 1.11 2008/01/20 16:28:22 joerg Exp $ */
+/* $NetBSD: epclk.c,v 1.13 2008/05/10 15:31:04 martin Exp $ */
/*
* Copyright (c) 2004 Jesse Off
@@ -47,7 +47,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: epclk.c,v 1.11 2008/01/20 16:28:22 joerg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: epclk.c,v 1.13 2008/05/10 15:31:04 martin Exp $");
#include <sys/types.h>
#include <sys/param.h>
Index: src/sys/arch/arm/ep93xx/epcom.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/ep93xx/epcom.c,v
retrieving revision 1.16
retrieving revision 1.17
diff -u -r1.16 -r1.17
--- src/sys/arch/arm/ep93xx/epcom.c 6 Jan 2008 01:37:54 -0000 1.16
+++ src/sys/arch/arm/ep93xx/epcom.c 28 Apr 2008 20:23:14 -0000 1.17
@@ -1,4 +1,4 @@
-/* $NetBSD: epcom.c,v 1.16 2008/01/06 01:37:54 matt Exp $ */
+/* $NetBSD: epcom.c,v 1.17 2008/04/28 20:23:14 martin Exp $ */
/*
* Copyright (c) 1998, 1999, 2001, 2002, 2004 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -23,13 +23,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -80,7 +73,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: epcom.c,v 1.16 2008/01/06 01:37:54 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: epcom.c,v 1.17 2008/04/28 20:23:14 martin Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
Index: src/sys/arch/arm/ep93xx/epe.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/ep93xx/epe.c,v
retrieving revision 1.16
retrieving revision 1.18
diff -u -r1.16 -r1.18
--- src/sys/arch/arm/ep93xx/epe.c 20 Jan 2008 13:44:19 -0000 1.16
+++ src/sys/arch/arm/ep93xx/epe.c 10 May 2008 15:31:04 -0000 1.18
@@ -1,4 +1,4 @@
-/* $NetBSD: epe.c,v 1.16 2008/01/20 13:44:19 dogcow Exp $ */
+/* $NetBSD: epe.c,v 1.18 2008/05/10 15:31:04 martin Exp $ */
/*
* Copyright (c) 2004 Jesse Off
@@ -34,7 +34,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: epe.c,v 1.16 2008/01/20 13:44:19 dogcow Exp $");
+__KERNEL_RCSID(0, "$NetBSD: epe.c,v 1.18 2008/05/10 15:31:04 martin Exp $");
#include <sys/types.h>
#include <sys/param.h>
Index: src/sys/arch/arm/ep93xx/epsoc.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/ep93xx/epsoc.c,v
retrieving revision 1.6
retrieving revision 1.8
diff -u -r1.6 -r1.8
--- src/sys/arch/arm/ep93xx/epsoc.c 8 Mar 2006 23:46:22 -0000 1.6
+++ src/sys/arch/arm/ep93xx/epsoc.c 10 May 2008 15:31:04 -0000 1.8
@@ -1,4 +1,4 @@
-/* $NetBSD: epsoc.c,v 1.6 2006/03/08 23:46:22 lukem Exp $ */
+/* $NetBSD: epsoc.c,v 1.8 2008/05/10 15:31:04 martin Exp $ */
/*
* Copyright (c) 2004 Jesse Off
@@ -34,7 +34,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: epsoc.c,v 1.6 2006/03/08 23:46:22 lukem Exp $");
+__KERNEL_RCSID(0, "$NetBSD: epsoc.c,v 1.8 2008/05/10 15:31:04 martin Exp $");
#include <sys/types.h>
#include <sys/param.h>
Index: src/sys/arch/arm/footbridge/footbridge_intr.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/footbridge/footbridge_intr.h,v
retrieving revision 1.12
retrieving revision 1.13
diff -u -r1.12 -r1.13
--- src/sys/arch/arm/footbridge/footbridge_intr.h 4 Jan 2008 21:58:03
-0000 1.12
+++ src/sys/arch/arm/footbridge/footbridge_intr.h 27 Apr 2008 18:58:44
-0000 1.13
@@ -1,4 +1,4 @@
-/* $NetBSD: footbridge_intr.h,v 1.12 2008/01/04 21:58:03 ad Exp $ */
+/* $NetBSD: footbridge_intr.h,v 1.13 2008/04/27 18:58:44 matt Exp $
*/
/*
* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
@@ -74,31 +74,33 @@
/* only call this with interrupts off */
static inline void __attribute__((__unused__))
- footbridge_set_intrmask(void)
+footbridge_set_intrmask(void)
{
- extern volatile uint32_t intr_enabled;
- /* fetch once so we write the same number to both registers */
- uint32_t tmp = intr_enabled & ICU_INT_HWMASK;
+ extern volatile uint32_t intr_enabled;
+ volatile uint32_t * const dc21285_armcsr_vbase =
+ (volatile uint32_t *)(DC21285_ARMCSR_VBASE);
+
+ /* fetch once so we write the same number to both registers */
+ uint32_t tmp = intr_enabled & ICU_INT_HWMASK;
- ((volatile uint32_t*)(DC21285_ARMCSR_VBASE))[IRQ_ENABLE_SET>>2] = tmp;
- ((volatile uint32_t*)(DC21285_ARMCSR_VBASE))[IRQ_ENABLE_CLEAR>>2] = ~tmp;
+ dc21285_armcsr_vbase[IRQ_ENABLE_SET>>2] = tmp;
+ dc21285_armcsr_vbase[IRQ_ENABLE_CLEAR>>2] = ~tmp;
}
static inline void __attribute__((__unused__))
-footbridge_splx(int newspl)
+footbridge_splx(int ipl)
{
+ extern int footbridge_imask[];
extern volatile uint32_t intr_enabled;
- extern volatile int current_spl_level;
extern volatile int footbridge_ipending;
- extern void footbridge_do_pending(void);
int oldirqstate, hwpend;
/* Don't let the compiler re-order this code with preceding code */
__insn_barrier();
- current_spl_level = newspl;
+ set_curcpl(ipl);
- hwpend = (footbridge_ipending & ICU_INT_HWMASK) & ~newspl;
+ hwpend = footbridge_ipending & ICU_INT_HWMASK & ~footbridge_imask[ipl];
if (hwpend != 0) {
oldirqstate = disable_interrupts(I32_bit);
intr_enabled |= hwpend;
@@ -106,19 +108,18 @@
restore_interrupts(oldirqstate);
}
- if ((footbridge_ipending & INT_SWMASK) & ~newspl)
- footbridge_do_pending();
+#ifdef __HAVE_FAST_SOFTINTS
+ cpu_dosoftints();
+#endif
}
static inline int __attribute__((__unused__))
footbridge_splraise(int ipl)
{
- extern volatile int current_spl_level;
- extern int footbridge_imask[];
int old;
- old = current_spl_level;
- current_spl_level |= footbridge_imask[ipl];
+ old = curcpl();
+ set_curcpl(ipl);
/* Don't let the compiler re-order this code with subsequent code */
__insn_barrier();
@@ -129,11 +130,9 @@
static inline int __attribute__((__unused__))
footbridge_spllower(int ipl)
{
- extern volatile int current_spl_level;
- extern int footbridge_imask[];
- int old = current_spl_level;
+ int old = curcpl();
- footbridge_splx(footbridge_imask[ipl]);
+ footbridge_splx(ipl);
return(old);
}
@@ -184,9 +183,6 @@
#include <sys/spl.h>
-/* Use generic software interrupt support. */
-#include <arm/softintr.h>
-
/* footbridge has 32 interrupt lines */
#define NIRQ 32
@@ -206,6 +202,7 @@
int iq_mask; /* IRQs to mask while handling */
int iq_levels; /* IPL_*'s this IRQ has */
int iq_ist; /* share type */
+ int iq_ipl; /* max ipl */
char iq_name[IRQNAMESIZE]; /* interrupt name */
};
Index: src/sys/arch/arm/footbridge/footbridge_irqhandler.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/footbridge/footbridge_irqhandler.c,v
retrieving revision 1.20
retrieving revision 1.21
diff -u -r1.20 -r1.21
--- src/sys/arch/arm/footbridge/footbridge_irqhandler.c 6 Jan 2008 12:17:13
-0000 1.20
+++ src/sys/arch/arm/footbridge/footbridge_irqhandler.c 27 Apr 2008 18:58:44
-0000 1.21
@@ -1,4 +1,4 @@
-/* $NetBSD: footbridge_irqhandler.c,v 1.20 2008/01/06 12:17:13 chris Exp $
*/
+/* $NetBSD: footbridge_irqhandler.c,v 1.21 2008/04/27 18:58:44 matt Exp $
*/
/*
* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
@@ -40,7 +40,7 @@
#endif
#include <sys/cdefs.h>
-__KERNEL_RCSID(0,"$NetBSD: footbridge_irqhandler.c,v 1.20 2008/01/06 12:17:13
chris Exp $");
+__KERNEL_RCSID(0,"$NetBSD: footbridge_irqhandler.c,v 1.21 2008/04/27 18:58:44
matt Exp $");
#include "opt_irqstats.h"
@@ -70,40 +70,15 @@
/* Software copy of the IRQs we have enabled. */
volatile uint32_t intr_enabled;
-/* Current interrupt priority level */
-volatile int current_spl_level;
-
/* Interrupts pending */
volatile int footbridge_ipending;
void footbridge_intr_dispatch(struct clockframe *frame);
-const struct evcnt *footbridge_pci_intr_evcnt __P((void *, pci_intr_handle_t));
-
-void footbridge_do_pending(void);
-
-static const uint32_t si_to_irqbit[SI_NQUEUES] =
- { IRQ_SOFTINT,
- IRQ_RESERVED0,
- IRQ_RESERVED1,
- IRQ_RESERVED2 };
-
-#define SI_TO_IRQBIT(si) (1U << si_to_irqbit[(si)])
-
-/*
- * Map a software interrupt queue to an interrupt priority level.
- */
-static const int si_to_ipl[SI_NQUEUES] = {
- IPL_SOFTCLOCK, /* SI_SOFTCLOCK */
- IPL_SOFTBIO, /* SI_SOFTBIO */
- IPL_SOFTNET, /* SI_SOFTNET */
- IPL_SOFTSERIAL, /* SI_SOFTSERIAL */
-};
+const struct evcnt *footbridge_pci_intr_evcnt(void *, pci_intr_handle_t);
const struct evcnt *
-footbridge_pci_intr_evcnt(pcv, ih)
- void *pcv;
- pci_intr_handle_t ih;
+footbridge_pci_intr_evcnt(void *pcv, pci_intr_handle_t ih)
{
/* XXX check range is valid */
#if NISA > 0
@@ -118,7 +93,6 @@
footbridge_enable_irq(int irq)
{
intr_enabled |= (1U << irq);
-
footbridge_set_intrmask();
}
@@ -144,9 +118,9 @@
int levels = 0;
iq = &footbridge_intrq[irq];
footbridge_disable_irq(irq);
- for (ih = TAILQ_FIRST(&iq->iq_list); ih != NULL;
- ih = TAILQ_NEXT(ih, ih_list))
+ TAILQ_FOREACH(ih, &iq->iq_list, ih_list) {
levels |= (1U << ih->ih_ipl);
+ }
iq->iq_levels = levels;
}
@@ -161,39 +135,32 @@
}
/* IPL_NONE must open up all interrupts */
- footbridge_imask[IPL_NONE] = 0;
-
- /*
- * Initialize the soft interrupt masks to block themselves.
- */
- footbridge_imask[IPL_SOFTCLOCK] = SI_TO_IRQBIT(SI_SOFTCLOCK);
- footbridge_imask[IPL_SOFTBIO] = SI_TO_IRQBIT(SI_SOFTBIO);
- footbridge_imask[IPL_SOFTNET] = SI_TO_IRQBIT(SI_SOFTNET);
- footbridge_imask[IPL_SOFTSERIAL] = SI_TO_IRQBIT(SI_SOFTSERIAL);
+ KASSERT(footbridge_imask[IPL_NONE] == 0);
+ KASSERT(footbridge_imask[IPL_SOFTCLOCK] == 0);
+ KASSERT(footbridge_imask[IPL_SOFTBIO] == 0);
+ KASSERT(footbridge_imask[IPL_SOFTNET] == 0);
+ KASSERT(footbridge_imask[IPL_SOFTSERIAL] == 0);
/*
* Enforce a hierarchy that gives "slow" device (or devices with
* limited input buffer space/"real-time" requirements) a better
* chance at not dropping data.
*/
- footbridge_imask[IPL_SOFTBIO] |= footbridge_imask[IPL_SOFTCLOCK];
- footbridge_imask[IPL_SOFTNET] |= footbridge_imask[IPL_SOFTBIO];
- footbridge_imask[IPL_SOFTSERIAL] |= footbridge_imask[IPL_SOFTNET];
- footbridge_imask[IPL_VM] |= footbridge_imask[IPL_SOFTSERIAL];
+ KASSERT(footbridge_imask[IPL_VM] != 0);
footbridge_imask[IPL_SCHED] |= footbridge_imask[IPL_VM];
footbridge_imask[IPL_HIGH] |= footbridge_imask[IPL_SCHED];
/*
* Calculate the ipl level to go to when handling this interrupt
*/
- for (irq = 0; irq < NIRQ; irq++) {
+ for (irq = 0, iq = footbridge_intrq; irq < NIRQ; irq++, iq++) {
int irqs = (1U << irq);
- iq = &footbridge_intrq[irq];
- if (TAILQ_FIRST(&iq->iq_list) != NULL)
+ if (!TAILQ_EMPTY(&iq->iq_list)) {
footbridge_enable_irq(irq);
- for (ih = TAILQ_FIRST(&iq->iq_list); ih != NULL;
- ih = TAILQ_NEXT(ih, ih_list))
- irqs |= footbridge_imask[ih->ih_ipl];
+ TAILQ_FOREACH(ih, &iq->iq_list, ih_list) {
+ irqs |= footbridge_imask[ih->ih_ipl];
+ }
+ }
iq->iq_mask = irqs;
}
}
@@ -218,67 +185,17 @@
}
void
-footbridge_do_pending(void)
-{
- static __cpu_simple_lock_t processing = __SIMPLELOCK_UNLOCKED;
- uint32_t new, oldirqstate;
-
- if (__cpu_simple_lock_try(&processing) == 0)
- return;
-
- new = current_spl_level;
-
- oldirqstate = disable_interrupts(I32_bit);
-
-#ifdef __HAVE_FAST_SOFTINTS
-#define DO_SOFTINT(si)
\
- if ((footbridge_ipending & ~new) & SI_TO_IRQBIT(si)) { \
- footbridge_ipending &= ~SI_TO_IRQBIT(si); \
- current_spl_level |= footbridge_imask[si_to_ipl[(si)]]; \
- restore_interrupts(oldirqstate); \
- softintr_dispatch(si); \
- oldirqstate = disable_interrupts(I32_bit); \
- current_spl_level = new; \
- }
- DO_SOFTINT(SI_SOFTSERIAL);
- DO_SOFTINT(SI_SOFTNET);
- DO_SOFTINT(SI_SOFTCLOCK);
- DO_SOFTINT(SI_SOFT);
-#endif
- __cpu_simple_unlock(&processing);
-
- restore_interrupts(oldirqstate);
-}
-
-
-/* called from splhigh, so the matching splx will set the interrupt up.*/
-void
-_setsoftintr(int si)
-{
- int oldirqstate;
-
- oldirqstate = disable_interrupts(I32_bit);
- footbridge_ipending |= SI_TO_IRQBIT(si);
- restore_interrupts(oldirqstate);
-
- /* Process unmasked pending soft interrupts. */
- if ((footbridge_ipending & INT_SWMASK) & ~current_spl_level)
- footbridge_do_pending();
-}
-
-void
footbridge_intr_init(void)
{
struct intrq *iq;
int i;
intr_enabled = 0;
- current_spl_level = 0xffffffff;
+ set_curcpl(0xffffffff);
footbridge_ipending = 0;
footbridge_set_intrmask();
- for (i = 0; i < NIRQ; i++) {
- iq = &footbridge_intrq[i];
+ for (i = 0, iq = footbridge_intrq; i < NIRQ; i++, iq++) {
TAILQ_INIT(&iq->iq_list);
sprintf(iq->iq_name, "irq %d", i);
@@ -351,11 +268,9 @@
restore_interrupts(oldirqstate);
}
-static uint32_t footbridge_intstatus(void);
-
-static inline uint32_t footbridge_intstatus()
+static inline uint32_t footbridge_intstatus(void)
{
- return ((volatile uint32_t*)(DC21285_ARMCSR_VBASE))[IRQ_STATUS>>2];
+ return ((volatile uint32_t*)(DC21285_ARMCSR_VBASE))[IRQ_STATUS>>2];
}
/* called with external interrupts disabled */
@@ -364,9 +279,10 @@
{
struct intrq *iq;
struct intrhand *ih;
- int oldirqstate, pcpl, irq, ibit, hwpend;
-
- pcpl = current_spl_level;
+ int oldirqstate, irq, ibit, hwpend;
+ struct cpu_info * const ci = curcpu();
+ const int ppl = ci->ci_cpl;
+ const int imask = footbridge_imask[ppl];
hwpend = footbridge_intstatus();
@@ -384,7 +300,7 @@
hwpend &= ~ibit;
- if (pcpl & ibit) {
+ if (imask & ibit) {
/*
* IRQ is masked; mark it as pending and check
* the next one. Note: the IRQ is already disabled.
@@ -398,16 +314,16 @@
iq = &footbridge_intrq[irq];
iq->iq_ev.ev_count++;
uvmexp.intrs++;
- current_spl_level |= iq->iq_mask;
- oldirqstate = enable_interrupts(I32_bit);
- for (ih = TAILQ_FIRST(&iq->iq_list);
- ((ih != NULL) && (intr_rc != 1));
- ih = TAILQ_NEXT(ih, ih_list)) {
+ TAILQ_FOREACH(ih, &iq->iq_list, ih_list) {
+ ci->ci_cpl = ih->ih_ipl;
+ oldirqstate = enable_interrupts(I32_bit);
intr_rc = (*ih->ih_func)(ih->ih_arg ? ih->ih_arg :
frame);
+ restore_interrupts(oldirqstate);
+ if (intr_rc != 1)
+ break;
}
- restore_interrupts(oldirqstate);
- current_spl_level = pcpl;
+ ci->ci_cpl = ppl;
/* Re-enable this interrupt now that's it's cleared. */
intr_enabled |= ibit;
@@ -415,17 +331,10 @@
/* also check for any new interrupts that may have occurred,
* that we can handle at this spl level */
- hwpend |= (footbridge_ipending & ICU_INT_HWMASK) & ~pcpl;
+ hwpend |= (footbridge_ipending & ICU_INT_HWMASK) & ~imask;
}
- /* Check for pendings soft intrs. */
- if ((footbridge_ipending & INT_SWMASK) & ~current_spl_level) {
- /*
- * XXX this feels the wrong place to enable irqs, as some
- * soft ints are higher priority than hardware irqs
- */
- oldirqstate = enable_interrupts(I32_bit);
- footbridge_do_pending();
- restore_interrupts(oldirqstate);
- }
+#ifdef __HAVE_FAST_SOFTINTS
+ cpu_dosoftints();
+#endif /* __HAVE_FAST_SOFTINTS */
}
Index: src/sys/arch/arm/footbridge/footbridge_pci.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/footbridge/footbridge_pci.c,v
retrieving revision 1.14
retrieving revision 1.15
diff -u -r1.14 -r1.15
--- src/sys/arch/arm/footbridge/footbridge_pci.c 14 Dec 2007 11:08:03
-0000 1.14
+++ src/sys/arch/arm/footbridge/footbridge_pci.c 10 May 2008 15:29:25
-0000 1.15
@@ -1,4 +1,4 @@
-/* $NetBSD: footbridge_pci.c,v 1.14 2007/12/14 11:08:03 chris Exp $
*/
+/* $NetBSD: footbridge_pci.c,v 1.15 2008/05/10 15:29:25 chris Exp $
*/
/*
* Copyright (c) 1997,1998 Mark Brinicombe.
@@ -35,7 +35,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: footbridge_pci.c,v 1.14 2007/12/14 11:08:03 chris
Exp $");
+__KERNEL_RCSID(0, "$NetBSD: footbridge_pci.c,v 1.15 2008/05/10 15:29:25 chris
Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -339,7 +339,7 @@
void *pcv;
pci_intr_handle_t ih;
{
- static char irqstr[8]; /* 4 + 2 + NULL + sanity */
+ static char irqstr[7+2+3]; /* "isairq dd" + NULL + sanity */
#ifdef PCI_DEBUG
printf("footbridge_pci_intr_string(pcv=%p, ih=0x%lx)\n", pcv, ih);
Index: src/sys/arch/arm/footbridge/isa/isa_io_asm.S
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/footbridge/isa/isa_io_asm.S,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- src/sys/arch/arm/footbridge/isa/isa_io_asm.S 10 Feb 2002 12:26:01
-0000 1.1
+++ src/sys/arch/arm/footbridge/isa/isa_io_asm.S 28 Apr 2008 20:23:14
-0000 1.2
@@ -1,4 +1,4 @@
-/* $NetBSD: isa_io_asm.S,v 1.1 2002/02/10 12:26:01 chris Exp $ */
+/* $NetBSD: isa_io_asm.S,v 1.2 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 1997 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/footbridge/isa/isa_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/footbridge/isa/isa_machdep.c,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -r1.7 -r1.8
--- src/sys/arch/arm/footbridge/isa/isa_machdep.c 3 Dec 2007 15:33:18
-0000 1.7
+++ src/sys/arch/arm/footbridge/isa/isa_machdep.c 28 Apr 2008 20:23:14
-0000 1.8
@@ -1,4 +1,4 @@
-/* $NetBSD: isa_machdep.c,v 1.7 2007/12/03 15:33:18 ad Exp $ */
+/* $NetBSD: isa_machdep.c,v 1.8 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 1996-1998 The NetBSD Foundation, Inc.
@@ -16,13 +16,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -72,7 +65,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: isa_machdep.c,v 1.7 2007/12/03 15:33:18 ad Exp $");
+__KERNEL_RCSID(0, "$NetBSD: isa_machdep.c,v 1.8 2008/04/28 20:23:14 martin Exp
$");
#include "opt_irqstats.h"
Index: src/sys/arch/arm/footbridge/isa/isadma_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/footbridge/isa/isadma_machdep.c,v
retrieving revision 1.9
retrieving revision 1.10
diff -u -r1.9 -r1.10
--- src/sys/arch/arm/footbridge/isa/isadma_machdep.c 4 Mar 2007 17:55:10
-0000 1.9
+++ src/sys/arch/arm/footbridge/isa/isadma_machdep.c 28 Apr 2008 20:23:14
-0000 1.10
@@ -1,4 +1,4 @@
-/* $NetBSD: isadma_machdep.c,v 1.9 2007/03/04 17:55:10 chris Exp $ */
+/* $NetBSD: isadma_machdep.c,v 1.10 2008/04/28 20:23:14 martin Exp $
*/
#define ISA_DMA_STATS
@@ -18,13 +18,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -40,7 +33,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: isadma_machdep.c,v 1.9 2007/03/04 17:55:10 chris
Exp $");
+__KERNEL_RCSID(0, "$NetBSD: isadma_machdep.c,v 1.10 2008/04/28 20:23:14 martin
Exp $");
#include <sys/param.h>
#include <sys/systm.h>
Index: src/sys/arch/arm/footbridge/isa/isapnp_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/footbridge/isa/isapnp_machdep.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- src/sys/arch/arm/footbridge/isa/isapnp_machdep.c 23 Mar 2003 14:12:26
-0000 1.2
+++ src/sys/arch/arm/footbridge/isa/isapnp_machdep.c 28 Apr 2008 20:23:14
-0000 1.3
@@ -1,4 +1,4 @@
-/* $NetBSD: isapnp_machdep.c,v 1.2 2003/03/23 14:12:26 chris Exp $ */
+/* $NetBSD: isapnp_machdep.c,v 1.3 2008/04/28 20:23:14 martin Exp $
*/
/*-
* Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
@@ -16,13 +16,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -85,7 +78,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: isapnp_machdep.c,v 1.2 2003/03/23 14:12:26 chris
Exp $");
+__KERNEL_RCSID(0, "$NetBSD: isapnp_machdep.c,v 1.3 2008/04/28 20:23:14 martin
Exp $");
#include <sys/param.h>
#include <sys/systm.h>
Index: src/sys/arch/arm/footbridge/isa/sysbeep_isa.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/footbridge/isa/sysbeep_isa.c,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -r1.5 -r1.6
--- src/sys/arch/arm/footbridge/isa/sysbeep_isa.c 23 Mar 2003 14:12:26
-0000 1.5
+++ src/sys/arch/arm/footbridge/isa/sysbeep_isa.c 28 Apr 2008 20:23:14
-0000 1.6
@@ -1,4 +1,4 @@
-/* $NetBSD: sysbeep_isa.c,v 1.5 2003/03/23 14:12:26 chris Exp $ */
+/* $NetBSD: sysbeep_isa.c,v 1.6 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -37,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sysbeep_isa.c,v 1.5 2003/03/23 14:12:26 chris Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: sysbeep_isa.c,v 1.6 2008/04/28 20:23:14 martin Exp
$");
#include <sys/param.h>
#include <sys/systm.h>
Index: src/sys/arch/arm/include/armreg.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/armreg.h,v
retrieving revision 1.37
retrieving revision 1.38
diff -u -r1.37 -r1.38
--- src/sys/arch/arm/include/armreg.h 6 Jan 2007 00:50:54 -0000 1.37
+++ src/sys/arch/arm/include/armreg.h 27 Apr 2008 18:58:44 -0000 1.38
@@ -1,4 +1,4 @@
-/* $NetBSD: armreg.h,v 1.37 2007/01/06 00:50:54 christos Exp $ */
+/* $NetBSD: armreg.h,v 1.38 2008/04/27 18:58:44 matt Exp $ */
/*
* Copyright (c) 1998, 2001 Ben Harris
@@ -196,6 +196,9 @@
#define CPU_ID_ARM1026EJS 0x4106a260
#define CPU_ID_ARM1136JS 0x4107b360
#define CPU_ID_ARM1136JSR1 0x4117b360
+#define CPU_ID_ARM1176JS 0x410fb760
+#define CPU_ID_CORTEXA8R1 0x411fc080
+#define CPU_ID_CORTEXA8R2 0x412fc080
#define CPU_ID_SA110 0x4401a100
#define CPU_ID_SA1100 0x4401a110
#define CPU_ID_TI925T 0x54029250
@@ -287,6 +290,8 @@
#define CPU_CONTROL_VECRELOC 0x00002000 /* V: Vector relocation */
#define CPU_CONTROL_ROUNDROBIN 0x00004000 /* RR: Predictable replacement */
#define CPU_CONTROL_V4COMPAT 0x00008000 /* L4: ARMv4 compat LDR R15 etc */
+#define CPU_CONTROL_UNAL_ENABLE 0x00040000 /* U: unaligned data access
*/
+#define CPU_CONTROL_XP_ENABLE 0x00080000 /* XP: extended page table */
#define CPU_CONTROL_IDC_ENABLE CPU_CONTROL_DC_ENABLE
@@ -314,6 +319,7 @@
#define CPU_CT_xSIZE_M (1U << 2) /* multiplier */
#define CPU_CT_xSIZE_ASSOC(x) (((x) >> 3) & 0x7) /*
associativity */
#define CPU_CT_xSIZE_SIZE(x) (((x) >> 6) & 0x7) /* size */
+#define CPU_CT_xSIZE_P (1U << 11) /* need to
page-color */
/* Fault status register definitions */
@@ -362,4 +368,50 @@
#define THUMB_INSN_SIZE 2 /* Some are 4 bytes. */
-#endif
+/*
+ * Defines and such for arm11 Performance Monitor Counters (p15, c15, c12, 0)
+ */
+#define ARM11_PMCCTL_E __BIT(0) /* enable all three counters */
+#define ARM11_PMCCTL_P __BIT(1) /* reset both Count Registers
to zero */
+#define ARM11_PMCCTL_C __BIT(2) /* reset the Cycle Counter
Register to zero */
+#define ARM11_PMCCTL_D __BIT(3) /* cycle count divide by 64 */
+#define ARM11_PMCCTL_EC0 __BIT(4) /* Enable Counter Register 0
interrupt */
+#define ARM11_PMCCTL_EC1 __BIT(5) /* Enable Counter Register 1
interrupt */
+#define ARM11_PMCCTL_ECC __BIT(6) /* Enable Cycle Counter
interrupt */
+#define ARM11_PMCCTL_SBZa __BIT(7) /* UNP/SBZ */
+#define ARM11_PMCCTL_CR0 __BIT(8) /* Count Register 0 overflow
flag */
+#define ARM11_PMCCTL_CR1 __BIT(9) /* Count Register 1 overflow
flag */
+#define ARM11_PMCCTL_CCR __BIT(10) /* Cycle Count Register
overflow flag */
+#define ARM11_PMCCTL_X __BIT(11) /* Enable Export of the events
to the event bus */
+#define ARM11_PMCCTL_EVT1 __BITS(19,12) /* source of events for Count
Register 1 */
+#define ARM11_PMCCTL_EVT0 __BITS(27,20) /* source of events for Count
Register 0 */
+#define ARM11_PMCCTL_SBZb __BITS(31,28) /* UNP/SBZ */
+#define ARM11_PMCCTL_SBZ \
+ (ARM11_PMCCTL_SBZa | ARM11_PMCCTL_SBZb)
+
+#define ARM11_PMCEVT_ICACHE_MISS 0 /* Instruction Cache
Miss */
+#define ARM11_PMCEVT_ISTREAM_STALL 1 /* Instruction Stream
Stall */
+#define ARM11_PMCEVT_IUTLB_MISS 2 /* Instruction uTLB
Miss */
+#define ARM11_PMCEVT_DUTLB_MISS 3 /* Data uTLB Miss */
+#define ARM11_PMCEVT_BRANCH 4 /* Branch Inst.
Executed */
+#define ARM11_PMCEVT_BRANCH_MISS 6 /* Branch mispredicted
*/
+#define ARM11_PMCEVT_INST_EXEC 7 /* Instruction Executed
*/
+#define ARM11_PMCEVT_DCACHE_ACCESS0 9 /* Data Cache Access */
+#define ARM11_PMCEVT_DCACHE_ACCESS1 10 /* Data Cache Access */
+#define ARM11_PMCEVT_DCACHE_MISS 11 /* Data Cache Miss */
+#define ARM11_PMCEVT_DCACHE_WRITEBACK 12 /* Data Cache Writeback
*/
+#define ARM11_PMCEVT_PC_CHANGE 13 /* Software PC change */
+#define ARM11_PMCEVT_TLB_MISS 15 /* Main TLB Miss */
+#define ARM11_PMCEVT_DATA_ACCESS 16 /* non-cached data
access */
+#define ARM11_PMCEVT_LSU_STALL 17 /* Load/Store Unit
stall */
+#define ARM11_PMCEVT_WBUF_DRAIN 18 /* Write buffer drained
*/
+#define ARM11_PMCEVT_ETMEXTOUT0 32 /* ETMEXTOUT[0]
asserted */
+#define ARM11_PMCEVT_ETMEXTOUT1 33 /* ETMEXTOUT[1]
asserted */
+#define ARM11_PMCEVT_ETMEXTOUT 34 /* ETMEXTOUT[0 & 1] */
+#define ARM11_PMCEVT_CALL_EXEC 35 /* Procedure call
executed */
+#define ARM11_PMCEVT_RETURN_EXEC 36 /* Return executed */
+#define ARM11_PMCEVT_RETURN_HIT 37 /* return address
predicted */
+#define ARM11_PMCEVT_RETURN_MISS 38 /* return addr.
mispredicted */
+#define ARM11_PMCEVT_CYCLE 255 /* Increment each cycle
*/
+
+#endif /* _ARM_ARMREG_H */
Index: src/sys/arch/arm/include/asm.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/asm.h,v
retrieving revision 1.10
retrieving revision 1.11
diff -u -r1.10 -r1.11
--- src/sys/arch/arm/include/asm.h 17 Oct 2007 19:53:41 -0000 1.10
+++ src/sys/arch/arm/include/asm.h 27 Apr 2008 18:58:44 -0000 1.11
@@ -1,4 +1,4 @@
-/* $NetBSD: asm.h,v 1.10 2007/10/17 19:53:41 garbled Exp $ */
+/* $NetBSD: asm.h,v 1.11 2008/04/27 18:58:44 matt Exp $ */
/*
* Copyright (c) 1990 The Regents of the University of California.
@@ -70,12 +70,14 @@
*/
#define _ASM_TYPE_FUNCTION %function
#define _ASM_TYPE_OBJECT %object
+#ifdef __thumb__
+#define _ENTRY(x) \
+ .text; _ALIGN_TEXT; .globl x; .type x,_ASM_TYPE_FUNCTION; .thumb_func;
x:
+#else
#define _ENTRY(x) \
.text; _ALIGN_TEXT; .globl x; .type x,_ASM_TYPE_FUNCTION; x:
+#endif
#define _END(x) .size x,.-x
-#define END(y) _END(_C_LABEL(y))
-#define ASEND(y) _END(_ASM_LABEL(y))
-
#ifdef GPROF
# ifdef __ELF__
@@ -91,22 +93,51 @@
#define ENTRY(y) _ENTRY(_C_LABEL(y)); _PROF_PROLOGUE
#define ENTRY_NP(y) _ENTRY(_C_LABEL(y))
+#define END(y) _END(_C_LABEL(y))
#define ASENTRY(y) _ENTRY(_ASM_LABEL(y)); _PROF_PROLOGUE
#define ASENTRY_NP(y) _ENTRY(_ASM_LABEL(y))
-#define END(y) _END(_C_LABEL(y))
#define ASEND(y) _END(_ASM_LABEL(y))
#define ASMSTR .asciz
#if defined(__ELF__) && defined(PIC)
+#ifdef __thumb__
+#define PLT_SYM(x) x
+#define GOT_SYM(x) PIC_SYM(x, GOTOFF)
+#define GOT_GET(x,got,sym) \
+ ldr x, sym; \
+ add x, got; \
+ ldr x, [x]
+#else
+#define PLT_SYM(x) PIC_SYM(x, PLT)
+#define GOT_SYM(x) PIC_SYM(x, GOT)
+#define GOT_GET(x,got,sym) \
+ ldr x, sym; \
+ ldr x, [x, got]
+#endif /* __thumb__ */
+
+#define GOT_INIT(got,gotsym,pclabel) \
+ ldr got, gotsym; \
+ add got, got, pc; \
+ pclabel:
+#define GOT_INITSYM(gotsym,pclabel) \
+ gotsym: .word _C_LABEL(_GLOBAL_OFFSET_TABLE_) + (. - (pclabel+4))
+
#ifdef __STDC__
#define PIC_SYM(x,y) x ## ( ## y ## )
#else
#define PIC_SYM(x,y) x/**/(/**/y/**/)
#endif
+
#else
+#define PLT_SYM(x) x
+#define GOT_SYM(x) x
+#define GOT_GET(x,got,sym) \
+ ldr x, sym;
+#define GOT_INIT(got,gotsym,pclabel)
+#define GOT_INITSYM(gotsym,pclabel)
#define PIC_SYM(x,y) x
-#endif
+#endif /* ELF && PIC */
#ifdef __ELF__
#define RCSID(x) .section ".ident"; .asciz x
@@ -141,24 +172,26 @@
.stabs __STRING(_/**/sym),1,0,0,0
#endif /* __STDC__ */
-#if defined (_ARM_ARCH_6)
-#define GET_CPUINFO(rX) mrc p15, 0, rX, c13, c0, 4
-#endif
-
-#if defined (_ARM_ARCH_4T)
-# define RET bx lr
-# ifdef __STDC__
-# define RETc(c) bx##c lr
+#ifdef __thumb__
+# define XPUSH push
+# define XPOP pop
+# define XPOPRET pop {pc}
+#else
+# define XPUSH stmfd sp!,
+# define XPOP ldmfd sp!,
+# ifdef _ARM_ARCH_5
+# define XPOPRET ldmfd sp!, {pc}
# else
-# define RETc(c) bx/**/c lr
+# define XPOPRET ldmfd sp!, {lr}; mov pc, lr
# endif
+#endif
+
+#if defined (_ARM_ARCH_4T)
+# define RET bx lr
+# define RETc(c) __CONCAT(bx,c) lr
#else
-# define RET mov pc, lr
-# ifdef __STDC__
-# define RETc(c) mov##c pc, lr
-# else
-# define RETc(c) mov/**/c pc, lr
-# endif
+# define RET mov pc, lr
+# define RETc(c) __CONCAT(mov,c) pc, lr
#endif
#endif /* !_ARM_ASM_H_ */
Index: src/sys/arch/arm/include/bus.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/bus.h,v
retrieving revision 1.18
retrieving revision 1.19
diff -u -r1.18 -r1.19
--- src/sys/arch/arm/include/bus.h 4 Mar 2007 05:59:37 -0000 1.18
+++ src/sys/arch/arm/include/bus.h 28 Apr 2008 20:23:14 -0000 1.19
@@ -1,4 +1,4 @@
-/* $NetBSD: bus.h,v 1.18 2007/03/04 05:59:37 christos Exp $ */
+/* $NetBSD: bus.h,v 1.19 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
@@ -16,13 +16,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/include/byte_swap.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/byte_swap.h,v
retrieving revision 1.6
retrieving revision 1.8
diff -u -r1.6 -r1.8
--- src/sys/arch/arm/include/byte_swap.h 30 Jan 2006 22:46:35 -0000
1.6
+++ src/sys/arch/arm/include/byte_swap.h 28 Apr 2008 20:23:14 -0000
1.8
@@ -1,4 +1,4 @@
-/* $NetBSD: byte_swap.h,v 1.6 2006/01/30 22:46:35 dsl Exp $ */
+/* $NetBSD: byte_swap.h,v 1.8 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 1997, 1999, 2002 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -47,13 +40,16 @@
static __inline uint32_t
__byte_swap_u32_variable(uint32_t v)
{
+#ifdef _ARM_ARCH_6
+ __asm("rev\t%0, %1" : "=r" (v) : "0" (v));
+#else
uint32_t t1;
t1 = v ^ ((v << 16) | (v >> 16));
t1 &= 0xff00ffffU;
v = (v >> 8) | (v << 24);
v ^= (t1 >> 8);
-
+#endif
return (v);
}
@@ -62,12 +58,19 @@
__byte_swap_u16_variable(uint16_t v)
{
+#ifdef _ARM_ARCH_6
+ __asm("rev16\t%0, %1" : "=r" (v) : "0" (v));
+#elif !defined(__thumb__)
__asm volatile(
"mov %0, %1, ror #8\n"
"orr %0, %0, %0, lsr #16\n"
"bic %0, %0, %0, lsl #16"
: "=r" (v)
: "0" (v));
+#else
+ v &= 0xffff;
+ v = (v >> 8) | (v << 8);
+#endif
return (v);
}
Index: src/sys/arch/arm/include/cpu.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/cpu.h,v
retrieving revision 1.53
retrieving revision 1.54
diff -u -r1.53 -r1.54
--- src/sys/arch/arm/include/cpu.h 15 Mar 2008 10:16:43 -0000 1.53
+++ src/sys/arch/arm/include/cpu.h 27 Apr 2008 18:58:44 -0000 1.54
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.53 2008/03/15 10:16:43 rearnsha Exp $ */
+/* cpu.h,v 1.45.4.7 2008/01/28 18:20:39 matt Exp */
/*
* Copyright (c) 1994-1996 Mark Brinicombe.
@@ -68,13 +68,13 @@
#ifndef _LKM
#include "opt_multiprocessor.h"
+#include "opt_cpuoptions.h"
#include "opt_lockdebug.h"
#include "opt_cputypes.h"
#endif /* !_LKM */
#include <arm/cpuconf.h>
-#include <machine/intr.h>
#ifndef _LOCORE
#include <sys/user.h>
#include <machine/frame.h>
@@ -94,6 +94,10 @@
#ifdef __PROG32
#ifdef _LOCORE
+#ifdef _ARM_ARCH_6
+#define IRQdisable cprid i
+#define IRQenable cpsie i
+#else
#define IRQdisable \
stmfd sp!, {r0} ; \
mrs r0, cpsr ; \
@@ -107,6 +111,17 @@
bic r0, r0, #(I32_bit) ; \
msr cpsr_c, r0 ; \
ldmfd sp!, {r0}
+#endif /* _ARM_ARCH_6 */
+
+#if defined (PROCESS_ID_IS_CURCPU)
+#define GET_CURCPU(rX) mrc p15, 0, rX, c13, c0, 4
+#define GET_CURLWP(rX) GET_CURCPU(rX); ldr rX, [rX, #CI_CURLWP]
+#define GET_CURPCB(rX) GET_CURCPU(rX); ldr rX, [rX, #CI_CURPCB]
+#elif defined (PROCESS_ID_IS_CURLWP)
+#define GET_CURLWP(rX) mrc p15, 0, rX, c13, c0, 4
+#define GET_CURCPU(rX) GET_CURLWP(rX); ldr rX, [rX, #L_CPU]
+#define GET_CURPCB(rX) GET_CURLWP(rX); ldr rX, [rX, #L_ADDR]
+#endif
#else
#define IRQdisable __set_cpsr_c(I32_bit, I32_bit);
@@ -138,10 +153,10 @@
#ifdef __PROG32
/* Hack to treat FPE time as interrupt time so we can measure it */
#define CLKF_INTR(frame) \
- ((curcpu()->ci_idepth > 1) || \
+ ((curcpu()->ci_intr_depth > 1) || \
(frame->cf_if.if_spsr & PSR_MODE) == PSR_UND32_MODE)
#else
-#define CLKF_INTR(frame) (curcpu()->ci_idepth > 1)
+#define CLKF_INTR(frame) (curcpu()->ci_intr_depth > 1)
#endif
/*
@@ -200,6 +215,11 @@
/*
* Per-CPU information. For now we assume one CPU.
*/
+static inline int curcpl(void);
+static inline void set_curcpl(int);
+#ifdef __HAVE_FAST_SOFTINTS
+static inline void cpu_dosoftints(void);
+#endif
#include <sys/device.h>
#include <sys/cpu_data.h>
@@ -211,11 +231,24 @@
u_int32_t ci_arm_cputype; /* CPU type */
u_int32_t ci_arm_cpurev; /* CPU revision */
u_int32_t ci_ctrl; /* The CPU control register */
+ int ci_cpl; /* current processor level (spl) */
+ int ci_astpending; /* */
+ int ci_want_resched; /* resched() was called */
+ int ci_intr_depth; /* */
+ struct pcb *ci_curpcb; /* current pcb */
+#ifdef __HAVE_FAST_SOFTINTS
+ lwp_t *ci_softlwps[SOFTINT_COUNT];
+ uint32_t ci_softints;
+#endif
+#if !defined(PROCESS_ID_IS_CURLWP)
+ lwp_t *ci_curlwp; /* current lwp */
+#endif
+#ifdef _ARM_ARCH_6
+ uint32_t ci_ccnt_freq; /* cycle count frequency */
+#endif
struct evcnt ci_arm700bugcount;
int32_t ci_mtx_count;
int ci_mtx_oldspl;
- int ci_want_resched;
- int ci_idepth;
#ifdef MULTIPROCESSOR
MP_CPU_INFO_MEMBERS
#endif
@@ -226,8 +259,68 @@
#ifndef MULTIPROCESSOR
extern struct cpu_info cpu_info_store;
+#if defined(PROCESS_ID_IS_CURLWP)
+static inline struct lwp *
+_curlwp(void)
+{
+ struct lwp *l;
+ __asm("mrc\tp15, 0, %0, c13, c0, 4" : "=r"(l));
+ return l;
+}
+
+static inline void
+_curlwp_set(struct lwp *l)
+{
+ __asm("mcr\tp15, 0, %0, c13, c0, 4" : "=r"(l));
+}
+
+#define curlwp (_curlwp())
+static inline struct cpu_info *
+curcpu(void)
+{
+ return curlwp->l_cpu;
+}
+#elif defined(PROCESS_ID_IS_CURCPU)
+static inline struct cpu_info *
+curcpu(void)
+{
+ struct cpu_info *ci;
+ __asm("mrc\tp15, 0, %0, c13, c0, 4" : "=r"(ci));
+ return ci;
+}
+#else
#define curcpu() (&cpu_info_store)
+#endif /* !PROCESS_ID_IS_CURCPU && !PROCESS_ID_IS_CURLWP */
+#ifndef curpcb
+#define curpcb (curcpu()->ci_curpcb)
+#endif
+#ifndef curlwp
+#define curlwp (curcpu()->ci_curlwp)
+#endif
#define cpu_number() 0
+#define LWP0_CPU_INFO (&cpu_info_store)
+#endif /* !MULTIPROCESSOR */
+
+static inline int
+curcpl(void)
+{
+ return curcpu()->ci_cpl;
+}
+
+static inline void
+set_curcpl(int pri)
+{
+ curcpu()->ci_cpl = pri;
+}
+
+#ifdef __HAVE_FAST_SOFTINTS
+void dosoftints(void);
+static inline void
+cpu_dosoftints(void)
+{
+ if (curcpu()->ci_softints && curcpu()->ci_cpl < IPL_SOFTCLOCK)
+ dosoftints();
+}
#endif
#ifdef __PROG32
@@ -240,8 +333,7 @@
* Scheduling glue
*/
-extern int astpending;
-#define setsoftast() (astpending = 1)
+#define setsoftast() (curcpu()->ci_astpending = 1)
/*
* Notify the current process (p) that it has a signal pending,
@@ -297,5 +389,3 @@
#endif /* _KERNEL */
#endif /* !_ARM_CPU_H_ */
-
-/* End of cpu.h */
Index: src/sys/arch/arm/include/cpuconf.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/cpuconf.h,v
retrieving revision 1.13
retrieving revision 1.14
diff -u -r1.13 -r1.14
--- src/sys/arch/arm/include/cpuconf.h 6 Jan 2007 00:50:54 -0000 1.13
+++ src/sys/arch/arm/include/cpuconf.h 27 Apr 2008 18:58:44 -0000 1.14
@@ -1,4 +1,4 @@
-/* $NetBSD: cpuconf.h,v 1.13 2007/01/06 00:50:54 christos Exp $ */
+/* $NetBSD: cpuconf.h,v 1.14 2008/04/27 18:58:44 matt Exp $ */
/*
* Copyright (c) 2002 Wasabi Systems, Inc.
@@ -56,6 +56,7 @@
* YOU ARE ADDING SUPPORT FOR.
*/
+#if 0
/*
* Step 1: Count the number of CPU types configured into the kernel.
*/
@@ -68,6 +69,8 @@
defined(CPU_ARM9E) + \
defined(CPU_ARM10) + \
defined(CPU_ARM11) + \
+ defined(CPU_ARM1136) + \
+ defined(CPU_ARM1176) + \
defined(CPU_SA110) + defined(CPU_SA1100) + \
defined(CPU_SA1110) + \
defined(CPU_IXP12X0) + \
@@ -78,6 +81,7 @@
#else
#define CPU_NTYPES 2
#endif /* _KERNEL_OPT */
+#endif
/*
* Step 2: Determine which ARM architecture versions are configured.
@@ -148,6 +152,10 @@
* ARM_MMU_XSCALE XScale MMU. Compatible with generic ARM
* MMU, but also has several extensions which
* require different PTE layout to use.
+ *
+ * ARM_MMU_V6 ARM v6 MMU. Compatible with generic ARM
+ * MMU, but also has several extensions which
+ * require different PTE layouts to use.
*/
#if !defined(_KERNEL_OPT) || \
(defined(CPU_ARM2) || defined(CPU_ARM250) || defined(CPU_ARM3))
@@ -159,7 +167,7 @@
#if !defined(_KERNEL_OPT) || \
(defined(CPU_ARM6) || defined(CPU_ARM7) || defined(CPU_ARM7TDMI) ||
\
defined(CPU_ARM8) || defined(CPU_ARM9) || defined(CPU_ARM9E) || \
- defined(CPU_ARM10) || defined(CPU_ARM11))
+ defined(CPU_ARM10))
#define ARM_MMU_GENERIC 1
#else
#define ARM_MMU_GENERIC 0
@@ -181,8 +189,15 @@
#define ARM_MMU_XSCALE 0
#endif
+#if !defined(_KERNEL_OPT) || \
+ defined(CPU_ARM11)
+#define ARM_MMU_V6 1
+#else
+#define ARM_MMU_V6 0
+#endif
+
#define ARM_NMMUS (ARM_MMU_MEMC + ARM_MMU_GENERIC +
\
- ARM_MMU_SA1 + ARM_MMU_XSCALE)
+ ARM_MMU_SA1 + ARM_MMU_XSCALE + ARM_MMU_V6)
#if ARM_NMMUS == 0
#error ARM_NMMUS is 0
#endif
Index: src/sys/arch/arm/include/cpufunc.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/cpufunc.h,v
retrieving revision 1.44
retrieving revision 1.45
diff -u -r1.44 -r1.45
--- src/sys/arch/arm/include/cpufunc.h 25 Feb 2008 06:32:29 -0000 1.44
+++ src/sys/arch/arm/include/cpufunc.h 27 Apr 2008 18:58:44 -0000 1.45
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc.h,v 1.44 2008/02/25 06:32:29 dogcow Exp $ */
+/* cpufunc.h,v 1.40.22.4 2007/11/08 10:59:33 matt Exp */
/*
* Copyright (c) 1997 Mark Brinicombe.
@@ -45,6 +45,7 @@
#ifdef _KERNEL
#include <sys/types.h>
+#include <arm/armreg.h>
#include <arm/cpuconf.h>
#include <arm/armreg.h>
@@ -353,23 +354,6 @@
void arm10_setup (char *);
#endif
-#ifdef CPU_ARM11
-void arm11_setttb (u_int);
-
-void arm11_tlb_flushID_SE (u_int);
-void arm11_tlb_flushI_SE (u_int);
-
-void arm11_context_switch (u_int);
-
-void arm11_setup (char *string);
-void arm11_tlb_flushID (void);
-void arm11_tlb_flushI (void);
-void arm11_tlb_flushD (void);
-void arm11_tlb_flushD_SE (u_int va);
-
-void arm11_drain_writebuf (void);
-#endif
-
#if defined(CPU_ARM9E) || defined (CPU_ARM10)
void armv5_ec_setttb (u_int);
@@ -385,7 +369,7 @@
void armv5_ec_idcache_wbinv_range (vaddr_t, vsize_t);
#endif
-#if defined (CPU_ARM10) || defined (CPU_ARM11)
+#if defined (CPU_ARM10)
void armv5_setttb (u_int);
void armv5_icache_sync_all (void);
@@ -405,6 +389,54 @@
extern unsigned armv5_dcache_index_inc;
#endif
+#if defined(CPU_ARM11)
+void arm11_setttb (u_int);
+
+void arm11_tlb_flushID_SE (u_int);
+void arm11_tlb_flushI_SE (u_int);
+
+void arm11_context_switch (u_int);
+
+void arm11_cpu_sleep (int);
+void arm11_setup (char *string);
+void arm11_tlb_flushID (void);
+void arm11_tlb_flushI (void);
+void arm11_tlb_flushD (void);
+void arm11_tlb_flushD_SE (u_int va);
+
+void armv11_dcache_wbinv_all (void);
+void armv11_idcache_wbinv_all(void);
+
+void arm11_drain_writebuf (void);
+void arm11_sleep (int);
+
+void armv6_setttb (u_int);
+
+void armv6_icache_sync_all (void);
+void armv6_icache_sync_range (vaddr_t, vsize_t);
+
+void armv6_dcache_wbinv_all (void);
+void armv6_dcache_wbinv_range (vaddr_t, vsize_t);
+void armv6_dcache_inv_range (vaddr_t, vsize_t);
+void armv6_dcache_wb_range (vaddr_t, vsize_t);
+
+void armv6_idcache_wbinv_all (void);
+void armv6_idcache_wbinv_range (vaddr_t, vsize_t);
+#endif
+
+#if defined(CPU_ARM1136)
+void arm1136_setttb (u_int);
+void arm1136_idcache_wbinv_all (void);
+void arm1136_dcache_wbinv_all (void);
+void arm1136_icache_sync_all (void);
+void arm1136_flush_prefetchbuf (void);
+void arm1136_icache_sync_range (vaddr_t, vsize_t);
+void arm1136_idcache_wbinv_range (vaddr_t, vsize_t);
+void arm1136_setup (char *string);
+void arm1136_sleep_rev0 (int); /* for errata 336501 */
+#endif
+
+
#if defined(CPU_ARM9) || defined(CPU_ARM9E) || defined(CPU_ARM10) || \
defined(CPU_SA110) || defined(CPU_SA1100) || defined(CPU_SA1110) || \
defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \
@@ -535,6 +567,40 @@
#define restore_interrupts(old_cpsr) \
(__set_cpsr_c((I32_bit | F32_bit), (old_cpsr) & (I32_bit | F32_bit)))
+
+static inline void cpsie(register_t psw) __attribute__((__unused__));
+static inline register_t cpsid(register_t psw) __attribute__((__unused__));
+
+static inline void
+cpsie(register_t psw)
+{
+ if (!__builtin_constant_p(psw)) {
+ enable_interrupts(psw);
+ return;
+ }
+ switch (psw & (I32_bit|F32_bit)) {
+ case I32_bit: __asm("cpsie\ti"); break;
+ case F32_bit: __asm("cpsie\tf"); break;
+ case I32_bit|F32_bit: __asm("cpsie\tif"); break;
+ }
+}
+
+static inline register_t
+cpsid(register_t psw)
+{
+ register_t oldpsw;
+ if (!__builtin_constant_p(psw))
+ return disable_interrupts(psw);
+
+ __asm("mrs %0, cpsr" : "=r"(oldpsw));
+ switch (psw & (I32_bit|F32_bit)) {
+ case I32_bit: __asm("cpsid\ti"); break;
+ case F32_bit: __asm("cpsid\tf"); break;
+ case I32_bit|F32_bit: __asm("cpsid\tif"); break;
+ }
+ return oldpsw;
+}
+
#else /* ! __PROG32 */
#define disable_interrupts(mask)
\
(set_r15((mask) & (R15_IRQ_DISABLE | R15_FIQ_DISABLE), \
@@ -590,6 +656,7 @@
extern int arm_pdcache_size; /* and unified */
extern int arm_pdcache_line_size;
extern int arm_pdcache_ways;
+extern int arm_cache_prefer_mask;
extern int arm_pcache_type;
extern int arm_pcache_unified;
Index: src/sys/arch/arm/include/frame.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/frame.h,v
retrieving revision 1.9
retrieving revision 1.10
diff -u -r1.9 -r1.10
--- src/sys/arch/arm/include/frame.h 9 Feb 2007 21:55:02 -0000 1.9
+++ src/sys/arch/arm/include/frame.h 27 Apr 2008 18:58:44 -0000 1.10
@@ -1,4 +1,4 @@
-/* $NetBSD: frame.h,v 1.9 2007/02/09 21:55:02 ad Exp $ */
+/* $NetBSD: frame.h,v 1.10 2008/04/27 18:58:44 matt Exp $ */
/*
* Copyright (c) 1994-1997 Mark Brinicombe.
@@ -73,6 +73,7 @@
} trapframe_t;
/* Register numbers */
+#define tf_ip tf_r12
#define tf_r13 tf_usr_sp
#define tf_r14 tf_usr_lr
#define tf_r15 tf_pc
Index: src/sys/arch/arm/include/int_const.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/int_const.h,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- src/sys/arch/arm/include/int_const.h 14 Apr 2001 22:38:35 -0000
1.1
+++ src/sys/arch/arm/include/int_const.h 28 Apr 2008 20:23:14 -0000
1.2
@@ -1,4 +1,4 @@
-/* $NetBSD: int_const.h,v 1.1 2001/04/14 22:38:35 kleink Exp $ */
+/* $NetBSD: int_const.h,v 1.2 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/include/int_fmtio.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/int_fmtio.h,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -r1.3 -r1.4
--- src/sys/arch/arm/include/int_fmtio.h 3 Sep 2001 01:51:39 -0000
1.3
+++ src/sys/arch/arm/include/int_fmtio.h 28 Apr 2008 20:23:14 -0000
1.4
@@ -1,4 +1,4 @@
-/* $NetBSD: int_fmtio.h,v 1.3 2001/09/03 01:51:39 matt Exp $ */
+/* $NetBSD: int_fmtio.h,v 1.4 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/include/int_limits.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/int_limits.h,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -r1.7 -r1.8
--- src/sys/arch/arm/include/int_limits.h 17 Oct 2007 19:53:41 -0000
1.7
+++ src/sys/arch/arm/include/int_limits.h 28 Apr 2008 20:23:14 -0000
1.8
@@ -1,4 +1,4 @@
-/* $NetBSD: int_limits.h,v 1.7 2007/10/17 19:53:41 garbled Exp $ */
+/* $NetBSD: int_limits.h,v 1.8 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/include/int_mwgwtypes.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/int_mwgwtypes.h,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -r1.3 -r1.4
--- src/sys/arch/arm/include/int_mwgwtypes.h 24 Dec 2005 20:06:52 -0000
1.3
+++ src/sys/arch/arm/include/int_mwgwtypes.h 28 Apr 2008 20:23:14 -0000
1.4
@@ -1,4 +1,4 @@
-/* $NetBSD: int_mwgwtypes.h,v 1.3 2005/12/24 20:06:52 perry Exp $ */
+/* $NetBSD: int_mwgwtypes.h,v 1.4 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/include/isa_machdep.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/isa_machdep.h,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -r1.4 -r1.5
--- src/sys/arch/arm/include/isa_machdep.h 9 May 2003 23:51:26 -0000
1.4
+++ src/sys/arch/arm/include/isa_machdep.h 28 Apr 2008 20:23:14 -0000
1.5
@@ -1,4 +1,4 @@
-/* $NetBSD: isa_machdep.h,v 1.4 2003/05/09 23:51:26 fvdl Exp $ */
+/* $NetBSD: isa_machdep.h,v 1.5 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
@@ -16,13 +16,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/include/isapnp_machdep.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/isapnp_machdep.h,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- src/sys/arch/arm/include/isapnp_machdep.h 23 Feb 2001 21:23:47 -0000
1.1
+++ src/sys/arch/arm/include/isapnp_machdep.h 28 Apr 2008 20:23:14 -0000
1.2
@@ -1,4 +1,4 @@
-/* $NetBSD: isapnp_machdep.h,v 1.1 2001/02/23 21:23:47 reinoud Exp $
*/
+/* $NetBSD: isapnp_machdep.h,v 1.2 2008/04/28 20:23:14 martin Exp $
*/
/*-
* Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
@@ -16,13 +16,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/include/lock.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/lock.h,v
retrieving revision 1.15
retrieving revision 1.17
diff -u -r1.15 -r1.17
--- src/sys/arch/arm/include/lock.h 17 Oct 2007 19:53:41 -0000 1.15
+++ src/sys/arch/arm/include/lock.h 28 Apr 2008 20:23:14 -0000 1.17
@@ -1,4 +1,4 @@
-/* $NetBSD: lock.h,v 1.15 2007/10/17 19:53:41 garbled Exp $ */
+/* $NetBSD: lock.h,v 1.17 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -86,7 +79,7 @@
{
__asm volatile("swpb %0, %1, [%2]"
- : "=r" (__val) : "r" (__val), "r" (__ptr) : "memory");
+ : "=&r" (__val) : "r" (__val), "r" (__ptr) : "memory");
return __val;
}
#else
@@ -95,7 +88,7 @@
{
__asm volatile("swp %0, %1, [%2]"
- : "=r" (__val) : "r" (__val), "r" (__ptr) : "memory");
+ : "=&r" (__val) : "r" (__val), "r" (__ptr) : "memory");
return __val;
}
#endif /* _KERNEL */
Index: src/sys/arch/arm/include/mcontext.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/mcontext.h,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -r1.5 -r1.6
--- src/sys/arch/arm/include/mcontext.h 11 Dec 2005 12:16:47 -0000 1.5
+++ src/sys/arch/arm/include/mcontext.h 28 Apr 2008 20:23:14 -0000 1.6
@@ -1,4 +1,4 @@
-/* $NetBSD: mcontext.h,v 1.5 2005/12/11 12:16:47 christos Exp $ */
+/* $NetBSD: mcontext.h,v 1.6 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 2001, 2002 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/include/mutex.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/mutex.h,v
retrieving revision 1.9
retrieving revision 1.10
diff -u -r1.9 -r1.10
--- src/sys/arch/arm/include/mutex.h 29 Nov 2007 15:17:45 -0000 1.9
+++ src/sys/arch/arm/include/mutex.h 28 Apr 2008 20:23:14 -0000 1.10
@@ -1,4 +1,4 @@
-/* $NetBSD: mutex.h,v 1.9 2007/11/29 15:17:45 ad Exp $ */
+/* $NetBSD: mutex.h,v 1.10 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 2002, 2007 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/include/pcb.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/pcb.h,v
retrieving revision 1.18
retrieving revision 1.19
diff -u -r1.18 -r1.19
--- src/sys/arch/arm/include/pcb.h 15 Mar 2008 10:16:43 -0000 1.18
+++ src/sys/arch/arm/include/pcb.h 27 Apr 2008 18:58:44 -0000 1.19
@@ -1,4 +1,4 @@
-/* $NetBSD: pcb.h,v 1.18 2008/03/15 10:16:43 rearnsha Exp $ */
+/* pcb.h,v 1.14.22.2 2007/11/06 23:15:05 matt Exp */
/*
* Copyright (c) 2001 Matt Thomas <matt%3am-software.com@localhost>.
@@ -58,6 +58,13 @@
u_int pcb32_sp; /* used */
u_int pcb32_lr;
u_int pcb32_pc;
+
+ /*
+ * ARMv6 has two user thread/process id registers which can hold
+ * any 32bit quanttiies.
+ */
+ u_int pcb32_user_pid_rw; /* p15, 0, Rd, c13, c0, 2 */
+ u_int pcb32_user_pid_ro; /* p15, 0, Rd, c13, c0, 3 */
};
#define pcb_pagedir pcb_un.un_32.pcb32_pagedir
#define pcb_pl1vec pcb_un.un_32.pcb32_pl1vec
Index: src/sys/arch/arm/include/rwlock.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/rwlock.h,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -r1.4 -r1.5
--- src/sys/arch/arm/include/rwlock.h 29 Nov 2007 15:17:45 -0000 1.4
+++ src/sys/arch/arm/include/rwlock.h 28 Apr 2008 20:23:14 -0000 1.5
@@ -1,4 +1,4 @@
-/* $NetBSD: rwlock.h,v 1.4 2007/11/29 15:17:45 ad Exp $ */
+/* $NetBSD: rwlock.h,v 1.5 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 2002, 2006 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/include/wchar_limits.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/wchar_limits.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- src/sys/arch/arm/include/wchar_limits.h 11 Dec 2005 12:16:47 -0000
1.2
+++ src/sys/arch/arm/include/wchar_limits.h 28 Apr 2008 20:23:14 -0000
1.3
@@ -1,4 +1,4 @@
-/* $NetBSD: wchar_limits.h,v 1.2 2005/12/11 12:16:47 christos Exp $
*/
+/* $NetBSD: wchar_limits.h,v 1.3 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 2004 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/include/arm32/frame.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/arm32/frame.h,v
retrieving revision 1.16
retrieving revision 1.17
diff -u -r1.16 -r1.17
--- src/sys/arch/arm/include/arm32/frame.h 12 Jan 2008 20:50:24 -0000
1.16
+++ src/sys/arch/arm/include/arm32/frame.h 27 Apr 2008 18:58:44 -0000
1.17
@@ -1,4 +1,4 @@
-/* $NetBSD: frame.h,v 1.16 2008/01/12 20:50:24 skrll Exp $ */
+/* $NetBSD: frame.h,v 1.17 2008/04/27 18:58:44 matt Exp $ */
/*
* Copyright (c) 1994-1997 Mark Brinicombe.
@@ -114,64 +114,54 @@
#include "opt_compat_netbsd.h"
#include "opt_execfmt.h"
#include "opt_multiprocessor.h"
+#include "opt_cpuoptions.h"
#include "opt_arm_debug.h"
+#include <machine/cpu.h>
+
/*
* AST_ALIGNMENT_FAULT_LOCALS and ENABLE_ALIGNMENT_FAULTS
* These are used in order to support dynamic enabling/disabling of
* alignment faults when executing old a.out ARM binaries.
+ *
+ * Note that when ENABLE_ALIGNMENTS_FAULTS finishes r4 will contain
+ * pointer to the cpu's cpu_info. DO_AST_AND_RESTORE_ALIGNMENT_FAULTS
+ * relies on r4 being preserved.
*/
#ifdef EXEC_AOUT
-#ifndef MULTIPROCESSOR
+#if defined(PROCESS_ID_IS_CURLWP) || defined(PROCESS_ID_IS_CURCPU)
+
+#define AST_ALIGNMENT_FAULT_LOCALS
\
+.Laflt_cpufuncs: ;\
+ .word _C_LABEL(cpufuncs)
+
+#elif !defined(MULTIPROCESSOR)
/*
* Local variables needed by the AST/Alignment Fault macroes
*/
#define AST_ALIGNMENT_FAULT_LOCALS
\
-.Laflt_astpending: ;\
- .word _C_LABEL(astpending) ;\
.Laflt_cpufuncs: ;\
.word _C_LABEL(cpufuncs) ;\
-.Laflt_curpcb: ;\
- .word _C_LABEL(curpcb) ;\
.Laflt_cpu_info_store: ;\
.word _C_LABEL(cpu_info_store)
-#define GET_CURPCB_ENTER
\
- ldr r1, .Laflt_curpcb ;\
- ldr r1, [r1]
-
-#define GET_CPUINFO_ENTER
\
- ldr r0, .Laflt_cpu_info_store
-
-#define GET_CURPCB_EXIT
\
- ldr r1, .Laflt_curpcb ;\
- ldr r2, .Laflt_cpu_info_store ;\
- ldr r1, [r1]
+#define GET_CURCPU(rX)
\
+ ldr rX, .Laflt_cpu_info_store
#else /* !MULTIPROCESSOR */
#define AST_ALIGNMENT_FAULT_LOCALS
\
-.Laflt_astpending: ;\
- .word _C_LABEL(astpending) ;\
.Laflt_cpufuncs: ;\
.word _C_LABEL(cpufuncs) ;\
.Laflt_cpu_info: ;\
.word _C_LABEL(cpu_info)
-#define GET_CURPCB_ENTER
\
- ldr r4, .Laflt_cpu_info ;\
+#define GET_CURCPU(rX)
\
+ ldr rX, .Laflt_cpu_info ;\
bl _C_LABEL(cpu_number) ;\
- ldr r0, [r4, r0, lsl #2] ;\
- ldr r1, [r0, #CI_CURPCB]
+ ldr r0, [rX, r0, lsl #2]
-#define GET_CPUINFO_ENTER /* nothing to do */
-
-#define GET_CURPCB_EXIT
\
- ldr r7, .Laflt_cpu_info ;\
- bl _C_LABEL(cpu_number) ;\
- ldr r2, [r7, r0, lsl #2] ;\
- ldr r1, [r2, #CI_CURPCB]
#endif /* MULTIPROCESSOR */
/*
@@ -185,15 +175,14 @@
#define ENABLE_ALIGNMENT_FAULTS
\
and r0, r0, #(PSR_MODE) /* Test for USR32 mode */ ;\
teq r0, #(PSR_USR32_MODE) ;\
+ GET_CURCPU(r4) /* r4 = cpuinfo */ ;\
bne 1f /* Not USR mode skip AFLT */ ;\
- GET_CURPCB_ENTER /* r1 = curpcb */ ;\
- cmp r1, #0x00 /* curpcb NULL? */ ;\
- ldrne r1, [r1, #PCB_FLAGS] /* Fetch curpcb->pcb_flags */ ;\
- tstne r1, #PCB_NOALIGNFLT ;\
+ ldr r1, [r4, #CI_CURPCB] /* get curpcb from cpu_info */ ;\
+ ldr r1, [r1, #PCB_FLAGS] /* Fetch curpcb->pcb_flags */ ;\
+ tst r1, #PCB_NOALIGNFLT ;\
beq 1f /* AFLTs already enabled */ ;\
- GET_CPUINFO_ENTER /* r0 = cpuinfo */ ;\
ldr r2, .Laflt_cpufuncs ;\
- ldr r1, [r0, #CI_CTRL] /* Fetch control register */ ;\
+ ldr r1, [r4, #CI_CTRL] /* Fetch control register */ ;\
mov r0, #-1 ;\
mov lr, pc ;\
ldr pc, [r2, #CF_CONTROL] /* Enable alignment faults */ ;\
@@ -201,73 +190,90 @@
/*
* This macro must be invoked just before PULLFRAMEFROMSVCANDEXIT or
- * PULLFRAME at the end of interrupt/exception handlers.
+ * PULLFRAME at the end of interrupt/exception handlers. We know that
+ * r4 points to cpu_info since that is what ENABLE_ALIGNMENT_FAULTS did
+ * for use.
*/
#define DO_AST_AND_RESTORE_ALIGNMENT_FAULTS
\
ldr r0, [sp] /* Get the SPSR from stack */ ;\
- mrs r4, cpsr /* save CPSR */ ;\
- orr r1, r4, #(I32_bit) ;\
+ mrs r5, cpsr /* save CPSR */ ;\
+ orr r1, r5, #(I32_bit) ;\
msr cpsr_c, r1 /* Disable interrupts */ ;\
and r0, r0, #(PSR_MODE) /* Returning to USR mode? */ ;\
teq r0, #(PSR_USR32_MODE) ;\
- ldreq r5, .Laflt_astpending ;\
bne 3f /* Nope, get out now */ ;\
- bic r4, r4, #(I32_bit) ;\
-1: ldr r1, [r5] /* Pending AST? */ ;\
- teq r1, #0x00000000 ;\
+1: ldr r0, [r4, #CI_ASTPENDING] /* Pending AST? */ ;\
+ teq r0, #0x00000000 ;\
bne 2f /* Yup. Go deal with it */ ;\
- GET_CURPCB_EXIT /* r1 = curpcb, r2 = cpuinfo */ ;\
- cmp r1, #0x00 /* curpcb NULL? */ ;\
- ldrne r1, [r1, #PCB_FLAGS] /* Fetch curpcb->pcb_flags */ ;\
- tstne r1, #PCB_NOALIGNFLT ;\
+ ldr r1, [r4, #CI_CURPCB] /* Get current PCB */ ;\
+ ldr r0, [r1, #PCB_FLAGS] /* Fetch curpcb->pcb_flags */ ;\
+ tst r0, #PCB_NOALIGNFLT ;\
beq 3f /* Keep AFLTs enabled */ ;\
- ldr r1, [r2, #CI_CTRL] /* Fetch control register */ ;\
+ ldr r1, [r4, #CI_CTRL] /* Fetch control register */ ;\
ldr r2, .Laflt_cpufuncs ;\
mov r0, #-1 ;\
bic r1, r1, #CPU_CONTROL_AFLT_ENABLE /* Disable AFLTs */ ;\
adr lr, 3f ;\
ldr pc, [r2, #CF_CONTROL] /* Set new CTRL reg value */ ;\
+ /* NOTREACHED */ \
2: mov r1, #0x00000000 ;\
- str r1, [r5] /* Clear astpending */ ;\
- msr cpsr_c, r4 /* Restore interrupts */ ;\
+ str r1, [r4, #CI_ASTPENDING] /* Clear astpending */ ;\
+ bic r5, r5, #(I32_bit) ;\
+ msr cpsr_c, r5 /* Restore interrupts */ ;\
mov r0, sp ;\
bl _C_LABEL(ast) /* ast(frame) */ ;\
- orr r0, r4, #(I32_bit) /* Disable IRQs */ ;\
+ orr r0, r5, #(I32_bit) /* Disable IRQs */ ;\
msr cpsr_c, r0 ;\
b 1b /* Back around again */ ;\
3:
#else /* !EXEC_AOUT */
-#define AST_ALIGNMENT_FAULT_LOCALS
;\
-.Laflt_astpending: ;\
- .word _C_LABEL(astpending)
+#if defined(PROCESS_ID_IS_CURLWP) || defined(PROCESS_ID_IS_CURCPU)
+#define AST_ALIGNMENT_FAULT_LOCALS
+
+#elif !defined(MULTIPROCESSOR)
+#define AST_ALIGNMENT_FAULT_LOCALS
\
+.Laflt_cpu_info_store: ;\
+ .word _C_LABEL(cpu_info_store)
+
+#define GET_CURCPU(rX)
\
+ ldr rX, .Laflt_cpu_info_store
-#define ENABLE_ALIGNMENT_FAULTS /* nothing */
+#else
+#define AST_ALIGNMENT_FAULT_LOCALS
\
+.Laflt_cpu_info: ;\
+ .word _C_LABEL(cpu_info)
+
+#define GET_CURCPU(rX)
\
+ bl _C_LABEL(cpu_number) ;\
+ ldr r1, .Laflt_cpu_info ;\
+ ldr rX, [r1, r0, lsl #2]
+
+#endif
+
+#define ENABLE_ALIGNMENT_FAULTS GET_CURCPU(r4)
#define DO_AST_AND_RESTORE_ALIGNMENT_FAULTS
\
ldr r0, [sp] /* Get the SPSR from stack */ ;\
- mrs r4, cpsr /* save CPSR */ ;\
- orr r1, r4, #(I32_bit) ;\
+ mrs r5, cpsr /* save CPSR */ ;\
+ orr r1, r5, #(I32_bit) ;\
msr cpsr_c, r1 /* Disable interrupts */ ;\
and r0, r0, #(PSR_MODE) /* Returning to USR mode? */ ;\
teq r0, #(PSR_USR32_MODE) ;\
- ldreq r5, .Laflt_astpending ;\
bne 2f /* Nope, get out now */ ;\
- bic r4, r4, #(I32_bit) ;\
- ldr r1, [r5] /* Pending AST? */ ;\
+1: ldr r1, [r4, #CI_ASTPENDING] /* Pending AST? */ ;\
teq r1, #0x00000000 ;\
beq 2f /* Nope. Just bail */ ;\
-1: mov r1, #0x00000000 ;\
- str r1, [r5] /* Clear astpending */ ;\
- msr cpsr_c, r4 /* Restore interrupts */ ;\
+ mov r1, #0x00000000 ;\
+ str r1, [r4, #CI_ASTPENDING] /* Clear astpending */ ;\
+ bic r5, r5, #(I32_bit) ;\
+ msr cpsr_c, r5 /* Restore interrupts */ ;\
mov r0, sp ;\
bl _C_LABEL(ast) /* ast(frame) */ ;\
- orr r0, r4, #(I32_bit) /* Disable IRQs */ ;\
+ orr r0, r5, #(I32_bit) /* Disable IRQs */ ;\
msr cpsr_c, r0 ;\
- ldr r1, [r5] /* Another pending AST? */ ;\
- teq r1, #0x00000000 ;\
- bne 1b /* Yup. Back around again */ ;\
+ b 1b ;\
2:
#endif /* EXEC_AOUT */
@@ -410,5 +416,3 @@
#endif /* _LOCORE */
#endif /* _ARM32_FRAME_H_ */
-
-/* End of frame.h */
Index: src/sys/arch/arm/include/arm32/pmap.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/arm32/pmap.h,v
retrieving revision 1.84
retrieving revision 1.85
diff -u -r1.84 -r1.85
--- src/sys/arch/arm/include/arm32/pmap.h 1 Jan 2008 14:06:43 -0000
1.84
+++ src/sys/arch/arm/include/arm32/pmap.h 27 Apr 2008 18:58:44 -0000
1.85
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.84 2008/01/01 14:06:43 chris Exp $ */
+/* $NetBSD: pmap.h,v 1.85 2008/04/27 18:58:44 matt Exp $ */
/*
* Copyright (c) 2002, 2003 Wasabi Systems, Inc.
@@ -73,6 +73,9 @@
#include <arm/cpuconf.h>
#include <arm/arm32/pte.h>
#ifndef _LOCORE
+#if defined(_KERNEL_OPT)
+#include "opt_arm32_pmap.h"
+#endif
#include <arm/cpufunc.h>
#include <uvm/uvm_object.h>
#endif
@@ -194,7 +197,14 @@
SLIST_ENTRY(pv_addr) pv_list;
paddr_t pv_pa;
vaddr_t pv_va;
+ vsize_t pv_size;
} pv_addr_t;
+typedef SLIST_HEAD(, pv_addr) pv_addrqh_t;
+
+extern pv_addrqh_t pmap_freeq;
+extern pv_addr_t kernelpages;
+extern pv_addr_t systempage;
+extern pv_addr_t kernel_l1pt;
/*
* Determine various modes for PTEs (user vs. kernel, cacheable
@@ -224,6 +234,8 @@
#define PVF_EXEC 0x10 /* mapping is executable */
#define PVF_UNC 0x20 /* mapping is 'user'
non-cacheable */
#define PVF_KNC 0x40 /* mapping is 'kernel'
non-cacheable */
+#define PVF_COLORED 0x80 /* page has or had a color */
+#define PVF_KENTRY 0x0100 /* page entered via
pmap_kenter_pa */
#define PVF_NC (PVF_UNC|PVF_KNC)
/*
@@ -245,6 +257,8 @@
(((pg)->mdpage.pvh_attrs & PVF_MOD) != 0)
#define pmap_is_referenced(pg) \
(((pg)->mdpage.pvh_attrs & PVF_REF) != 0)
+#define pmap_is_page_colored_p(pg) \
+ (((pg)->mdpage.pvh_attrs & PVF_COLORED) != 0)
#define pmap_copy(dp, sp, da, l, sa) /* nothing */
@@ -260,8 +274,20 @@
#define PMAP_NEED_PROCWR
#define PMAP_GROWKERNEL /* turn on pmap_growkernel interface */
+#if ARM_MMU_V6 > 0
+#define PMAP_PREFER(hint, vap, sz, td) pmap_prefer((hint), (vap), (td))
+void pmap_prefer(vaddr_t, vaddr_t *, int);
+#endif
+
+void pmap_icache_sync_range(pmap_t, vaddr_t, vaddr_t);
+
/* Functions we use internally. */
-void pmap_bootstrap(pd_entry_t *, vaddr_t, vaddr_t);
+#ifdef PMAP_STEAL_MEMORY
+void pmap_boot_pagealloc(psize_t, psize_t, psize_t, pv_addr_t *);
+void pmap_boot_pageadd(pv_addr_t *);
+vaddr_t pmap_steal_memory(vsize_t, vaddr_t *, vaddr_t *);
+#endif
+void pmap_bootstrap(vaddr_t, vaddr_t);
void pmap_do_remove(pmap_t, vaddr_t, vaddr_t, int);
int pmap_fault_fixup(pmap_t, vaddr_t, vm_prot_t, int);
@@ -348,7 +374,7 @@
* we need to do PTE syncs. If only SA-1 is configured, then evaluate
* this at compile time.
*/
-#if (ARM_MMU_SA1 == 1) && (ARM_NMMUS == 1)
+#if (ARM_MMU_SA1 + ARM_MMU_V6 != 0) && (ARM_NMMUS == 1)
#define PMAP_NEEDS_PTE_SYNC 1
#define PMAP_INCLUDE_PTE_SYNC
#elif (ARM_MMU_SA1 == 0)
@@ -385,11 +411,11 @@
#define l1pte_fpage_p(pde) (((pde) & L1_TYPE_MASK) == L1_TYPE_F)
#define l2pte_index(v) (((v) & L2_ADDR_BITS) >> L2_S_SHIFT)
-#define l2pte_valid(pte) ((pte) != 0)
+#define l2pte_valid(pte) (((pte) & L2_TYPE_MASK) != L2_TYPE_INV)
#define l2pte_pa(pte) ((pte) & L2_S_FRAME)
#define l2pte_minidata(pte) (((pte) & \
- (L2_B | L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X)))\
- == (L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X)))
+ (L2_B | L2_C | L2_XS_T_TEX(TEX_XSCALE_X)))\
+ == (L2_C | L2_XS_T_TEX(TEX_XSCALE_X)))
/* L1 and L2 page table macros */
#define pmap_pde_v(pde) l1pte_valid(*(pde))
@@ -406,7 +432,7 @@
/************************* ARM MMU configuration *****************************/
-#if (ARM_MMU_GENERIC + ARM_MMU_SA1) != 0
+#if (ARM_MMU_GENERIC + ARM_MMU_SA1 + ARM_MMU_V6) != 0
void pmap_copy_page_generic(paddr_t, paddr_t);
void pmap_zero_page_generic(paddr_t);
@@ -467,9 +493,14 @@
/*****************************************************************************/
/*
- * tell MI code that the cache is virtually-indexed *and* virtually-tagged.
+ * tell MI code that the cache is virtually-indexed.
+ * ARMv6 is physically-tagged but all others are virtually-tagged.
*/
+#if ARM_MMU_V6 > 0
+#define PMAP_CACHE_VIPT
+#else
#define PMAP_CACHE_VIVT
+#endif
/*
* Definitions for MMU domains
@@ -488,14 +519,14 @@
#define L1_S_PROT_MASK (L1_S_PROT_U|L1_S_PROT_W)
#define L1_S_CACHE_MASK_generic (L1_S_B|L1_S_C)
-#define L1_S_CACHE_MASK_xscale
(L1_S_B|L1_S_C|L1_S_XSCALE_TEX(TEX_XSCALE_X))
+#define L1_S_CACHE_MASK_xscale
(L1_S_B|L1_S_C|L1_S_XS_TEX(TEX_XSCALE_X))
#define L2_L_PROT_U (L2_AP(AP_U))
#define L2_L_PROT_W (L2_AP(AP_W))
#define L2_L_PROT_MASK (L2_L_PROT_U|L2_L_PROT_W)
#define L2_L_CACHE_MASK_generic (L2_B|L2_C)
-#define L2_L_CACHE_MASK_xscale
(L2_B|L2_C|L2_XSCALE_L_TEX(TEX_XSCALE_X))
+#define L2_L_CACHE_MASK_xscale (L2_B|L2_C|L2_XS_L_TEX(TEX_XSCALE_X))
#define L2_S_PROT_U_generic (L2_AP(AP_U))
#define L2_S_PROT_W_generic (L2_AP(AP_W))
@@ -506,7 +537,7 @@
#define L2_S_PROT_MASK_xscale (L2_S_PROT_U|L2_S_PROT_W)
#define L2_S_CACHE_MASK_generic (L2_B|L2_C)
-#define L2_S_CACHE_MASK_xscale
(L2_B|L2_C|L2_XSCALE_T_TEX(TEX_XSCALE_X))
+#define L2_S_CACHE_MASK_xscale (L2_B|L2_C|L2_XS_T_TEX(TEX_XSCALE_X))
#define L1_S_PROTO_generic (L1_TYPE_S | L1_S_IMP)
#define L1_S_PROTO_xscale (L1_TYPE_S)
@@ -517,7 +548,7 @@
#define L2_L_PROTO (L2_TYPE_L)
#define L2_S_PROTO_generic (L2_TYPE_S)
-#define L2_S_PROTO_xscale (L2_TYPE_XSCALE_XS)
+#define L2_S_PROTO_xscale (L2_TYPE_XS)
/*
* User-visible names for the ones that vary with MMU class.
@@ -539,7 +570,7 @@
#define pmap_copy_page(s, d) (*pmap_copy_page_func)((s), (d))
#define pmap_zero_page(d) (*pmap_zero_page_func)((d))
-#elif (ARM_MMU_GENERIC + ARM_MMU_SA1) != 0
+#elif (ARM_MMU_GENERIC + ARM_MMU_SA1 + ARM_MMU_V6) != 0
#define L2_S_PROT_U L2_S_PROT_U_generic
#define L2_S_PROT_W L2_S_PROT_W_generic
#define L2_S_PROT_MASK L2_S_PROT_MASK_generic
Index: src/sys/arch/arm/include/arm32/psl.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/arm32/psl.h,v
retrieving revision 1.15
retrieving revision 1.16
diff -u -r1.15 -r1.16
--- src/sys/arch/arm/include/arm32/psl.h 6 Jan 2008 01:37:54 -0000
1.15
+++ src/sys/arch/arm/include/arm32/psl.h 27 Apr 2008 18:58:44 -0000
1.16
@@ -1,4 +1,4 @@
-/* $NetBSD: psl.h,v 1.15 2008/01/06 01:37:54 matt Exp $ */
+/* $NetBSD: psl.h,v 1.16 2008/04/27 18:58:44 matt Exp $ */
/*
* Copyright (c) 1995 Mark Brinicombe.
@@ -45,9 +45,6 @@
#ifndef _ARM_PSL_H_
#define _ARM_PSL_H_
#include <machine/intr.h>
-#if (! defined(_LOCORE)) && (! defined(hpcarm))
-#include <arm/softintr.h>
-#endif
/*
* These are the different SPL states
@@ -56,42 +53,21 @@
* indicate which interrupts are allowed.
*/
-#define _SPL_0 0
-#ifdef __HAVE_FAST_SOFTINTS
-#define _SPL_SOFTCLOCK 1
-#define _SPL_SOFTBIO 2
-#define _SPL_SOFTNET 3
-#define _SPL_SOFTSERIAL 4
-#define _SPL_VM 5
-#define _SPL_SCHED 6
-#define _SPL_HIGH 7
-#define _SPL_LEVELS 8
-#else
-#define _SPL_SOFTCLOCK _SPL_0
-#define _SPL_SOFTBIO _SPL_0
-#define _SPL_SOFTNET _SPL_0
-#define _SPL_SOFTSERIAL _SPL_0
-#define _SPL_VM 1
-#define _SPL_SCHED 2
-#define _SPL_HIGH 3
-#define _SPL_LEVELS 4
-#endif
-
-#define spl0() splx(_SPL_0)
+#define spl0() splx(IPL_NONE)
#ifdef __HAVE_FAST_SOFTINTS
-#define splsoftclock() raisespl(_SPL_SOFTCLOCK)
-#define splsoftbio() raisespl(_SPL_SOFTBIO)
-#define splsoftnet() raisespl(_SPL_SOFTNET)
-#define splsoftserial() raisespl(_SPL_SOFTSERIAL)
+#define splsoftclock() raisespl(IPL_SOFTCLOCK)
+#define splsoftbio() raisespl(IPL_SOFTBIO)
+#define splsoftnet() raisespl(IPL_SOFTNET)
+#define splsoftserial() raisespl(IPL_SOFTSERIAL)
#else
#define splsoftclock() spl0()
#define splsoftbio() spl0()
#define splsoftnet() spl0()
#define splsoftserial() spl0()
#endif
-#define splvm() raisespl(_SPL_VM)
-#define splsched() raisespl(_SPL_SCHED)
-#define splhigh() raisespl(_SPL_HIGH)
+#define splvm() raisespl(IPL_VM)
+#define splsched() raisespl(IPL_SCHED)
+#define splhigh() raisespl(IPL_HIGH)
#ifdef _KERNEL
#ifndef _LOCORE
@@ -103,29 +79,23 @@
void _setsoftintr (int si);
#endif
-extern int current_spl_level;
-
-extern u_int spl_masks[_SPL_LEVELS + 1];
-
typedef uint8_t ipl_t;
typedef struct {
- uint8_t _spl;
+ uint8_t _ipl;
} ipl_cookie_t;
-int ipl_to_spl(ipl_t);
-
static inline ipl_cookie_t
makeiplcookie(ipl_t ipl)
{
- return (ipl_cookie_t){._spl = (uint8_t)ipl_to_spl(ipl)};
+ return (ipl_cookie_t){._ipl = (uint8_t)ipl};
}
static inline int
splraiseipl(ipl_cookie_t icookie)
{
- return raisespl(icookie._spl);
+ return raisespl(icookie._ipl);
}
#endif /* _LOCORE */
#endif /* _KERNEL */
Index: src/sys/arch/arm/include/arm32/pte.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/arm32/pte.h,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -r1.7 -r1.8
--- src/sys/arch/arm/include/arm32/pte.h 21 May 2003 18:04:43 -0000
1.7
+++ src/sys/arch/arm/include/arm32/pte.h 27 Apr 2008 18:58:44 -0000
1.8
@@ -1,4 +1,4 @@
-/* $NetBSD: pte.h,v 1.7 2003/05/21 18:04:43 thorpej Exp $ */
+/* $NetBSD: pte.h,v 1.8 2008/04/27 18:58:44 matt Exp $ */
/*
* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
@@ -49,6 +49,8 @@
*
* The ARM MMU is capable of mapping memory in the following chunks:
*
+ * 16M SuperSections (L1 table, ARMv6+)
+ *
* 1M Sections (L1 table)
*
* 64K Large Pages (L2 table)
@@ -57,13 +59,13 @@
*
* 1K Tiny Pages (L2 table)
*
- * There are two types of L2 tables: Coarse Tables and Fine Tables.
- * Coarse Tables can map Large and Small Pages. Fine Tables can
- * map Tiny Pages.
+ * There are two types of L2 tables: Coarse Tables and Fine Tables (not
+ * available on ARMv6+). Coarse Tables can map Large and Small Pages.
+ * Fine Tables can map Tiny Pages.
*
* Coarse Tables can define 4 Subpages within Large and Small pages.
* Subpages define different permissions for each Subpage within
- * a Page.
+ * a Page. ARMv6 format Coarse Tables have no subpages.
*
* Coarse Tables are 1K in length. Fine tables are 4K in length.
*
@@ -73,6 +75,11 @@
* 1M of virtual address space, either via a Section mapping or
* via an L2 Table.
*
+ * ARMv6+ has a second TTBR register which can be used if any of the
+ * upper address bits are non-zero (think kernel). For NetBSD, this
+ * would be 1 upper bit splitting user/kernel in a 2GB/2GB split.
+ * This would also reduce the size of the L1 Table to 8K.
+ *
* In addition, the Fast Context Switching Extension (FCSE) is available
* on some ARM v4 and ARM v5 processors. FCSE is a way of eliminating
* TLB/cache flushes on context switch by use of a smaller address space
@@ -85,6 +92,11 @@
typedef uint32_t pt_entry_t; /* L2 table entry */
#endif /* _LOCORE */
+#define L1_SS_SIZE 0x01000000 /* 16M */
+#define L1_SS_OFFSET (L1_SS_SIZE - 1)
+#define L1_SS_FRAME (~L1_SS_OFFSET)
+#define L1_SS_SHIFT 24
+
#define L1_S_SIZE 0x00100000 /* 1M */
#define L1_S_OFFSET (L1_S_SIZE - 1)
#define L1_S_FRAME (~L1_S_OFFSET)
@@ -146,7 +158,14 @@
#define L1_S_ADDR_MASK 0xfff00000 /* phys address of section */
#define L1_S_XSCALE_P 0x00000200 /* ECC enable for this section
*/
-#define L1_S_XSCALE_TEX(x) ((x) << 12) /* Type Extension */
+#define L1_S_XS_TEX(x) ((x) << 12) /* Type Extension */
+#define L1_S_V6_TEX(x) ((x) << 12) /* Type Extension */
+#define L1_S_V6_P 0x00000200 /* ECC enable for this section
*/
+#define L1_S_V6_SUPER 0x00040000 /* ARMv6 SuperSection (16MB)
bit */
+#define L1_S_V6_XN L1_S_IMP /* ARMv6 eXecute Never */
+#define L1_S_V6_APX 0x00008000 /* ARMv6 AP eXtension */
+#define L1_S_V6_S 0x00010000 /* ARMv6 Shared */
+#define L1_S_V6_nG 0x00020000 /* ARMv6 not-Global */
/* L1 Coarse Descriptor */
#define L1_C_IMP0 0x00000004 /* implementation defined */
@@ -157,6 +176,7 @@
#define L1_C_ADDR_MASK 0xfffffc00 /* phys address of L2 Table */
#define L1_C_XSCALE_P 0x00000200 /* ECC enable for this section
*/
+#define L1_C_V6_P 0x00000200 /* ECC enable for this section
*/
/* L1 Fine Descriptor */
#define L1_F_IMP0 0x00000004 /* implementation defined */
@@ -184,7 +204,7 @@
* Descriptor has the same format as the XScale Tiny Descriptor,
* but describes a 4K page, rather than a 1K page.
*/
-#define L2_TYPE_XSCALE_XS 0x03 /* XScale Extended Small Page */
+#define L2_TYPE_XS 0x03 /* XScale/ARMv6 Extended Small
Page */
#define L2_B 0x00000004 /* Bufferable page */
#define L2_C 0x00000008 /* Cacheable page */
@@ -194,8 +214,12 @@
#define L2_AP3(x) ((x) << 10) /* access permissions (sp 3) */
#define L2_AP(x) (L2_AP0(x) | L2_AP1(x) | L2_AP2(x) | L2_AP3(x))
-#define L2_XSCALE_L_TEX(x) ((x) << 12) /* Type Extension */
-#define L2_XSCALE_T_TEX(x) ((x) << 6) /* Type Extension */
+#define L2_XS_L_TEX(x) ((x) << 12) /* Type Extension */
+#define L2_XS_T_TEX(x) ((x) << 6) /* Type Extension */
+#define L2_XS_XN 0x00000001 /* ARMv6 eXecute Never */
+#define L2_XS_APX 0x00000200 /* ARMv6 AP eXtension */
+#define L2_XS_S 0x00000400 /* ARMv6 Shared */
+#define L2_XS_nG 0x00000800 /* ARMv6 Not-Global */
/*
* Access Permissions for L1 and L2 Descriptors.
@@ -215,6 +239,16 @@
#define AP_KRWURW 0x03 /* kernel read/write usr
read/write */
/*
+ * Note: These values assume the S (System) and the R (ROM) bits are clear and
+ * the XP (eXtended page table) bit is set in CP15 register 1. ARMv6 only.
+ */
+#define APX_KR(APX) (APX|0x01) /* kernel read */
+#define APX_KRUR(APX) (APX|0x02) /* kernel read user read */
+#define APX_KRW(APX) ( 0x01) /* kernel read/write */
+#define APX_KRWUR(APX) ( 0x02) /* kernel read/write user read
*/
+#define APX_KRWURW(APX) ( 0x03) /* kernel read/write user
read/write */
+
+/*
* Domain Types for the Domain Access Control Register.
*/
#define DOMAIN_FAULT 0x00 /* no access */
Index: src/sys/arch/arm/include/arm32/vmparam.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/include/arm32/vmparam.h,v
retrieving revision 1.21
retrieving revision 1.22
diff -u -r1.21 -r1.22
--- src/sys/arch/arm/include/arm32/vmparam.h 4 Jan 2008 21:58:03 -0000
1.21
+++ src/sys/arch/arm/include/arm32/vmparam.h 27 Apr 2008 18:58:44 -0000
1.22
@@ -1,4 +1,4 @@
-/* $NetBSD: vmparam.h,v 1.21 2008/01/04 21:58:03 ad Exp $ */
+/* $NetBSD: vmparam.h,v 1.22 2008/04/27 18:58:44 matt Exp $ */
/*
* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
@@ -123,11 +123,23 @@
#define k_mappings k_u.i_mappings
};
+/*
+ * Set the default color of each page.
+ */
+#if ARM_MMU_V6 > 0
+#define VM_MDPAGE_PVH_ATTRS_INIT(pg) \
+ (pg)->mdpage.pvh_attrs = (pg)->phys_addr & arm_cache_prefer_mask
+#else
+#define VM_MDPAGE_PVH_ATTRS_INIT(pg) \
+ (pg)->mdpage.pvh_attrs = 0
+#endif
+
+
#define VM_MDPAGE_INIT(pg)
\
do { \
(pg)->mdpage.pvh_list = NULL; \
simple_lock_init(&(pg)->mdpage.pvh_slock); \
- (pg)->mdpage.pvh_attrs = 0; \
+ VM_MDPAGE_PVH_ATTRS_INIT(pg); \
(pg)->mdpage.uro_mappings = 0; \
(pg)->mdpage.urw_mappings = 0; \
(pg)->mdpage.k_mappings = 0; \
Index: src/sys/arch/arm/iomd/iomd_irq.S
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/iomd/iomd_irq.S,v
retrieving revision 1.10
retrieving revision 1.11
diff -u -r1.10 -r1.11
--- src/sys/arch/arm/iomd/iomd_irq.S 8 Jan 2008 02:07:51 -0000 1.10
+++ src/sys/arch/arm/iomd/iomd_irq.S 27 Apr 2008 18:58:44 -0000 1.11
@@ -1,4 +1,4 @@
-/* $NetBSD: iomd_irq.S,v 1.10 2008/01/08 02:07:51 matt Exp $ */
+/* $NetBSD: iomd_irq.S,v 1.11 2008/04/27 18:58:44 matt Exp $ */
/*
* Copyright (c) 1994-1998 Mark Brinicombe.
@@ -84,15 +84,12 @@
* is zero then a pointer to the IRQ frame on the stack is passed instead.
*/
+Lcurrent_spl_level:
+ .word _C_LABEL(cpu_info_store) + CI_CPL
+
Ldisabled_mask:
.word _C_LABEL(disabled_mask)
-Lcurrent_spl_level:
- .word _C_LABEL(current_spl_level)
-
-Lcurrent_intr_depth:
- .word _C_LABEL(cpu_info_store) + CI_IDEPTH
-
Lspl_masks:
.word _C_LABEL(spl_masks)
@@ -103,6 +100,7 @@
/*
* Register usage
*
+ * r4 - Address of cpu_info
* r5 - Address of ffs table
* r6 - Address of current handler
* r7 - Pointer to handler pointer list
@@ -162,10 +160,9 @@
* each time the interrupt handler is nested.
*/
- ldr r0, Lcurrent_intr_depth
- ldr r1, [r0]
- add r1, r1, #1
- str r1, [r0]
+ ldr r0, [r4, #CI_INTR_DEPTH]
+ add r0, r0, #1
+ str r0, [r4, #CI_INTR_DEPTH]
/* Block the current requested interrupts */
ldr r1, Ldisabled_mask
@@ -186,7 +183,7 @@
* This would benefit from a special ffs type routine
*/
- mov r9, #(_SPL_LEVELS - 1)
+ mov r9, #(NIPL - 1)
ldr r7, Lspl_masks
Lfind_highest_ipl:
@@ -203,10 +200,9 @@
str r0, [r1]
- ldr r0, Lcurrent_spl_level
- ldr r1, [r0]
- str r9, [r0]
- stmfd sp!, {r1}
+ ldr r0, [r4, #CI_CPL]
+ str r9, [r4, #CI_CPL]
+ stmfd sp!, {r0}
/* Update the IOMD irq masks */
bl _C_LABEL(irq_setmasks)
@@ -221,16 +217,16 @@
* take a copy of the IRQ request so that we can strip bits out of it
* note that we only use 24 bits with iomd2 chips
*/
- ldr r4, Larm7500_ioc_found
- ldr r4, [r4] /* get the flag */
- cmp r4, #0
+ ldr r5, Larm7500_ioc_found
+ ldr r5, [r5] /* get the flag */
+ cmp r5, #0
movne r11, r8 /* ARM7500 -> copy all bits
*/
biceq r11, r8, #0xff000000 /* !ARM7500 -> only use 24 bit
*/
/* ffs routine to find first irq to service */
/* standard trick to isolate bottom bit in a0 or 0 if a0 = 0 on entry */
- rsb r4, r11, #0
- ands r10, r11, r4
+ rsb r5, r11, #0
+ ands r10, r11, r5
/*
* now r10 has at most 1 set bit, call this X
@@ -268,10 +264,10 @@
* - unsetting of the irq bit in r11
* - irq stats (if enabled) also get put in the mix
*/
- ldr r4, Lcnt /* Stat info A */
+ ldr r5, Lcnt /* Stat info A */
ldr r6, [r7, r9, lsl #2] /* Get address of first handler
structure */
- ldr r1, [r4, #(V_INTR)] /* Stat info B */
+ ldr r1, [r5, #(V_INTR)] /* Stat info B */
teq r6, #0x00000000 /* Do we have a handler */
moveq r0, r8 /* IRQ requests as arg 0 */
@@ -284,7 +280,7 @@
#endif
/* stat info C */
add r1, r1, #0x00000001
- str r1, [r4, #(V_INTR)]
+ str r1, [r5, #(V_INTR)]
#ifdef IRQSTATS
ldr r3, [r2, r3, lsl #2]!
@@ -312,17 +308,16 @@
bne irqchainloop
nextirq:
/* Check for next irq */
- rsb r4, r11, #0
- ands r10, r11, r4
+ rsb r5, r11, #0
+ ands r10, r11, r5
/* check if there are anymore irq's to service */
bne irqloop
exitirq:
ldmfd sp!, {r2, r3}
- ldr r9, Lcurrent_spl_level
- ldr r1, Ldisabled_mask
- str r2, [r9]
- str r3, [r1]
+ ldr r0, Ldisabled_mask
+ str r2, [r4, #CI_CPL]
+ str r3, [r0]
bl _C_LABEL(irq_setmasks)
@@ -336,10 +331,9 @@
msr cpsr_all, r0
/* Decrement the nest count */
- ldr r0, Lcurrent_intr_depth
- ldr r1, [r0]
- sub r1, r1, #1
- str r1, [r0]
+ ldr r0, [r4, #CI_INTR_DEPTH]
+ sub r0, r0, #1
+ str r0, [r4, #CI_INTR_DEPTH]
LOCK_CAS_CHECK
Index: src/sys/arch/arm/iomd/iomd_irqhandler.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/iomd/iomd_irqhandler.c,v
retrieving revision 1.16
retrieving revision 1.17
diff -u -r1.16 -r1.17
--- src/sys/arch/arm/iomd/iomd_irqhandler.c 6 Jan 2008 03:45:27 -0000
1.16
+++ src/sys/arch/arm/iomd/iomd_irqhandler.c 27 Apr 2008 18:58:44 -0000
1.17
@@ -1,4 +1,4 @@
-/* $NetBSD: iomd_irqhandler.c,v 1.16 2008/01/06 03:45:27 matt Exp $
*/
+/* $NetBSD: iomd_irqhandler.c,v 1.17 2008/04/27 18:58:44 matt Exp $
*/
/*
* Copyright (c) 1994-1998 Mark Brinicombe.
@@ -40,7 +40,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: iomd_irqhandler.c,v 1.16 2008/01/06 03:45:27 matt
Exp $");
+__KERNEL_RCSID(0, "$NetBSD: iomd_irqhandler.c,v 1.17 2008/04/27 18:58:44 matt
Exp $");
#include "opt_irqstats.h"
@@ -62,7 +62,7 @@
u_int current_mask;
u_int actual_mask;
u_int disabled_mask;
-u_int irqmasks[IPL_LEVELS];
+u_int irqmasks[NIPL];
extern char *_intrnames;
@@ -109,7 +109,7 @@
* We will start with no bits set and these will be updated as handlers
* are installed at different IPL's.
*/
- for (loop = 0; loop < IPL_LEVELS; ++loop)
+ for (loop = 0; loop < NIPL; ++loop)
irqmasks[loop] = 0;
current_mask = 0x00000000;
@@ -155,7 +155,7 @@
return -1;
/* Make sure the level is valid */
- if (handler->ih_level < 0 || handler->ih_level >= IPL_LEVELS)
+ if (handler->ih_level < 0 || handler->ih_level >= NIPL)
return -1;
oldirqstate = disable_interrupts(I32_bit);
@@ -197,7 +197,7 @@
* If ih_level is out of range then don't bother to update
* the masks.
*/
- if (handler->ih_level >= 0 && handler->ih_level < IPL_LEVELS) {
+ if (handler->ih_level >= 0 && handler->ih_level < NIPL) {
irqhandler_t *ptr;
/*
@@ -311,11 +311,11 @@
* If ih_level is out of range then don't bother to update
* the masks.
*/
- if (handler->ih_level >= 0 && handler->ih_level < IPL_LEVELS) {
+ if (handler->ih_level >= 0 && handler->ih_level < NIPL) {
irqhandler_t *ptr;
/* Clean the bit from all the masks */
- for (level = 0; level < IPL_LEVELS; ++level)
+ for (level = 0; level < NIPL; ++level)
irqmasks[level] &= ~(1 << irq);
/*
Index: src/sys/arch/arm/iomd/makemodes.awk
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/iomd/makemodes.awk,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -r1.6 -r1.7
--- src/sys/arch/arm/iomd/makemodes.awk 19 Aug 2006 11:01:56 -0000 1.6
+++ src/sys/arch/arm/iomd/makemodes.awk 28 Apr 2008 20:23:14 -0000 1.7
@@ -1,4 +1,4 @@
-# $NetBSD: makemodes.awk,v 1.6 2006/08/19 11:01:56 bjh21 Exp $
+# $NetBSD: makemodes.awk,v 1.7 2008/04/28 20:23:14 martin Exp $
#
# Copyright (c) 1998 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
-# 3. All advertising materials mentioning features or use of this software
-# must display the following acknowledgement:
-# This product includes software developed by the NetBSD
-# Foundation, Inc. and its contributors.
-# 4. Neither the name of The NetBSD Foundation nor the names of its
-# contributors may be used to endorse or promote products derived
-# from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
# ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/iomd/qms.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/iomd/qms.c,v
retrieving revision 1.13
retrieving revision 1.15
diff -u -r1.13 -r1.15
--- src/sys/arch/arm/iomd/qms.c 17 Oct 2007 19:53:42 -0000 1.13
+++ src/sys/arch/arm/iomd/qms.c 10 May 2008 15:31:04 -0000 1.15
@@ -1,4 +1,4 @@
-/* $NetBSD: qms.c,v 1.13 2007/10/17 19:53:42 garbled Exp $ */
+/* $NetBSD: qms.c,v 1.15 2008/05/10 15:31:04 martin Exp $ */
/*-
* Copyright (c) 2001 Reinoud Zandijk
@@ -41,7 +41,7 @@
#include <sys/param.h>
-__KERNEL_RCSID(0, "$NetBSD: qms.c,v 1.13 2007/10/17 19:53:42 garbled Exp $");
+__KERNEL_RCSID(0, "$NetBSD: qms.c,v 1.15 2008/05/10 15:31:04 martin Exp $");
#include <sys/callout.h>
#include <sys/device.h>
Index: src/sys/arch/arm/iomd/vidc20config.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/iomd/vidc20config.h,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -r1.5 -r1.6
--- src/sys/arch/arm/iomd/vidc20config.h 15 Aug 2006 22:58:47 -0000
1.5
+++ src/sys/arch/arm/iomd/vidc20config.h 28 Apr 2008 20:23:14 -0000
1.6
@@ -1,4 +1,4 @@
-/* $NetBSD: vidc20config.h,v 1.5 2006/08/15 22:58:47 bjh21 Exp $ */
+/* $NetBSD: vidc20config.h,v 1.6 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -16,13 +16,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/iomd/vidcvideo.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/iomd/vidcvideo.c,v
retrieving revision 1.34
retrieving revision 1.35
diff -u -r1.34 -r1.35
--- src/sys/arch/arm/iomd/vidcvideo.c 29 Feb 2008 00:37:26 -0000 1.34
+++ src/sys/arch/arm/iomd/vidcvideo.c 29 Apr 2008 17:09:47 -0000 1.35
@@ -1,4 +1,4 @@
-/* $NetBSD: vidcvideo.c,v 1.34 2008/02/29 00:37:26 chris Exp $ */
+/* $NetBSD: vidcvideo.c,v 1.35 2008/04/29 17:09:47 matt Exp $ */
/*
* Copyright (c) 2001 Reinoud Zandijk
@@ -36,7 +36,7 @@
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: vidcvideo.c,v 1.34 2008/02/29 00:37:26 chris Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: vidcvideo.c,v 1.35 2008/04/29 17:09:47 matt Exp
$");
#include <sys/param.h>
#include <sys/systm.h>
@@ -585,7 +585,7 @@
{
dc->_internal_dc_changed |= dc_change;
- if (current_spl_level == _SPL_HIGH) {
+ if (curcpl() == IPL_HIGH) {
/* running in ddb or without interrupts */
dc->dc_writeback_delay = 1;
flush_dc_changes_to_screen(dc);
@@ -601,7 +601,7 @@
}
-static u_char ri_col_data[6][6] = {
+static const u_char ri_col_data[6][6] = {
{ 0, 0, 0, 0, 0, 0}, /* 1 bpp */
{ 0, 0, 0, 0, 0, 0}, /* 2 bpp */
{ 0, 0, 0, 0, 0, 0}, /* 4 bpp */
@@ -614,7 +614,7 @@
vidcvideo_colourmap_and_cursor_init(struct fb_devconfig *dc)
{
struct rasops_info *ri = &dc->dc_console.scr_ri;
- u_char *rgbdat;
+ const u_char *rgbdat;
struct hwcmap256 *cm;
const u_int8_t *p;
int index;
Index: src/sys/arch/arm/iomd/vidcvideo.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/iomd/vidcvideo.h,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -r1.3 -r1.4
--- src/sys/arch/arm/iomd/vidcvideo.h 15 Aug 2006 23:32:09 -0000 1.3
+++ src/sys/arch/arm/iomd/vidcvideo.h 28 Apr 2008 20:23:14 -0000 1.4
@@ -1,4 +1,4 @@
-/* $NetBSD: vidcvideo.h,v 1.3 2006/08/15 23:32:09 bjh21 Exp $ */
+/* $NetBSD: vidcvideo.h,v 1.4 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/ixp12x0/ixp12x0_clk.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/ixp12x0/ixp12x0_clk.c,v
retrieving revision 1.12
retrieving revision 1.14
diff -u -r1.12 -r1.14
--- src/sys/arch/arm/ixp12x0/ixp12x0_clk.c 20 Jan 2008 16:28:23 -0000
1.12
+++ src/sys/arch/arm/ixp12x0/ixp12x0_clk.c 10 May 2008 15:31:04 -0000
1.14
@@ -1,4 +1,4 @@
-/* $NetBSD: ixp12x0_clk.c,v 1.12 2008/01/20 16:28:23 joerg Exp $ */
+/* $NetBSD: ixp12x0_clk.c,v 1.14 2008/05/10 15:31:04 martin Exp $ */
/*
* Copyright (c) 1997 Mark Brinicombe.
@@ -38,7 +38,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ixp12x0_clk.c,v 1.12 2008/01/20 16:28:23 joerg Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: ixp12x0_clk.c,v 1.14 2008/05/10 15:31:04 martin
Exp $");
#include <sys/types.h>
#include <sys/param.h>
Index: src/sys/arch/arm/ixp12x0/ixp12x0_com.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/ixp12x0/ixp12x0_com.c,v
retrieving revision 1.32
retrieving revision 1.33
diff -u -r1.32 -r1.33
--- src/sys/arch/arm/ixp12x0/ixp12x0_com.c 8 Jan 2008 02:07:51 -0000
1.32
+++ src/sys/arch/arm/ixp12x0/ixp12x0_com.c 28 Apr 2008 20:23:14 -0000
1.33
@@ -1,4 +1,4 @@
-/* $NetBSD: ixp12x0_com.c,v 1.32 2008/01/08 02:07:51 matt Exp $ */
+/* $NetBSD: ixp12x0_com.c,v 1.33 2008/04/28 20:23:14 martin Exp $ */
/*
* Copyright (c) 1998, 1999, 2001, 2002 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -20,13 +20,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -73,7 +66,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ixp12x0_com.c,v 1.32 2008/01/08 02:07:51 matt Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: ixp12x0_com.c,v 1.33 2008/04/28 20:23:14 martin
Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
Index: src/sys/arch/arm/ixp12x0/ixp12x0_comvar.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/ixp12x0/ixp12x0_comvar.h,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -r1.5 -r1.6
--- src/sys/arch/arm/ixp12x0/ixp12x0_comvar.h 6 Mar 2003 06:17:43 -0000
1.5
+++ src/sys/arch/arm/ixp12x0/ixp12x0_comvar.h 2 May 2008 22:03:23 -0000
1.6
@@ -1,4 +1,4 @@
-/* $NetBSD: ixp12x0_comvar.h,v 1.5 2003/03/06 06:17:43 igy Exp $ */
+/* $NetBSD: ixp12x0_comvar.h,v 1.6 2008/05/02 22:03:23 martin Exp $
*/
/*-
* Copyright (c) 2001, The NetBSD Foundation, Inc. All rights reserved.
*
@@ -13,25 +13,18 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
*
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _IXP12X0_COMVAR_H_
Index: src/sys/arch/arm/ixp12x0/ixp12x0_intr.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/ixp12x0/ixp12x0_intr.c,v
retrieving revision 1.17
retrieving revision 1.19
diff -u -r1.17 -r1.19
--- src/sys/arch/arm/ixp12x0/ixp12x0_intr.c 8 Jan 2008 02:07:51 -0000
1.17
+++ src/sys/arch/arm/ixp12x0/ixp12x0_intr.c 28 Apr 2008 20:23:14 -0000
1.19
@@ -1,4 +1,4 @@
-/* $NetBSD: ixp12x0_intr.c,v 1.17 2008/01/08 02:07:51 matt Exp $ */
+/* $NetBSD: ixp12x0_intr.c,v 1.19 2008/04/28 20:23:14 martin Exp $ */
/*
* Copyright (c) 2002 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -37,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ixp12x0_intr.c,v 1.17 2008/01/08 02:07:51 matt Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: ixp12x0_intr.c,v 1.19 2008/04/28 20:23:14 martin
Exp $");
/*
* Interrupt support for the Intel ixp12x0
@@ -74,7 +67,6 @@
static u_int32_t pci_imask[NIPL];
/* Current interrupt priority level. */
-volatile int current_spl_level;
volatile int hardware_spl_level;
/* Software copy of the IRQs we have enabled. */
@@ -84,36 +76,6 @@
/* Interrupts pending. */
static volatile int ipending;
-#ifdef __HAVE_FAST_SOFTINTS
-/*
- * Map a software interrupt queue index (to the unused bits in the
- * ICU registers -- XXX will need to revisit this if those bits are
- * ever used in future steppings).
- */
-static const u_int32_t si_to_irqbit[SI_NQUEUES] = {
- IXP12X0_INTR_bit30, /* SI_SOFT */
- IXP12X0_INTR_bit29, /* SI_SOFTCLOCK */
- IXP12X0_INTR_bit28, /* SI_SOFTNET */
- IXP12X0_INTR_bit27, /* SI_SOFTSERIAL */
-};
-
-#define INT_SWMASK
\
- ((1U << IXP12X0_INTR_bit30) | (1U << IXP12X0_INTR_bit29) | \
- (1U << IXP12X0_INTR_bit28) | (1U << IXP12X0_INTR_bit27))
-
-#define SI_TO_IRQBIT(si) (1U << si_to_irqbit[(si)])
-
-/*
- * Map a software interrupt queue to an interrupt priority level.
- */
-static const int si_to_ipl[] = {
- [SI_SOFTBIO] = IPL_SOFTBIO,
- [SI_SOFTCLOCK] = IPL_SOFTCLOCK,
- [SI_SOFTNET] = IPL_SOFTNET,
- [SI_SOFTSERIAL] = IPL_SOFTSERIAL,
-};
-#endif /* __HAVE_FAST_SOFTINTS */
-
void ixp12x0_intr_dispatch(struct irqframe *frame);
#define IXPREG(reg) *((volatile u_int32_t*) (reg))
@@ -245,46 +207,8 @@
KASSERT(imask[IPL_NONE] == 0);
KASSERT(pci_imask[IPL_NONE] == 0);
-#ifdef __HAVE_FAST_SOFTINTS
- /*
- * Initialize the soft interrupt masks to block themselves.
- */
- imask[IPL_SOFTBIO] = SI_TO_IRQBIT(SI_SOFTBIO);
- imask[IPL_SOFTCLOCK] = SI_TO_IRQBIT(SI_SOFTCLOCK);
- imask[IPL_SOFTNET] = SI_TO_IRQBIT(SI_SOFTNET);
- imask[IPL_SOFTSERIAL] = SI_TO_IRQBIT(SI_SOFTSERIAL);
-#endif
-
- /*
- * splsoftclock() is the only interface that users of the
- * generic software interrupt facility have to block their
- * soft intrs, so splsoftclock() must also block IPL_SOFT.
- */
- imask[IPL_SOFTCLOCK] |= imask[IPL_SOFTBIO];
- pci_imask[IPL_SOFTCLOCK] |= pci_imask[IPL_SOFTBIO];
-
- /*
- * splsoftnet() must also block splsoftclock(), since we don't
- * want timer-driven network events to occur while we're
- * processing incoming packets.
- */
- imask[IPL_SOFTNET] |= imask[IPL_SOFTCLOCK];
- pci_imask[IPL_SOFTNET] |= pci_imask[IPL_SOFTCLOCK];
-
- /*
- * Enforce a hierarchy that gives "slow" device (or devices with
- * limited input buffer space/"real-time" requirements) a better
- * chance at not dropping data.
- */
- imask[IPL_SOFTSERIAL] |= imask[IPL_SOFTNET];
- pci_imask[IPL_SOFTSERIAL] |= pci_imask[IPL_SOFTNET];
-
- /*
- * splvm() blocks all interrupts that use the kernel memory
- * allocation facilities.
- */
- imask[IPL_VM] |= imask[IPL_SOFTSERIAL];
- pci_imask[IPL_VM] |= pci_imask[IPL_SOFTSERIAL];
+ KASSERT(imask[IPL_VM] != 0);
+ KASSERT(pci_imask[IPL_VM] != 0);
/*
* splclock() must block anything that uses the scheduler.
@@ -326,42 +250,6 @@
}
}
-#ifdef __HAVE_FAST_SOFTINTS
-static void
-ixp12x0_do_pending(void)
-{
- static __cpu_simple_lock_t processing = __SIMPLELOCK_UNLOCKED;
- int new;
- u_int oldirqstate;
-
- if (__cpu_simple_lock_try(&processing) == 0)
- return;
-
- new = current_spl_level;
-
- oldirqstate = disable_interrupts(I32_bit);
-
-#define DO_SOFTINT(si)
\
- if ((ipending & ~imask[new]) & SI_TO_IRQBIT(si)) { \
- ipending &= ~SI_TO_IRQBIT(si); \
- current_spl_level = si_to_ipl[(si)]; \
- restore_interrupts(oldirqstate); \
- softintr_dispatch(si); \
- oldirqstate = disable_interrupts(I32_bit); \
- current_spl_level = new; \
- }
-
- DO_SOFTINT(SI_SOFTSERIAL);
- DO_SOFTINT(SI_SOFTNET);
- DO_SOFTINT(SI_SOFTCLOCK);
- DO_SOFTINT(SI_SOFT);
-
- __cpu_simple_unlock(&processing);
-
- restore_interrupts(oldirqstate);
-}
-#endif
-
inline void
splx(int new)
{
@@ -369,8 +257,8 @@
u_int oldirqstate;
oldirqstate = disable_interrupts(I32_bit);
- old = current_spl_level;
- current_spl_level = new;
+ old = curcpl();
+ set_curcpl(new);
if (new != hardware_spl_level) {
hardware_spl_level = new;
ixp12x0_set_intrmask(imask[new], pci_imask[new]);
@@ -378,9 +266,7 @@
restore_interrupts(oldirqstate);
#ifdef __HAVE_FAST_SOFTINTS
- /* If there are software interrupts to process, do it. */
- if ((ipending & INT_SWMASK) & ~imask[new])
- ixp12x0_do_pending();
+ cpu_dosoftints();
#endif
}
@@ -391,8 +277,8 @@
u_int oldirqstate;
oldirqstate = disable_interrupts(I32_bit);
- old = current_spl_level;
- current_spl_level = ipl;
+ old = curcpl();
+ set_curcpl(ipl);
restore_interrupts(oldirqstate);
return (old);
}
@@ -400,7 +286,7 @@
int
_spllower(int ipl)
{
- int old = current_spl_level;
+ int old = curcpl();
if (old <= ipl)
return (old);
@@ -408,22 +294,6 @@
return (old);
}
-#ifdef __HAVE_FAST_SOFTINTS
-void
-_setsoftintr(int si)
-{
- u_int oldirqstate;
-
- oldirqstate = disable_interrupts(I32_bit);
- ipending |= SI_TO_IRQBIT(si);
- restore_interrupts(oldirqstate);
-
- /* Process unmasked pending soft interrupts. */
- if ((ipending & INT_SWMASK) & ~imask[current_spl_level])
- ixp12x0_do_pending();
-}
-#endif
-
/*
* ixp12x0_intr_init:
*
@@ -447,7 +317,8 @@
evcnt_attach_dynamic(&iq->iq_ev, EVCNT_TYPE_INTR,
NULL, "ixpintr", iq->iq_name);
}
- current_spl_level = 0;
+ curcpu()->ci_intr_depth = 0;
+ curcpu()->ci_cpl = 0;
hardware_spl_level = 0;
ixp12x0_intr_calculate_masks();
@@ -509,24 +380,23 @@
{
struct intrq* iq;
struct intrhand* ih;
+ struct cpu_info* const ci = curcpu();
+ const int ppl = ci->ci_cpl;
u_int oldirqstate;
- int pcpl;
u_int32_t hwpend;
u_int32_t pci_hwpend;
int irq;
u_int32_t ibit;
- pcpl = current_spl_level;
hwpend = ixp12x0_irq_read();
pci_hwpend = ixp12x0_pci_irq_read();
- hardware_spl_level = pcpl;
- ixp12x0_set_intrmask(imask[pcpl] | hwpend,
- pci_imask[pcpl] | pci_hwpend);
+ hardware_spl_level = ppl;
+ ixp12x0_set_intrmask(imask[ppl] | hwpend, pci_imask[ppl] | pci_hwpend);
- hwpend &= ~imask[pcpl];
- pci_hwpend &= ~pci_imask[pcpl];
+ hwpend &= ~imask[ppl];
+ pci_hwpend &= ~pci_imask[ppl];
while (hwpend) {
irq = ffs(hwpend) - 1;
@@ -535,11 +405,8 @@
iq = &intrq[irq];
iq->iq_ev.ev_count++;
uvmexp.intrs++;
- for (ih = TAILQ_FIRST(&iq->iq_list); ih != NULL;
- ih = TAILQ_NEXT(ih, ih_list)) {
- int ipl;
-
- current_spl_level = ipl = ih->ih_ipl;
+ TAILQ_FOREACH(ih, &iq->iq_list, ih_list) {
+ ci->ci_cpl = ih->ih_ipl;
oldirqstate = enable_interrupts(I32_bit);
(void) (*ih->ih_func)(ih->ih_arg ? ih->ih_arg : frame);
restore_interrupts(oldirqstate);
@@ -553,28 +420,20 @@
iq = &intrq[irq + SYS_NIRQ];
iq->iq_ev.ev_count++;
uvmexp.intrs++;
- for (ih = TAILQ_FIRST(&iq->iq_list); ih != NULL;
- ih = TAILQ_NEXT(ih, ih_list)) {
- int ipl;
-
- current_spl_level = ipl = ih->ih_ipl;
+ TAILQ_FOREACH(ih, &iq->iq_list, ih_list) {
+ ci->ci_cpl = ih->ih_ipl;
oldirqstate = enable_interrupts(I32_bit);
(void) (*ih->ih_func)(ih->ih_arg ? ih->ih_arg : frame);
restore_interrupts(oldirqstate);
- pci_hwpend &= ~ibit;
}
+ pci_hwpend &= ~ibit;
}
- current_spl_level = pcpl;
- hardware_spl_level = pcpl;
- ixp12x0_set_intrmask(imask[pcpl], pci_imask[pcpl]);
+ ci->ci_cpl = ppl;
+ hardware_spl_level = ppl;
+ ixp12x0_set_intrmask(imask[ppl], pci_imask[ppl]);
#ifdef __HAVE_FAST_SOFTINTS
- /* Check for pendings soft intrs. */
- if ((ipending & INT_SWMASK) & ~imask[pcpl]) {
- oldirqstate = enable_interrupts(I32_bit);
- ixp12x0_do_pending();
- restore_interrupts(oldirqstate);
- }
+ cpu_dosoftints();
#endif
}
Index: src/sys/arch/arm/ixp12x0/ixp12x0_pci.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/ixp12x0/ixp12x0_pci.c,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -r1.7 -r1.8
--- src/sys/arch/arm/ixp12x0/ixp12x0_pci.c 11 Dec 2005 12:16:50 -0000
1.7
+++ src/sys/arch/arm/ixp12x0/ixp12x0_pci.c 28 Apr 2008 20:23:14 -0000
1.8
@@ -1,4 +1,4 @@
-/* $NetBSD: ixp12x0_pci.c,v 1.7 2005/12/11 12:16:50 christos Exp $ */
+/* $NetBSD: ixp12x0_pci.c,v 1.8 2008/04/28 20:23:14 martin Exp $ */
/*
* Copyright (c) 2002, 2003 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -14,13 +14,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -36,7 +29,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ixp12x0_pci.c,v 1.7 2005/12/11 12:16:50 christos
Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ixp12x0_pci.c,v 1.8 2008/04/28 20:23:14 martin Exp
$");
/*
* PCI configuration support for IXP12x0 Network Processor chip.
Index: src/sys/arch/arm/mainbus/mainbus.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/mainbus/mainbus.c,v
retrieving revision 1.13
retrieving revision 1.14
diff -u -r1.13 -r1.14
--- src/sys/arch/arm/mainbus/mainbus.c 11 Dec 2005 12:16:51 -0000 1.13
+++ src/sys/arch/arm/mainbus/mainbus.c 27 Apr 2008 18:58:45 -0000 1.14
@@ -1,4 +1,4 @@
-/* $NetBSD: mainbus.c,v 1.13 2005/12/11 12:16:51 christos Exp $ */
+/* $NetBSD: mainbus.c,v 1.14 2008/04/27 18:58:45 matt Exp $ */
/*
* Copyright (c) 1994,1995 Mark Brinicombe.
@@ -42,7 +42,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.13 2005/12/11 12:16:51 christos Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.14 2008/04/27 18:58:45 matt Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -147,7 +147,7 @@
#if defined(arm32) && !defined(EB7500ATX)
mb.mb_iobase += IO_CONF_BASE;
#endif
- mb.mb_iosize = 0;
+ mb.mb_iosize = cf->cf_loc[MAINBUSCF_SIZE];
mb.mb_drq = cf->cf_loc[MAINBUSCF_DACK];
mb.mb_irq = cf->cf_loc[MAINBUSCF_IRQ];
}
Index: src/sys/arch/arm/ofw/ofw_irq.S
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/ofw/ofw_irq.S,v
retrieving revision 1.10
retrieving revision 1.11
diff -u -r1.10 -r1.11
--- src/sys/arch/arm/ofw/ofw_irq.S 6 Jan 2008 03:45:27 -0000 1.10
+++ src/sys/arch/arm/ofw/ofw_irq.S 27 Apr 2008 18:58:45 -0000 1.11
@@ -1,4 +1,4 @@
-/* $NetBSD: ofw_irq.S,v 1.10 2008/01/06 03:45:27 matt Exp $ */
+/* $NetBSD: ofw_irq.S,v 1.11 2008/04/27 18:58:45 matt Exp $ */
/*
* Copyright (c) 1994-1998 Mark Brinicombe.
@@ -75,12 +75,6 @@
Ldisabled_mask:
.word _C_LABEL(disabled_mask)
-Lcurrent_spl_level:
- .word _C_LABEL(current_spl_level)
-
-Lcurrent_intr_depth:
- .word _C_LABEL(cpu_info_store) + CI_IDEPTH
-
Lspl_masks:
.word _C_LABEL(spl_masks)
@@ -100,6 +94,7 @@
/*
* Regsister usage
*
+ * r4 - Address of cpu_info
* r6 - Address of current handler
* r7 - Pointer to handler pointer list
* r8 - Current IRQ requests.
@@ -169,13 +164,13 @@
PUSHFRAMEINSVC /* Push an interrupt frame */
/*
- * Can't field this interrupt now if priority is _SPL_CLOCK
+ * Can't field this interrupt now if priority is IPL_CLOCK
* or higher. For now, we'll just ignore the interrupt.
* Soon, we will have to schedule it for later action.
*/
ldr r0, Lcurrent_spl_level
- ldr r0, [r0]
- cmp r0, #_SPL_CLOCK
+ ldr r0, [r4, #CI_CPL]
+ cmp r0, #IPL_CLOCK
blt ofwtakeint
PULLFRAMEFROMSVCANDEXIT
@@ -204,10 +199,9 @@
* each time the interrupt handler is nested.
*/
- ldr r0, Lcurrent_intr_depth
- ldr r1, [r0]
+ ldr r1, [r4, #CI_INTR_DEPTH]
add r1, r1, #1
- str r1, [r0]
+ str r1, [r4, #CI_INTR_DEPTH]
/* Block the current requested interrupts */
ldr r1, Ldisabled_mask
@@ -228,7 +222,7 @@
* This would benefit from a special ffs type routine
*/
- mov r9, #(_SPL_LEVELS - 1)
+ mov r9, #(NIPL - 1)
ldr r7, Lspl_masks
Lfind_highest_ipl:
@@ -246,8 +240,8 @@
str r0, [r1]
ldr r0, Lcurrent_spl_level
- ldr r1, [r0]
- str r9, [r0]
+ ldr r1, [r4, #CI_CPL]
+ str r9, [r4, #CI_CPL]
stmfd sp!, {r1}
/* Update the irq masks */
@@ -305,8 +299,7 @@
bne irqloop /* no - loop back. */
ldmfd sp!, {r2}
- ldr r1, Lcurrent_spl_level
- str r2, [r1]
+ str r2, [r4, #CI_CPL]
/* Restore previous disabled mask */
ldmfd sp!, {r2}
@@ -322,10 +315,9 @@
msr cpsr_all, r0
/* Decrement the nest count */
- ldr r0, Lcurrent_intr_depth
- ldr r1, [r0]
+ ldr r1, [r4, #CI_INTR_DEPTH]
sub r1, r1, #1
- str r1, [r0]
+ str r1, [r4, #CI_INTR_DEPTH]
LOCK_CAS_CHECK
Index: src/sys/arch/arm/omap/omap_emifs.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/omap/omap_emifs.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- src/sys/arch/arm/omap/omap_emifs.c 6 Jan 2007 00:29:52 -0000 1.1
+++ src/sys/arch/arm/omap/omap_emifs.c 2 May 2008 23:46:12 -0000 1.2
@@ -1,4 +1,4 @@
-/* $NetBSD: omap_emifs.c,v 1.1 2007/01/06 00:29:52 christos Exp $ */
+/* $NetBSD: omap_emifs.c,v 1.2 2008/05/02 23:46:12 martin Exp $ */
/*
@@ -37,10 +37,11 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- * Copyright (c) 2001, The NetBSD Foundation, Inc. All rights reserved.
+ * Copyright (c) 1997,1998, 2001, The NetBSD Foundation, Inc.
+ * All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
- * by IWAMOTO Toshihiro and Ichiro FUKUHARA.
+ * by IWAMOTO Toshihiro, Ichiro FUKUHARA and Paul Kranenburg.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -50,13 +51,18 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*
* Copyright (c) 1999
* Shin Takemura and PocketBSD Project. All rights reserved.
@@ -88,44 +94,10 @@
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
- *
- * Copyright (c) 1997,1998 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Paul Kranenburg.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: omap_emifs.c,v 1.1 2007/01/06 00:29:52 christos
Exp $");
+__KERNEL_RCSID(0, "$NetBSD: omap_emifs.c,v 1.2 2008/05/02 23:46:12 martin Exp
$");
#include "locators.h"
Index: src/sys/arch/arm/omap/omap_intr.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/omap/omap_intr.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -r1.4 -r1.5
--- src/sys/arch/arm/omap/omap_intr.c 6 Jan 2008 01:37:54 -0000 1.4
+++ src/sys/arch/arm/omap/omap_intr.c 27 Apr 2008 18:58:45 -0000 1.5
@@ -1,4 +1,4 @@
-/* $NetBSD: omap_intr.c,v 1.4 2008/01/06 01:37:54 matt Exp $ */
+/* $NetBSD: omap_intr.c,v 1.5 2008/04/27 18:58:45 matt Exp $ */
/*
* Based on arch/arm/xscale/pxa2x0_intr.c
@@ -42,7 +42,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: omap_intr.c,v 1.4 2008/01/06 01:37:54 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: omap_intr.c,v 1.5 2008/04/27 18:58:45 matt Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -72,22 +72,6 @@
uint32_t omap_global_masks[OMAP_NBANKS];
-#ifdef __HAVE_FAST_SOFTINTS
-#define SI_SOFTCLOCK 0
-#define SI_SOFTBIO 1
-#define SI_SOFTNET 2
-#define SI_SOFTSERIAL 3
-/* Array to translate from software interrupt number to priority level. */
-static const int si_to_ipl[] = {
- [SI_SOFTCLOCK] = IPL_SOFTCLOCK,
- [SI_SOFTBIO] = IPL_SOFTBIO,
- [SI_SOFTNET] = IPL_SOFTNET,
- [SI_SOFTSERIAL] = IPL_SOFTSERIAL,
-};
-
-static int soft_interrupt(void *);
-#endif
-
static int stray_interrupt(void *);
static void init_interrupt_masks(void);
static void omap_update_intr_masks(int, int);
@@ -119,7 +103,6 @@
/* struct evbnt ev; */
} handler[OMAP_NIRQ];
-volatile int current_spl_level;
static int extirq_level[OMAP_NIRQ];
int
@@ -193,17 +176,6 @@
if (handler[i].name == NULL)
omapintc_set_name(i, handler[i].irq_num_str, false);
}
-#ifdef __HAVE_FAST_SOFTINTS
- /* and then set up the software interrupts. */
- for(i = 0; i < __arraycount(omap_si_to_irq); ++i) {
- int irq = omap_si_to_irq[i];
- handler[irq].func = soft_interrupt;
- /* Cookie value zero means pass interrupt frame instead */
- handler[irq].cookie = (void *)(intptr_t) (i | 0x80000000);
- KASSERT(i < __arraycount(si_to_ipl));
- extirq_level[irq] = si_to_ipl[i];
- }
-#endif
/* Initialize our table of masks. */
init_interrupt_masks();
@@ -221,7 +193,7 @@
static void
dispatch_irq(int irqno, struct clockframe *frame)
{
- if (extirq_level[irqno] != current_spl_level)
+ if (extirq_level[irqno] != curcpl())
splx(extirq_level[irqno]);
#ifndef MULTIPLE_HANDLERS_ON_ONE_IRQ
@@ -245,7 +217,7 @@
int bank;
int level2 = 0;
- saved_spl_level = current_spl_level;
+ saved_spl_level = curcpl();
for (bank = 0; bank < OMAP_NBANKS; bank++) {
int masked = read_icu(omap_intr_bank_bases[bank],
@@ -342,19 +314,6 @@
return 0;
}
-#ifdef __HAVE_FAST_SOFTINTS
-static int
-soft_interrupt(void *cookie)
-{
- int si = (int)cookie & ~(0x80000000);
-
- softintr_dispatch(si);
-
- return 0;
-}
-#endif
-
-
static inline void
level_block_irq(int lvl, const omap_intr_info_t *inf)
{
@@ -401,7 +360,7 @@
*/
/* Refresh the hardware's masks in case the current level's changed. */
- omap_splx(current_spl_level);
+ omap_splx(curcpl());
restore_interrupts(psw);
}
Index: src/sys/arch/arm/omap/omap_intr.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/omap/omap_intr.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- src/sys/arch/arm/omap/omap_intr.h 6 Jan 2008 01:37:54 -0000 1.2
+++ src/sys/arch/arm/omap/omap_intr.h 27 Apr 2008 18:58:45 -0000 1.3
@@ -1,4 +1,4 @@
-/* $NetBSD: omap_intr.h,v 1.2 2008/01/06 01:37:54 matt Exp $ */
+/* $NetBSD: omap_intr.h,v 1.3 2008/04/27 18:58:45 matt Exp $ */
/*
* Redistribution and use in source and binary forms, with or without
@@ -117,13 +117,6 @@
/* Array of globally-off masks while interrupts processed. */
extern uint32_t omap_global_masks[OMAP_NBANKS];
-#ifdef __HAVE_FAST_SOFTINTS
-/* Array to translate from software interrupt numbers to an irq number. */
-extern int omap_si_to_irq[OMAP_FREE_IRQ_NUM];
-#endif
-
-extern volatile int current_spl_level;
-
/*
* Direct access is being done because 1) it's faster and 2) the interrupt
* controller code is still very tied to the OMAP so we don't really have
@@ -140,7 +133,7 @@
uint32_t *masks = &omap_spl_masks[new][0];
int psw = disable_interrupts(I32_bit);
- current_spl_level = new;
+ set_curcpl(new);
#if OMAP_NBANKS != 5
#error Revisit loop unrolling in omap_splx()
@@ -150,14 +143,17 @@
write_icu(bases[2], OMAP_INTB_MIR, masks[2] | omap_global_masks[2]);
write_icu(bases[3], OMAP_INTB_MIR, masks[3] | omap_global_masks[3]);
write_icu(bases[4], OMAP_INTB_MIR, masks[4] | omap_global_masks[4]);
+#ifdef __HAVE_FAST_SOFTINTS
+ cpu_dosoftintrs();
+#endif
restore_interrupts(psw);
}
static inline int
omap_splraise(int ipl)
{
- int old = current_spl_level;
- if (ipl > current_spl_level)
+ const int old = curcpl();
+ if (ipl > old)
omap_splx(ipl);
return (old);
}
@@ -165,35 +161,11 @@
static inline int
omap_spllower(int ipl)
{
- int old = current_spl_level;
+ const int old = curcpl();
omap_splx(ipl);
return(old);
}
-#ifdef __HAVE_FAST_SOFTINTS
-static inline void
-omap_setsoftintr(int si)
-{
- const omap_intr_info_t *info;
-
- KDASSERT(si < OMAP_FREE_IRQ_NUM);
-
- int irqno = omap_si_to_irq[si];
- KDASSERT(irqno >= OMAP_IRQ_MIN);
- KDASSERT(irqno < OMAP_NIRQ);
-
- info = &omap_intr_info[irqno];
- KDASSERT(info->trig != INVALID);
-
-#if OMAP_INT_FREE1 < OMAP_INT_L1_NIRQ
- /* Level 1 Interrupt Controller needs a zero before the one. */
- write_icu(info->bank_base, OMAP_INTB_SISR, 0);
-#endif
- write_icu(info->bank_base, OMAP_INTB_SISR, info->mask);
-}
-#endif
-
-
int _splraise(int);
int _spllower(int);
void splx(int);
Index: src/sys/arch/arm/omap/omap_ocp.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/omap/omap_ocp.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- src/sys/arch/arm/omap/omap_ocp.c 6 Jan 2007 00:29:52 -0000 1.1
+++ src/sys/arch/arm/omap/omap_ocp.c 2 May 2008 23:46:12 -0000 1.2
@@ -1,4 +1,4 @@
-/* $NetBSD: omap_ocp.c,v 1.1 2007/01/06 00:29:52 christos Exp $ */
+/* $NetBSD: omap_ocp.c,v 1.2 2008/05/02 23:46:12 martin Exp $ */
/*
* Autoconfiguration support for the Texas Instruments OMAP OCP bus.
@@ -36,10 +36,11 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- * Copyright (c) 2001, The NetBSD Foundation, Inc. All rights reserved.
+ * Copyright (c) 1997, 1998, 2001, The NetBSD Foundation, Inc.
+ * All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
- * by IWAMOTO Toshihiro and Ichiro FUKUHARA.
+ * by IWAMOTO Toshihiro, Ichiro FUKUHARA and Paul Kranenburg.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -49,13 +50,18 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*
* Copyright (c) 1999
* Shin Takemura and PocketBSD Project. All rights reserved.
@@ -87,44 +93,10 @@
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
- *
- * Copyright (c) 1997,1998 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Paul Kranenburg.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: omap_ocp.c,v 1.1 2007/01/06 00:29:52 christos Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: omap_ocp.c,v 1.2 2008/05/02 23:46:12 martin Exp
$");
#include "locators.h"
Index: src/sys/arch/arm/omap/omap_rtc.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/omap/omap_rtc.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- src/sys/arch/arm/omap/omap_rtc.c 6 Jan 2007 00:59:45 -0000 1.1
+++ src/sys/arch/arm/omap/omap_rtc.c 27 Apr 2008 18:58:45 -0000 1.2
@@ -1,13 +1,11 @@
-/* $NetBSD: omap_rtc.c,v 1.1 2007/01/06 00:59:45 christos Exp $ */
+/* $NetBSD: omap_rtc.c,v 1.2 2008/04/27 18:58:45 matt Exp $ */
/*
* OMAP RTC driver, based on i80321_timer.c.
*
- * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
+ * Copyright (c) 2007 Microsoft
* All rights reserved.
*
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
@@ -18,27 +16,23 @@
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
+ * This product includes software developed by Microsoft
*
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: omap_rtc.c,v 1.1 2007/01/06 00:59:45 christos Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: omap_rtc.c,v 1.2 2008/04/27 18:58:45 matt Exp $");
#include <sys/types.h>
#include <sys/param.h>
Index: src/sys/arch/arm/omap/omap_start.S
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/omap/omap_start.S,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- src/sys/arch/arm/omap/omap_start.S 6 Jan 2007 00:29:52 -0000 1.1
+++ src/sys/arch/arm/omap/omap_start.S 27 Apr 2008 18:58:45 -0000 1.2
@@ -1,4 +1,4 @@
-/* $NetBSD: omap_start.S,v 1.1 2007/01/06 00:29:52 christos Exp $ */
+/* $NetBSD: omap_start.S,v 1.2 2008/04/27 18:58:45 matt Exp $ */
/*
* Machine dependant startup code for OMAP boards.
@@ -61,6 +61,33 @@
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
+ *
+ * Copyright (c) 2007 Microsoft
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Microsoft
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
*/
#include "assym.h"
Index: src/sys/arch/arm/omap/omap_tipb.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/omap/omap_tipb.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- src/sys/arch/arm/omap/omap_tipb.c 6 Jan 2007 00:29:52 -0000 1.1
+++ src/sys/arch/arm/omap/omap_tipb.c 2 May 2008 23:46:12 -0000 1.2
@@ -1,4 +1,4 @@
-/* $NetBSD: omap_tipb.c,v 1.1 2007/01/06 00:29:52 christos Exp $ */
+/* $NetBSD: omap_tipb.c,v 1.2 2008/05/02 23:46:12 martin Exp $ */
/*
* Autoconfiguration support for the Texas Instruments OMAP TIPB.
@@ -37,10 +37,11 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- * Copyright (c) 2001, The NetBSD Foundation, Inc. All rights reserved.
+ * Copyright (c) 1997, 1998, 2001, The NetBSD Foundation, Inc.
+ * All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
- * by IWAMOTO Toshihiro and Ichiro FUKUHARA.
+ * by IWAMOTO Toshihiro, Ichiro FUKUHARA and Paul Kranenburg.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -50,13 +51,18 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*
* Copyright (c) 1999
* Shin Takemura and PocketBSD Project. All rights reserved.
@@ -88,44 +94,10 @@
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
- *
- * Copyright (c) 1997,1998 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Paul Kranenburg.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: omap_tipb.c,v 1.1 2007/01/06 00:29:52 christos Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: omap_tipb.c,v 1.2 2008/05/02 23:46:12 martin Exp
$");
#include "locators.h"
Index: src/sys/arch/arm/s3c2xx0/ohci_s3c24x0.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/s3c2xx0/ohci_s3c24x0.c,v
retrieving revision 1.4
retrieving revision 1.6
diff -u -r1.4 -r1.6
--- src/sys/arch/arm/s3c2xx0/ohci_s3c24x0.c 31 Mar 2008 02:39:40 -0000
1.4
+++ src/sys/arch/arm/s3c2xx0/ohci_s3c24x0.c 28 Apr 2008 20:23:14 -0000
1.6
@@ -1,4 +1,4 @@
-/* $NetBSD: ohci_s3c24x0.c,v 1.4 2008/03/31 02:39:40 dogcow Exp $ */
+/* $NetBSD: ohci_s3c24x0.c,v 1.6 2008/04/28 20:23:14 martin Exp $ */
/* derived from ohci_pci.c */
@@ -18,13 +18,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -40,7 +33,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ohci_s3c24x0.c,v 1.4 2008/03/31 02:39:40 dogcow
Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ohci_s3c24x0.c,v 1.6 2008/04/28 20:23:14 martin
Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -73,7 +66,7 @@
void *sc_ih; /* interrupt vectoring */
};
-CFATTACH_DECL(ohci_ssio, sizeof(struct ohci_ssio_softc),
+CFATTACH_DECL_NEW(ohci_ssio, sizeof(struct ohci_ssio_softc),
ohci_ssio_match, ohci_ssio_attach, ohci_ssio_detach, ohci_activate);
int
@@ -93,13 +86,16 @@
void
ohci_ssio_attach(struct device *parent, struct device *self, void *aux)
{
- struct ohci_ssio_softc *sc = (struct ohci_ssio_softc *)self;
+ struct ohci_ssio_softc *sc = device_private(self);
struct s3c2xx0_attach_args *sa = (struct s3c2xx0_attach_args *)aux;
usbd_status r;
aprint_normal("\n");
+ sc->sc.sc_dev = self;
+ sc->sc.sc_bus.hci_private = sc;
+
sc->sc.iot = sa->sa_iot;
/*ohcidebug=15;*/
@@ -134,8 +130,7 @@
}
/* Attach usb device. */
- sc->sc.sc_child = config_found((void *)sc, &sc->sc.sc_bus,
- usbctlprint);
+ sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint);
}
int
Index: src/sys/arch/arm/s3c2xx0/s3c2410_intr.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/s3c2xx0/s3c2410_intr.c,v
retrieving revision 1.8
retrieving revision 1.9
diff -u -r1.8 -r1.9
--- src/sys/arch/arm/s3c2xx0/s3c2410_intr.c 6 Jan 2008 03:45:27 -0000
1.8
+++ src/sys/arch/arm/s3c2xx0/s3c2410_intr.c 27 Apr 2008 18:58:45 -0000
1.9
@@ -1,4 +1,4 @@
-/* $NetBSD: s3c2410_intr.c,v 1.8 2008/01/06 03:45:27 matt Exp $ */
+/* $NetBSD: s3c2410_intr.c,v 1.9 2008/04/27 18:58:45 matt Exp $ */
/*
* Copyright (c) 2003 Genetec corporation. All rights reserved.
@@ -35,7 +35,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: s3c2410_intr.c,v 1.8 2008/01/06 03:45:27 matt Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: s3c2410_intr.c,v 1.9 2008/04/27 18:58:45 matt Exp
$");
#include <sys/param.h>
#include <sys/systm.h>
@@ -55,7 +55,6 @@
struct s3c2xx0_intr_dispatch handler[ICU_LEN];
-volatile int current_spl_level;
volatile int intr_mask;
#ifdef __HAVE_FAST_SOFTINTS
volatile int softint_pending;
@@ -99,10 +98,10 @@
int irqno;
int saved_spl_level;
- saved_spl_level = current_spl_level;
+ saved_spl_level = curcpl();
#ifdef DIAGNOSTIC
- if (curcpu()->ci_idepth > 10)
+ if (curcpu()->ci_intr_depth > 10)
panic("nested intr too deep");
#endif
@@ -141,8 +140,7 @@
}
#ifdef __HAVE_FAST_SOFTINTS
- if (get_pending_softint())
- s3c2xx0_do_pending(1);
+ cpu_dosoftints();
#endif
}
@@ -246,7 +244,7 @@
s3c2410_setup_extint(irqno, type);
}
- s3c2xx0_setipl(current_spl_level);
+ s3c2xx0_setipl(curcpl());
restore_interrupts(save);
Index: src/sys/arch/arm/s3c2xx0/s3c24x0_intr.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/s3c2xx0/s3c24x0_intr.h,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -r1.7 -r1.8
--- src/sys/arch/arm/s3c2xx0/s3c24x0_intr.h 6 Jan 2008 01:37:55 -0000
1.7
+++ src/sys/arch/arm/s3c2xx0/s3c24x0_intr.h 27 Apr 2008 18:58:45 -0000
1.8
@@ -1,4 +1,4 @@
-/* $NetBSD: s3c24x0_intr.h,v 1.7 2008/01/06 01:37:55 matt Exp $ */
+/* $NetBSD: s3c24x0_intr.h,v 1.8 2008/04/27 18:58:45 matt Exp $ */
/*
* Copyright (c) 2002, 2003 Genetec corporation. All rights reserved.
@@ -43,7 +43,7 @@
#define get_pending_softint() (softint_pending & soft_intr_mask)
#define update_softintr_mask() \
- (soft_intr_mask = s3c24x0_soft_imask[current_spl_level])
+ (soft_intr_mask = s3c24x0_soft_imask[curcpl()])
#endif
#define s3c2xx0_update_hw_mask() \
Index: src/sys/arch/arm/s3c2xx0/s3c2800_intr.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/s3c2xx0/s3c2800_intr.c,v
retrieving revision 1.10
retrieving revision 1.11
diff -u -r1.10 -r1.11
--- src/sys/arch/arm/s3c2xx0/s3c2800_intr.c 6 Jan 2008 01:37:56 -0000
1.10
+++ src/sys/arch/arm/s3c2xx0/s3c2800_intr.c 27 Apr 2008 18:58:45 -0000
1.11
@@ -1,4 +1,4 @@
-/* $NetBSD: s3c2800_intr.c,v 1.10 2008/01/06 01:37:56 matt Exp $ */
+/* $NetBSD: s3c2800_intr.c,v 1.11 2008/04/27 18:58:45 matt Exp $ */
/*
* Copyright (c) 2002 Fujitsu Component Limited
@@ -38,7 +38,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: s3c2800_intr.c,v 1.10 2008/01/06 01:37:56 matt Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: s3c2800_intr.c,v 1.11 2008/04/27 18:58:45 matt Exp
$");
#include <sys/param.h>
#include <sys/systm.h>
@@ -57,11 +57,6 @@
struct s3c2xx0_intr_dispatch handler[ICU_LEN];
-#ifdef __HAVE_FAST_SOFTINTS
-volatile int softint_pending;
-#endif
-
-volatile int current_spl_level;
volatile int intr_mask; /* XXX: does this need to be volatile? */
volatile int global_intr_mask = 0; /* mask some interrupts at all spl level */
@@ -73,18 +68,6 @@
#define icreg(offset) \
(*(volatile uint32_t *)(intctl_base+(offset)))
-#ifdef __HAVE_FAST_SOFTINTS
-/*
- * Map a software interrupt queue to an interrupt priority level.
- */
-static const int si_to_ipl[] = {
- [SI_SOFTBIO] = IPL_SOFTBIO,
- [SI_SOFTCLOCK] = IPL_SOFTCLOCK,
- [SI_SOFTNET] = IPL_SOFTNET,
- [SI_SOFTSERIAL] = IPL_SOFTSERIAL,
-};
-#endif
-
/*
* Clearing interrupt pending bits affects some built-in
* peripherals. For example, IIC starts transmitting next data when
@@ -104,7 +87,7 @@
int irqno;
int saved_spl_level;
- saved_spl_level = current_spl_level;
+ saved_spl_level = curcpl();
while ((irqbits = icreg(INTCTL_IRQPND) & ICU_INT_HWMASK) != 0) {
@@ -135,8 +118,7 @@
}
#ifdef __HAVE_FAST_SOFTINTS
- if (softint_pending & intr_mask)
- s3c2xx0_do_pending(1);
+ cpu_dosoftints();
#endif
}
@@ -188,7 +170,7 @@
GPIO_EXTINTR, reg);
}
- s3c2xx0_setipl(current_spl_level);
+ s3c2xx0_setipl(curcpl());
restore_interrupts(save);
@@ -199,35 +181,9 @@
static void
init_interrupt_masks(void)
{
- int i = 0;
+ int i;
-#ifdef __HAVE_FAST_SOFTINTS
- s3c2xx0_imask[IPL_NONE] = SI_TO_IRQBIT(SI_SOFTSERIAL) |
- SI_TO_IRQBIT(SI_SOFTNET) | SI_TO_IRQBIT(SI_SOFTCLOCK) |
- SI_TO_IRQBIT(SI_SOFTBIO);
-
- s3c2xx0_imask[IPL_SOFTBIO] = SI_TO_IRQBIT(SI_SOFTSERIAL) |
- SI_TO_IRQBIT(SI_SOFTNET) | SI_TO_IRQBIT(SI_SOFTCLOCK);
-
- /*
- * splsoftclock() is the only interface that users of the
- * generic software interrupt facility have to block their
- * soft intrs, so splsoftclock() must also block IPL_SOFT.
- */
- s3c2xx0_imask[IPL_SOFTCLOCK] = SI_TO_IRQBIT(SI_SOFTSERIAL) |
- SI_TO_IRQBIT(SI_SOFTNET);
-
- /*
- * splsoftnet() must also block splsoftclock(), since we don't
- * want timer-driven network events to occur while we're
- * processing incoming packets.
- */
- s3c2xx0_imask[IPL_SOFTNET] = SI_TO_IRQBIT(SI_SOFTSERIAL);
-
- for (i = IPL_BIO; i < IPL_SOFTSERIAL; ++i)
- s3c2xx0_imask[i] = SI_TO_IRQBIT(SI_SOFTSERIAL);
-#endif
- for (; i < NIPL; ++i)
+ for (i = 0; i < NIPL; i++)
s3c2xx0_imask[i] = 0;
}
Index: src/sys/arch/arm/s3c2xx0/s3c2xx0_intr.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/s3c2xx0/s3c2xx0_intr.c,v
retrieving revision 1.12
retrieving revision 1.13
diff -u -r1.12 -r1.13
--- src/sys/arch/arm/s3c2xx0/s3c2xx0_intr.c 6 Jan 2008 01:37:56 -0000
1.12
+++ src/sys/arch/arm/s3c2xx0/s3c2xx0_intr.c 27 Apr 2008 18:58:45 -0000
1.13
@@ -1,4 +1,4 @@
-/* $NetBSD: s3c2xx0_intr.c,v 1.12 2008/01/06 01:37:56 matt Exp $ */
+/* $NetBSD: s3c2xx0_intr.c,v 1.13 2008/04/27 18:58:45 matt Exp $ */
/*
* Copyright (c) 2002, 2003 Fujitsu Component Limited
@@ -73,7 +73,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: s3c2xx0_intr.c,v 1.12 2008/01/06 01:37:56 matt Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: s3c2xx0_intr.c,v 1.13 2008/04/27 18:58:45 matt Exp
$");
#include <sys/param.h>
#include <sys/systm.h>
@@ -91,7 +91,7 @@
static inline void
__raise(int ipl)
{
- if (current_spl_level < ipl) {
+ if (curcpl() < ipl) {
s3c2xx0_setipl(ipl);
}
}
@@ -124,48 +124,6 @@
s3c2xx0_imask[IPL_HIGH] &= s3c2xx0_imask[IPL_CLOCK];
}
-#ifdef __HAVE_FAST_SOFTINTS
-void
-s3c2xx0_do_pending(int enable_int)
-{
- static __cpu_simple_lock_t processing = __SIMPLELOCK_UNLOCKED;
- int oldirqstate, irqstate, spl_save;
-
- if (__cpu_simple_lock_try(&processing) == 0)
- return;
-
- spl_save = current_spl_level;
-
- oldirqstate = irqstate = disable_interrupts(I32_bit);
-
- if (enable_int)
- irqstate &= ~I32_bit;
-
-
-#define DO_SOFTINT(si,ipl)
\
- if (get_pending_softint() & SI_TO_IRQBIT(si)) { \
- softint_pending &= ~SI_TO_IRQBIT(si); \
- __raise(ipl); \
- restore_interrupts(irqstate); \
- softintr_dispatch(si); \
- disable_interrupts(I32_bit); \
- s3c2xx0_setipl(spl_save); \
- }
-
- do {
- DO_SOFTINT(SI_SOFTSERIAL, IPL_SOFTSERIAL);
- DO_SOFTINT(SI_SOFTNET, IPL_SOFTNET);
- DO_SOFTINT(SI_SOFTBIO, IPL_SOFTBIO);
- DO_SOFTINT(SI_SOFTCLOCK, IPL_SOFTCLOCK);
- } while (get_pending_softint());
-
- __cpu_simple_unlock(&processing);
-
- restore_interrupts(oldirqstate);
-}
-#endif /* __HAVE_FAST_SOFTINTS */
-
-
static int
stray_interrupt(void *cookie)
{
@@ -231,12 +189,3 @@
{
return s3c2xx0_spllower(ipl);
}
-
-#ifdef __HAVE_FAST_SOFTINTS
-#undef _setsoftintr
-void
-_setsoftintr(int si)
-{
- return s3c2xx0_setsoftintr(si);
-}
-#endif
Index: src/sys/arch/arm/s3c2xx0/s3c2xx0_intr.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/s3c2xx0/s3c2xx0_intr.h,v
retrieving revision 1.11
retrieving revision 1.12
diff -u -r1.11 -r1.12
--- src/sys/arch/arm/s3c2xx0/s3c2xx0_intr.h 6 Jan 2008 01:37:56 -0000
1.11
+++ src/sys/arch/arm/s3c2xx0/s3c2xx0_intr.h 27 Apr 2008 18:58:45 -0000
1.12
@@ -1,4 +1,4 @@
-/* $NetBSD: s3c2xx0_intr.h,v 1.11 2008/01/06 01:37:56 matt Exp $ */
+/* $NetBSD: s3c2xx0_intr.h,v 1.12 2008/04/27 18:58:45 matt Exp $ */
/*
* Copyright (c) 2002, 2003 Fujitsu Component Limited
@@ -84,7 +84,6 @@
extern volatile uint32_t *s3c2xx0_intr_mask_reg;
-extern volatile int current_spl_level;
extern volatile int intr_mask;
extern volatile int global_intr_mask;
#ifdef __HAVE_FAST_SOFTINTS
@@ -93,9 +92,6 @@
extern int s3c2xx0_imask[];
extern int s3c2xx0_ilevel[];
-#ifdef __HAVE_FAST_SOFTINTS
-void s3c2xx0_do_pending(int);
-#endif
void s3c2xx0_update_intr_masks( int, int );
static inline void
@@ -119,8 +115,8 @@
static inline void
s3c2xx0_setipl(int new)
{
- current_spl_level = new;
- intr_mask = s3c2xx0_imask[current_spl_level];
+ set_curcpl(new);
+ intr_mask = s3c2xx0_imask[curcpl()];
s3c2xx0_update_hw_mask();
#ifdef __HAVE_FAST_SOFTINTS
update_softintr_mask();
@@ -138,9 +134,7 @@
restore_interrupts(psw);
#ifdef __HAVE_FAST_SOFTINTS
- /* If there are software interrupts to process, do it. */
- if (get_pending_softint())
- s3c2xx0_do_pending(0);
+ cpu_dosoftints();
#endif
}
@@ -150,8 +144,8 @@
{
int old, psw;
- old = current_spl_level;
- if( ipl > current_spl_level ){
+ old = curcpl();
+ if( ipl > old ){
psw = disable_interrupts(I32_bit);
s3c2xx0_setipl(ipl);
restore_interrupts(psw);
@@ -163,43 +157,22 @@
static inline int
s3c2xx0_spllower(int ipl)
{
- int old = current_spl_level;
+ int old = curcpl();
int psw = disable_interrupts(I32_bit);
s3c2xx0_splx(ipl);
restore_interrupts(psw);
return(old);
}
-#ifdef __HAVE_FAST_SOFTINTS
-static inline void
-s3c2xx0_setsoftintr(int si)
-{
-
- atomic_set_bit( (u_int *)__UNVOLATILE(&softint_pending),
- SI_TO_IRQBIT(si) );
-
- /* Process unmasked pending soft interrupts. */
- if (get_pending_softint())
- s3c2xx0_do_pending(0);
-}
-#endif
-
-
int _splraise(int);
int _spllower(int);
void splx(int);
-#ifdef __HAVE_FAST_SOFTINTS
-void _setsoftintr(int);
-#endif
#if !defined(EVBARM_SPL_NOINLINE)
#define splx(new) s3c2xx0_splx(new)
#define _spllower(ipl) s3c2xx0_spllower(ipl)
#define _splraise(ipl) s3c2xx0_splraise(ipl)
-#if 0
-#define _setsoftintr(si) s3c2xx0_setsoftintr(si)
-#endif
#endif /* !EVBARM_SPL_NOINTR */
Index: src/sys/arch/arm/s3c2xx0/sscom.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/s3c2xx0/sscom.c,v
retrieving revision 1.27
retrieving revision 1.28
diff -u -r1.27 -r1.28
--- src/sys/arch/arm/s3c2xx0/sscom.c 27 Nov 2007 22:00:59 -0000 1.27
+++ src/sys/arch/arm/s3c2xx0/sscom.c 28 Apr 2008 20:23:14 -0000 1.28
@@ -1,4 +1,4 @@
-/* $NetBSD: sscom.c,v 1.27 2007/11/27 22:00:59 ad Exp $ */
+/* $NetBSD: sscom.c,v 1.28 2008/04/28 20:23:14 martin Exp $ */
/*
* Copyright (c) 2002, 2003 Fujitsu Component Limited
@@ -47,13 +47,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -105,7 +98,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sscom.c,v 1.27 2007/11/27 22:00:59 ad Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sscom.c,v 1.28 2008/04/28 20:23:14 martin Exp $");
#include "opt_sscom.h"
#include "opt_ddb.h"
Index: src/sys/arch/arm/sa11x0/sa1111.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/sa11x0/sa1111.c,v
retrieving revision 1.21
retrieving revision 1.22
diff -u -r1.21 -r1.22
--- src/sys/arch/arm/sa11x0/sa1111.c 8 Jan 2008 02:07:52 -0000 1.21
+++ src/sys/arch/arm/sa11x0/sa1111.c 28 Apr 2008 20:23:14 -0000 1.22
@@ -1,4 +1,4 @@
-/* $NetBSD: sa1111.c,v 1.21 2008/01/08 02:07:52 matt Exp $ */
+/* $NetBSD: sa1111.c,v 1.22 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -42,7 +35,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sa1111.c,v 1.21 2008/01/08 02:07:52 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sa1111.c,v 1.22 2008/04/28 20:23:14 martin Exp $");
#include <sys/param.h>
#include <sys/systm.h>
Index: src/sys/arch/arm/sa11x0/sa1111_reg.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/sa11x0/sa1111_reg.h,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -r1.3 -r1.4
--- src/sys/arch/arm/sa11x0/sa1111_reg.h 18 Dec 2002 04:09:31 -0000
1.3
+++ src/sys/arch/arm/sa11x0/sa1111_reg.h 28 Apr 2008 20:23:14 -0000
1.4
@@ -1,4 +1,4 @@
-/* $NetBSD: sa1111_reg.h,v 1.3 2002/12/18 04:09:31 bsh Exp $ */
+/* $NetBSD: sa1111_reg.h,v 1.4 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/sa11x0/sa1111_var.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/sa11x0/sa1111_var.h,v
retrieving revision 1.10
retrieving revision 1.11
diff -u -r1.10 -r1.11
--- src/sys/arch/arm/sa11x0/sa1111_var.h 27 Jun 2006 13:58:08 -0000
1.10
+++ src/sys/arch/arm/sa11x0/sa1111_var.h 28 Apr 2008 20:23:14 -0000
1.11
@@ -1,4 +1,4 @@
-/* $NetBSD: sa1111_var.h,v 1.10 2006/06/27 13:58:08 peter Exp $ */
+/* $NetBSD: sa1111_var.h,v 1.11 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/sa11x0/sa11x0.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/sa11x0/sa11x0.c,v
retrieving revision 1.21
retrieving revision 1.22
diff -u -r1.21 -r1.22
--- src/sys/arch/arm/sa11x0/sa11x0.c 27 Jun 2006 13:58:08 -0000 1.21
+++ src/sys/arch/arm/sa11x0/sa11x0.c 28 Apr 2008 20:23:14 -0000 1.22
@@ -1,4 +1,4 @@
-/* $NetBSD: sa11x0.c,v 1.21 2006/06/27 13:58:08 peter Exp $ */
+/* $NetBSD: sa11x0.c,v 1.22 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 2001, The NetBSD Foundation, Inc. All rights reserved.
@@ -14,13 +14,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -69,7 +62,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sa11x0.c,v 1.21 2006/06/27 13:58:08 peter Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sa11x0.c,v 1.22 2008/04/28 20:23:14 martin Exp $");
#include <sys/param.h>
#include <sys/systm.h>
Index: src/sys/arch/arm/sa11x0/sa11x0_com.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/sa11x0/sa11x0_com.c,v
retrieving revision 1.42
retrieving revision 1.43
diff -u -r1.42 -r1.43
--- src/sys/arch/arm/sa11x0/sa11x0_com.c 27 Dec 2007 12:29:16 -0000
1.42
+++ src/sys/arch/arm/sa11x0/sa11x0_com.c 28 Apr 2008 20:23:14 -0000
1.43
@@ -1,4 +1,4 @@
-/* $NetBSD: sa11x0_com.c,v 1.42 2007/12/27 12:29:16 rjs Exp $ */
+/* $NetBSD: sa11x0_com.c,v 1.43 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 1998, 1999, 2001 The NetBSD Foundation, Inc.
@@ -18,13 +18,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -71,7 +64,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sa11x0_com.c,v 1.42 2007/12/27 12:29:16 rjs Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: sa11x0_com.c,v 1.43 2008/04/28 20:23:14 martin Exp
$");
#include "opt_com.h"
#include "opt_ddb.h"
Index: src/sys/arch/arm/sa11x0/sa11x0_comreg.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/sa11x0/sa11x0_comreg.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- src/sys/arch/arm/sa11x0/sa11x0_comreg.h 11 Apr 2006 15:24:24 -0000
1.2
+++ src/sys/arch/arm/sa11x0/sa11x0_comreg.h 28 Apr 2008 20:23:14 -0000
1.3
@@ -1,4 +1,4 @@
-/* $NetBSD: sa11x0_comreg.h,v 1.2 2006/04/11 15:24:24 peter Exp $
*/
+/* $NetBSD: sa11x0_comreg.h,v 1.3 2008/04/28 20:23:14 martin Exp $
*/
/*-
* Copyright (c) 2001, The NetBSD Foundation, Inc. All rights reserved.
@@ -14,13 +14,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/sa11x0/sa11x0_comvar.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/sa11x0/sa11x0_comvar.h,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -r1.4 -r1.5
--- src/sys/arch/arm/sa11x0/sa11x0_comvar.h 17 Oct 2007 19:53:43 -0000
1.4
+++ src/sys/arch/arm/sa11x0/sa11x0_comvar.h 28 Apr 2008 20:23:14 -0000
1.5
@@ -1,4 +1,4 @@
-/* $NetBSD: sa11x0_comvar.h,v 1.4 2007/10/17 19:53:43 garbled Exp $
*/
+/* $NetBSD: sa11x0_comvar.h,v 1.5 2008/04/28 20:23:14 martin Exp $
*/
/*-
* Copyright (c) 2001, The NetBSD Foundation, Inc. All rights reserved.
@@ -14,13 +14,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/sa11x0/sa11x0_dmacreg.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/sa11x0/sa11x0_dmacreg.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- src/sys/arch/arm/sa11x0/sa11x0_dmacreg.h 11 Apr 2006 15:24:24 -0000
1.2
+++ src/sys/arch/arm/sa11x0/sa11x0_dmacreg.h 28 Apr 2008 20:23:14 -0000
1.3
@@ -1,4 +1,4 @@
-/* $NetBSD: sa11x0_dmacreg.h,v 1.2 2006/04/11 15:24:24 peter Exp $
*/
+/* $NetBSD: sa11x0_dmacreg.h,v 1.3 2008/04/28 20:23:14 martin Exp $
*/
/*-
* Copyright (c) 2001, The NetBSD Foundation, Inc. All rights reserved.
@@ -14,13 +14,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/sa11x0/sa11x0_gpioreg.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/sa11x0/sa11x0_gpioreg.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- src/sys/arch/arm/sa11x0/sa11x0_gpioreg.h 30 Jul 2001 15:58:56 -0000
1.2
+++ src/sys/arch/arm/sa11x0/sa11x0_gpioreg.h 28 Apr 2008 20:23:14 -0000
1.3
@@ -1,4 +1,4 @@
-/* $NetBSD: sa11x0_gpioreg.h,v 1.2 2001/07/30 15:58:56 rjs Exp $ */
+/* $NetBSD: sa11x0_gpioreg.h,v 1.3 2008/04/28 20:23:14 martin Exp $
*/
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved.
@@ -14,13 +14,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/sa11x0/sa11x0_irq.S
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/sa11x0/sa11x0_irq.S,v
retrieving revision 1.12
retrieving revision 1.13
diff -u -r1.12 -r1.13
--- src/sys/arch/arm/sa11x0/sa11x0_irq.S 8 Jan 2008 02:07:52 -0000
1.12
+++ src/sys/arch/arm/sa11x0/sa11x0_irq.S 27 Apr 2008 18:58:45 -0000
1.13
@@ -1,4 +1,4 @@
-/* $NetBSD: sa11x0_irq.S,v 1.12 2008/01/08 02:07:52 matt Exp $ */
+/* $NetBSD: sa11x0_irq.S,v 1.13 2008/04/27 18:58:45 matt Exp $ */
/*
* Copyright (c) 1998 Mark Brinicombe.
@@ -49,12 +49,6 @@
.text
.align 0
-Lcurrent_spl_level:
- .word _C_LABEL(current_spl_level)
-
-Lcurrent_intr_depth:
- .word _C_LABEL(cpu_info_store) + CI_IDEPTH
-
Lspl_masks:
.word _C_LABEL(spl_masks)
@@ -105,10 +99,9 @@
* each time the interrupt handler is nested.
*/
- ldr r0, Lcurrent_intr_depth
- ldr r1, [r0]
+ ldr r1, [r4, #CI_INTR_DEPTH]
add r1, r1, #1
- str r1, [r0]
+ str r1, [r4, #CI_INTR_DEPTH]
/*
* Need to block all interrupts at the IPL or lower for
@@ -123,7 +116,7 @@
* This would benefit from a special ffs type routine
*/
- mov r9, #(_SPL_LEVELS - 1)
+ mov r9, #(NIPL - 1)
ldr r7, Lspl_masks
Lfind_highest_ipl:
@@ -137,9 +130,8 @@
ldr r2, [r7, r9, lsl #2]
mvn r2, r2
- ldr r0, Lcurrent_spl_level
- ldr r1, [r0]
- str r9, [r0]
+ ldr r1, [r4, #CI_CPL]
+ str r9, [r4, #CI_CPL]
stmfd sp!, {r1}
/* Update the SAIP irq masks */
@@ -220,8 +212,7 @@
bne irqloop /* no - loop back. */
ldmfd sp!, {r2}
- ldr r1, Lcurrent_spl_level
- str r2, [r1]
+ str r2, [r4, #CI_CPL]
/* Restore previous disabled mask */
bl _C_LABEL(irq_setmasks)
@@ -243,10 +234,9 @@
#endif
/* Decrement the nest count */
- ldr r0, Lcurrent_intr_depth
- ldr r1, [r0]
+ ldr r1, [r4, #CI_INTR_DEPTH]
sub r1, r1, #1
- str r1, [r0]
+ str r1, [r4, #CI_INTR_DEPTH]
LOCK_CAS_CHECK
@@ -264,8 +254,7 @@
/* Calculate interrupt mask */
ldr r0, Lspl_masks
- ldr r2, Lcurrent_spl_level
- ldr r2, [r2]
+ ldr r2, [r4, #CI_CPL]
ldr r2, [r0, r2, lsl #2]
ldr r0, _C_LABEL(saipic_base)
Index: src/sys/arch/arm/sa11x0/sa11x0_irqhandler.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/sa11x0/sa11x0_irqhandler.c,v
retrieving revision 1.13
retrieving revision 1.15
diff -u -r1.13 -r1.15
--- src/sys/arch/arm/sa11x0/sa11x0_irqhandler.c 6 Jan 2008 03:45:27 -0000
1.13
+++ src/sys/arch/arm/sa11x0/sa11x0_irqhandler.c 28 Apr 2008 20:23:14 -0000
1.15
@@ -1,4 +1,4 @@
-/* $NetBSD: sa11x0_irqhandler.c,v 1.13 2008/01/06 03:45:27 matt Exp $
*/
+/* $NetBSD: sa11x0_irqhandler.c,v 1.15 2008/04/28 20:23:14 martin Exp $
*/
/*-
* Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
@@ -19,13 +19,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -76,7 +69,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sa11x0_irqhandler.c,v 1.13 2008/01/06 03:45:27
matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sa11x0_irqhandler.c,v 1.15 2008/04/28 20:23:14
martin Exp $");
#include "opt_irqstats.h"
@@ -96,12 +89,7 @@
irqhandler_t *irqhandlers[NIRQS];
u_int actual_mask;
-#ifdef hpcarm
-#define IPL_LEVELS (NIPL+1)
-u_int imask[NIPL];
-#else
-u_int irqmasks[IPL_LEVELS];
-#endif
+u_int irqmasks[NIPL];
extern void set_spl_masks(void);
static int fakeintr(void *);
@@ -113,6 +101,9 @@
const struct evcnt *sa11x0_intr_evcnt(sa11x0_chipset_tag_t, int);
void stray_irqhandler(void *);
+#if IPL_NONE > IPL_HIGH
+#error IPL_NONE must be less than IPL_HIGH
+#endif
/*
* Recalculate the interrupt masks from scratch.
* We could code special registry and deregistry versions of this function that
@@ -122,46 +113,33 @@
void
intr_calculatemasks(void)
{
- int irq, level;
+ int irq, ipl;
struct irqhandler *q;
int intrlevel[ICU_LEN];
/* First, figure out which levels each IRQ uses. */
for (irq = 0; irq < ICU_LEN; irq++) {
- int levels = 0;
+ int ipls = 0;
for (q = irqhandlers[irq]; q; q = q->ih_next)
- levels |= 1 << q->ih_level;
- intrlevel[irq] = levels;
+ ipls |= 1 << q->ih_level;
+ intrlevel[irq] = ipls;
}
/* Then figure out which IRQs use each level. */
-#ifdef hpcarm
- for (level = 0; level < NIPL; level++) {
-#else
- for (level = 0; level <= IPL_LEVELS; level++) {
-#endif
+ for (ipl = 0; ipl < NIPL; ipl++) {
int irqs = 0;
for (irq = 0; irq < ICU_LEN; irq++)
- if (intrlevel[irq] & (1 << level))
+ if (intrlevel[irq] & (1 << ipl))
irqs |= 1 << irq;
-#ifdef hpcarm
- imask[level] = irqs;
-#else
- irqmasks[level] = irqs;
-#endif
+ irqmasks[ipl] = irqs;
}
/*
* Enforce a hierarchy that gives slow devices a better chance at not
* dropping data.
*/
-#ifdef hpcarm
- for (level = NIPL - 1; level > 0; level--)
- imask[level - 1] |= imask[level];
-#else
- for (level = IPL_LEVELS; level > 0; level--)
- irqmasks[level - 1] |= irqmasks[level];
-#endif
+ for (ipl = IPL_NONE; ipl < NIPL - 1; ipl++)
+ irqmasks[ipl + 1] |= irqmasks[ipl];
}
Index: src/sys/arch/arm/sa11x0/sa11x0_mcpreg.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/sa11x0/sa11x0_mcpreg.h,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- src/sys/arch/arm/sa11x0/sa11x0_mcpreg.h 30 Jul 2001 10:17:21 -0000
1.1
+++ src/sys/arch/arm/sa11x0/sa11x0_mcpreg.h 28 Apr 2008 20:23:14 -0000
1.2
@@ -1,4 +1,4 @@
-/* $NetBSD: sa11x0_mcpreg.h,v 1.1 2001/07/30 10:17:21 rjs Exp $ */
+/* $NetBSD: sa11x0_mcpreg.h,v 1.2 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved.
@@ -14,13 +14,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/sa11x0/sa11x0_ost.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/sa11x0/sa11x0_ost.c,v
retrieving revision 1.23
retrieving revision 1.25
diff -u -r1.23 -r1.25
--- src/sys/arch/arm/sa11x0/sa11x0_ost.c 20 Apr 2008 10:21:13 -0000
1.23
+++ src/sys/arch/arm/sa11x0/sa11x0_ost.c 10 May 2008 15:31:04 -0000
1.25
@@ -1,4 +1,4 @@
-/* $NetBSD: sa11x0_ost.c,v 1.23 2008/04/20 10:21:13 chris Exp $ */
+/* $NetBSD: sa11x0_ost.c,v 1.25 2008/05/10 15:31:04 martin Exp $ */
/*
* Copyright (c) 1997 Mark Brinicombe.
@@ -38,7 +38,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sa11x0_ost.c,v 1.23 2008/04/20 10:21:13 chris Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: sa11x0_ost.c,v 1.25 2008/05/10 15:31:04 martin Exp
$");
#include <sys/types.h>
#include <sys/param.h>
Index: src/sys/arch/arm/sa11x0/sa11x0_ostreg.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/sa11x0/sa11x0_ostreg.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- src/sys/arch/arm/sa11x0/sa11x0_ostreg.h 27 Jun 2006 13:58:08 -0000
1.2
+++ src/sys/arch/arm/sa11x0/sa11x0_ostreg.h 28 Apr 2008 20:23:14 -0000
1.3
@@ -1,4 +1,4 @@
-/* $NetBSD: sa11x0_ostreg.h,v 1.2 2006/06/27 13:58:08 peter Exp $ */
+/* $NetBSD: sa11x0_ostreg.h,v 1.3 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved.
@@ -14,13 +14,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/sa11x0/sa11x0_ppcreg.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/sa11x0/sa11x0_ppcreg.h,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -r1.4 -r1.5
--- src/sys/arch/arm/sa11x0/sa11x0_ppcreg.h 14 May 2006 21:55:10 -0000
1.4
+++ src/sys/arch/arm/sa11x0/sa11x0_ppcreg.h 28 Apr 2008 20:23:14 -0000
1.5
@@ -1,4 +1,4 @@
-/* $NetBSD: sa11x0_ppcreg.h,v 1.4 2006/05/14 21:55:10 elad Exp $ */
+/* $NetBSD: sa11x0_ppcreg.h,v 1.5 2008/04/28 20:23:14 martin Exp $
*/
/*-
* Copyright (c) 2001, The NetBSD Foundation, Inc. All rights reserved.
@@ -14,13 +14,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/sa11x0/sa11x0_reg.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/sa11x0/sa11x0_reg.h,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -r1.6 -r1.7
--- src/sys/arch/arm/sa11x0/sa11x0_reg.h 27 Jun 2006 10:45:06 -0000
1.6
+++ src/sys/arch/arm/sa11x0/sa11x0_reg.h 28 Apr 2008 20:23:14 -0000
1.7
@@ -1,4 +1,4 @@
-/* $NetBSD: sa11x0_reg.h,v 1.6 2006/06/27 10:45:06 peter Exp $ */
+/* $NetBSD: sa11x0_reg.h,v 1.7 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved.
@@ -14,13 +14,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/sa11x0/sa11x0_sspreg.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/sa11x0/sa11x0_sspreg.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- src/sys/arch/arm/sa11x0/sa11x0_sspreg.h 11 Apr 2006 15:24:24 -0000
1.2
+++ src/sys/arch/arm/sa11x0/sa11x0_sspreg.h 28 Apr 2008 20:23:14 -0000
1.3
@@ -1,4 +1,4 @@
-/* $NetBSD: sa11x0_sspreg.h,v 1.2 2006/04/11 15:24:24 peter Exp $ */
+/* $NetBSD: sa11x0_sspreg.h,v 1.3 2008/04/28 20:23:14 martin Exp $
*/
/*-
* Copyright (c) 2001, The NetBSD Foundation, Inc. All rights reserved.
@@ -14,13 +14,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/sa11x0/sa11x0_var.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/sa11x0/sa11x0_var.h,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -r1.7 -r1.8
--- src/sys/arch/arm/sa11x0/sa11x0_var.h 12 Apr 2006 12:42:27 -0000
1.7
+++ src/sys/arch/arm/sa11x0/sa11x0_var.h 28 Apr 2008 20:23:14 -0000
1.8
@@ -1,4 +1,4 @@
-/* $NetBSD: sa11x0_var.h,v 1.7 2006/04/12 12:42:27 simonb Exp $ */
+/* $NetBSD: sa11x0_var.h,v 1.8 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 2001, The NetBSD Foundation, Inc. All rights reserved.
@@ -14,13 +14,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/sa11x0/sa11x1_pcic.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/sa11x0/sa11x1_pcic.c,v
retrieving revision 1.17
retrieving revision 1.18
diff -u -r1.17 -r1.18
--- src/sys/arch/arm/sa11x0/sa11x1_pcic.c 20 Apr 2008 16:47:52 -0000
1.17
+++ src/sys/arch/arm/sa11x0/sa11x1_pcic.c 28 Apr 2008 20:23:14 -0000
1.18
@@ -1,4 +1,4 @@
-/* $NetBSD: sa11x1_pcic.c,v 1.17 2008/04/20 16:47:52 rafal Exp $ */
+/* $NetBSD: sa11x1_pcic.c,v 1.18 2008/04/28 20:23:14 martin Exp $
*/
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -37,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sa11x1_pcic.c,v 1.17 2008/04/20 16:47:52 rafal Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: sa11x1_pcic.c,v 1.18 2008/04/28 20:23:14 martin
Exp $");
#include <sys/param.h>
#include <sys/systm.h>
Index: src/sys/arch/arm/sa11x0/sa11x1_pcicreg.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/sa11x0/sa11x1_pcicreg.h,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- src/sys/arch/arm/sa11x0/sa11x1_pcicreg.h 8 Jul 2001 23:37:54 -0000
1.1
+++ src/sys/arch/arm/sa11x0/sa11x1_pcicreg.h 28 Apr 2008 20:23:14 -0000
1.2
@@ -1,4 +1,4 @@
-/* $NetBSD: sa11x1_pcicreg.h,v 1.1 2001/07/08 23:37:54 rjs Exp $ */
+/* $NetBSD: sa11x1_pcicreg.h,v 1.2 2008/04/28 20:23:14 martin Exp $
*/
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/sa11x0/sa11x1_pcicvar.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/sa11x0/sa11x1_pcicvar.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- src/sys/arch/arm/sa11x0/sa11x1_pcicvar.h 11 Dec 2005 12:16:51 -0000
1.2
+++ src/sys/arch/arm/sa11x0/sa11x1_pcicvar.h 28 Apr 2008 20:23:14 -0000
1.3
@@ -1,4 +1,4 @@
-/* $NetBSD: sa11x1_pcicvar.h,v 1.2 2005/12/11 12:16:51 christos Exp $ */
+/* $NetBSD: sa11x1_pcicvar.h,v 1.3 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/sa11x0/sa11xx_pcicreg.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/sa11x0/sa11xx_pcicreg.h,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- src/sys/arch/arm/sa11x0/sa11xx_pcicreg.h 8 Jul 2001 23:37:54 -0000
1.1
+++ src/sys/arch/arm/sa11x0/sa11xx_pcicreg.h 28 Apr 2008 20:23:14 -0000
1.2
@@ -1,4 +1,4 @@
-/* $NetBSD: sa11xx_pcicreg.h,v 1.1 2001/07/08 23:37:54 rjs Exp $ */
+/* $NetBSD: sa11xx_pcicreg.h,v 1.2 2008/04/28 20:23:14 martin Exp $
*/
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/sa11x0/sa11xx_pcicvar.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/sa11x0/sa11xx_pcicvar.h,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -r1.5 -r1.6
--- src/sys/arch/arm/sa11x0/sa11xx_pcicvar.h 6 Dec 2007 17:00:31 -0000
1.5
+++ src/sys/arch/arm/sa11x0/sa11xx_pcicvar.h 28 Apr 2008 20:23:14 -0000
1.6
@@ -1,4 +1,4 @@
-/* $NetBSD: sa11xx_pcicvar.h,v 1.5 2007/12/06 17:00:31 ad Exp $ */
+/* $NetBSD: sa11xx_pcicvar.h,v 1.6 2008/04/28 20:23:14 martin Exp $
*/
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/xscale/becc_csrvar.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/xscale/becc_csrvar.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- src/sys/arch/arm/xscale/becc_csrvar.h 24 Dec 2005 20:06:52 -0000
1.2
+++ src/sys/arch/arm/xscale/becc_csrvar.h 27 Apr 2008 18:58:45 -0000
1.3
@@ -1,4 +1,4 @@
-/* $NetBSD: becc_csrvar.h,v 1.2 2005/12/24 20:06:52 perry Exp $ */
+/* $NetBSD: becc_csrvar.h,v 1.3 2008/04/27 18:58:45 matt Exp $ */
/*
* Copyright (c) 2002 Wasabi Systems, Inc.
@@ -50,6 +50,6 @@
#define BECC_CSR_READ(x) *(volatile uint32_t *)(becc_vaddr + (x))
#define BECC_CSR_WRITE(x, v) *(volatile uint32_t *)(becc_vaddr +
(x)) = (v)
-extern const char *becc_irqnames[];
+extern const char * const becc_irqnames[];
#endif /* _BECC_CSRVAR_H_ */
Index: src/sys/arch/arm/xscale/becc_icu.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/xscale/becc_icu.c,v
retrieving revision 1.10
retrieving revision 1.11
diff -u -r1.10 -r1.11
--- src/sys/arch/arm/xscale/becc_icu.c 6 Jan 2008 01:37:57 -0000 1.10
+++ src/sys/arch/arm/xscale/becc_icu.c 27 Apr 2008 18:58:45 -0000 1.11
@@ -1,4 +1,4 @@
-/* $NetBSD: becc_icu.c,v 1.10 2008/01/06 01:37:57 matt Exp $ */
+/* $NetBSD: becc_icu.c,v 1.11 2008/04/27 18:58:45 matt Exp $ */
/*
* Copyright (c) 2002 Wasabi Systems, Inc.
@@ -40,7 +40,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: becc_icu.c,v 1.10 2008/01/06 01:37:57 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: becc_icu.c,v 1.11 2008/04/27 18:58:45 matt Exp $");
#ifndef EVBARM_SPL_NOINLINE
#define EVBARM_SPL_NOINLINE
@@ -68,9 +68,6 @@
/* Interrupts to mask at each level. */
uint32_t becc_imask[NIPL];
-/* Current interrupt priority level. */
-volatile uint32_t current_spl_level;
-
/* Interrupts pending. */
volatile uint32_t becc_ipending;
volatile uint32_t becc_sipending;
@@ -85,7 +82,7 @@
* Interrupt bit names.
* XXX Some of these are BRH-centric.
*/
-const char *becc_irqnames[] = {
+const char * const becc_irqnames[] = {
"soft",
"timer A",
"timer B",
@@ -199,10 +196,6 @@
* limited input buffer space/"real-time" requirements) a better
* chance at not dropping data.
*/
- becc_imask[IPL_SOFTCLOCK] = (1U << ICU_SOFT);
- becc_imask[IPL_SOFTNET] = (1U << ICU_SOFT);
- becc_imask[IPL_SOFTBIO] = (1U << ICU_SOFT);
- becc_imask[IPL_SOFTSERIAL] = (1U << ICU_SOFT);
becc_imask[IPL_VM] |= becc_imask[IPL_SOFTSERIAL];
becc_imask[IPL_SCHED] |= becc_imask[IPL_VM];
becc_imask[IPL_HIGH] |= becc_imask[IPL_SCHED];
@@ -226,78 +219,21 @@
void
splx(int new)
{
-
becc_splx(new);
}
int
_spllower(int ipl)
{
-
return (becc_spllower(ipl));
}
int
_splraise(int ipl)
{
-
return (becc_splraise(ipl));
}
-#ifdef __HAVE_FAST_SOFTINTS
-void
-_setsoftintr(int si)
-{
-
- becc_setsoftintr(si);
-}
-
-static const int si_to_ipl[] = {
- [SI_SOFTBIO] = IPL_SOFTBIO,
- [SI_SOFTCLOCK] = IPL_SOFTCLOCK,
- [SI_SOFTNET] = IPL_SOFTNET,
- [SI_SOFTSERIAL] = IPL_SOFTSERIAL,
-};
-
-int
-becc_softint(void *arg)
-{
- static __cpu_simple_lock_t processing = __SIMPLELOCK_UNLOCKED;
- uint32_t new, oldirqstate;
-
- /* Clear interrupt */
- BECC_CSR_WRITE(BECC_ICSR, 0);
-
- if (__cpu_simple_lock_try(&processing) == 0)
- return 0;
-
- oldirqstate = disable_interrupts(I32_bit);
-
- new = current_spl_level;
-
-#define DO_SOFTINT(si) \
- if (becc_sipending & (1 << (si))) { \
- becc_sipending &= ~(1 << (si)); \
- current_spl_level |= becc_imask[si_to_ipl[(si)]]; \
- restore_interrupts(oldirqstate); \
- softintr_dispatch(si); \
- oldirqstate = disable_interrupts(I32_bit); \
- current_spl_level = new; \
- }
-
- DO_SOFTINT(SI_SOFTSERIAL);
- DO_SOFTINT(SI_SOFTNET);
- DO_SOFTINT(SI_SOFTCLOCK);
- DO_SOFTINT(SI_SOFT);
-
- __cpu_simple_unlock(&processing);
-
- restore_interrupts(oldirqstate);
-
- return 1;
-}
-#endif
-
/*
* becc_icu_init:
*
@@ -403,12 +339,11 @@
{
struct intrq *iq;
struct intrhand *ih;
- uint32_t oldirqstate, pcpl, irq, ibit, hwpend;
- struct cpu_info *ci;
+ uint32_t oldirqstate, irq, ibit, hwpend;
+ struct cpu_info * const ci = curcpu();
+ const int ppl = ci->ci_cpl;
+ const uint32_t imask = becc_imask[ppl];
- ci = curcpu();
- ci->ci_idepth++;
- pcpl = current_spl_level;
hwpend = becc_icsr_read();
/*
@@ -424,7 +359,7 @@
hwpend &= ~ibit;
- if (pcpl & ibit) {
+ if (imask & ibit) {
/*
* IRQ is masked; mark it as pending and check
* the next one. Note: the IRQ is already disabled.
@@ -438,25 +373,26 @@
iq = &intrq[irq];
iq->iq_ev.ev_count++;
uvmexp.intrs++;
- current_spl_level |= iq->iq_mask;
- oldirqstate = enable_interrupts(I32_bit);
- for (ih = TAILQ_FIRST(&iq->iq_list); ih != NULL;
- ih = TAILQ_NEXT(ih, ih_list)) {
+ TAILQ_FOREACH(ih, &iq->iq_list, ih_list) {
+ ci->ci_cpl = ih->ih_ipl;
+ oldirqstate = enable_interrupts(I32_bit);
(void) (*ih->ih_func)(ih->ih_arg ? ih->ih_arg : frame);
+ restore_interrupts(oldirqstate);
}
- restore_interrupts(oldirqstate);
- current_spl_level = pcpl;
+ ci->ci_cpl = ppl;
/* Re-enable this interrupt now that's it's cleared. */
intr_enabled |= ibit;
becc_set_intrmask();
}
- ci->ci_idepth--;
-
- if (becc_ipending & ~pcpl) {
- intr_enabled |= (becc_ipending & ~pcpl);
+ if (becc_ipending & ~imask) {
+ intr_enabled |= (becc_ipending & ~imask);
becc_set_intrmask();
}
+
+#ifdef __HAVE_FAST_SOFTINTS
+ cpu_dosoftints();
+#endif
}
Index: src/sys/arch/arm/xscale/becc_intr.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/xscale/becc_intr.h,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -r1.3 -r1.4
--- src/sys/arch/arm/xscale/becc_intr.h 6 Jan 2008 01:37:57 -0000 1.3
+++ src/sys/arch/arm/xscale/becc_intr.h 27 Apr 2008 18:58:45 -0000 1.4
@@ -1,4 +1,4 @@
-/* $NetBSD: becc_intr.h,v 1.3 2008/01/06 01:37:57 matt Exp $ */
+/* $NetBSD: becc_intr.h,v 1.4 2008/04/27 18:58:45 matt Exp $ */
/*
* Copyright (c) 2002 Wasabi Systems, Inc.
@@ -40,10 +40,12 @@
#include <arm/armreg.h>
#include <arm/cpufunc.h>
+#include <arm/cpu.h>
#include <arm/xscale/beccreg.h>
#include <arm/xscale/becc_csrvar.h>
+#ifdef __PROG32
static inline void __attribute__((__unused__))
becc_set_intrmask(void)
{
@@ -61,12 +63,10 @@
static inline int __attribute__((__unused__))
becc_splraise(int ipl)
{
- extern volatile uint32_t current_spl_level;
extern uint32_t becc_imask[];
- uint32_t old;
+ uint32_t old = curcpl();
- old = current_spl_level;
- current_spl_level |= becc_imask[ipl];
+ set_curcpl(old | becc_imask[ipl]);
return (old);
}
@@ -75,10 +75,9 @@
becc_splx(int new)
{
extern volatile uint32_t intr_enabled, becc_ipending;
- extern volatile uint32_t current_spl_level;
uint32_t oldirqstate, hwpend;
- current_spl_level = new;
+ set_curcpl(new);
/*
* If there are pending HW interrupts which are being
@@ -98,9 +97,8 @@
static inline int __attribute__((__unused__))
becc_spllower(int ipl)
{
- extern volatile uint32_t current_spl_level;
extern uint32_t becc_imask[];
- uint32_t old = current_spl_level;
+ uint32_t old = curcpl();
becc_splx(becc_imask[ipl]);
return (old);
@@ -115,6 +113,7 @@
becc_sipending |= (1 << si);
BECC_CSR_WRITE(BECC_ICSR, (1U << ICU_SOFT));
}
+#endif /* __PROG32 */
int becc_softint(void *arg);
#endif
Index: src/sys/arch/arm/xscale/i80200_irq.S
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/xscale/i80200_irq.S,v
retrieving revision 1.15
retrieving revision 1.16
diff -u -r1.15 -r1.16
--- src/sys/arch/arm/xscale/i80200_irq.S 6 Jan 2008 03:45:27 -0000
1.15
+++ src/sys/arch/arm/xscale/i80200_irq.S 27 Apr 2008 18:58:45 -0000
1.16
@@ -1,4 +1,4 @@
-/* $NetBSD: i80200_irq.S,v 1.15 2008/01/06 03:45:27 matt Exp $ */
+/* $NetBSD: i80200_irq.S,v 1.16 2008/04/27 18:58:45 matt Exp $ */
/*
* Copyright (c) 2002 Wasabi Systems, Inc.
@@ -54,9 +54,6 @@
.text
.align 0
-.Lcurrent_intr_depth:
- .word _C_LABEL(cpu_info_store) + CI_IDEPTH
-
.Lintr_dispatch:
.word _C_LABEL(i80200_extirq_dispatch)
@@ -81,24 +78,23 @@
* determine if we are in an IRQ. Instead, we will
* count each time the interrupt handler is nested.
*/
- ldr r0, .Lcurrent_intr_depth
- ldr r1, [r0]
+ ldr r1, [r4, #CI_INTR_DEPTH]
add r1, r1, #1
- str r1, [r0]
+ str r1, [r4, #CI_INTR_DEPTH]
/*
* Get the interrupt status into a callee-save register.
*/
- mrc p13, 0, r4, c4, c0, 0
+ mrc p13, 0, r5, c4, c0, 0
#if defined(PERFCTRS)
/*
* Check for PMU interrupts.
* If we have one, call the routine to handle it.
*/
- tst r4, #(INTSRC_PI)
+ tst r5, #(INTSRC_PI)
beq .Lpmc_intr_return
- mov r1, r4
+ mov r1, r5
mov r0, sp
mov lr, pc
ldr pc, .Lpmc_dispatch
@@ -116,7 +112,7 @@
* interrupts disabled, and will return with interrupts
* disabled.
*/
- tst r4, #(INTSRC_II)
+ tst r5, #(INTSRC_II)
beq .Lextirq_return /* no external IRQ pending */
ldr r1, .Lintr_dispatch
mov r0, sp
@@ -125,20 +121,12 @@
.Lextirq_return:
/* Decremement the nest count. */
- ldr r0, .Lcurrent_intr_depth
- ldr r1, [r0]
+ ldr r1, [r4, #CI_INTR_DEPTH]
sub r1, r1, #1
- str r1, [r0]
+ str r1, [r4, #CI_INTR_DEPTH]
LOCK_CAS_CHECK
DO_AST_AND_RESTORE_ALIGNMENT_FAULTS
PULLFRAMEFROMSVCANDEXIT
movs pc, lr /* Exit */
-
- .bss
- .align 0
-
- .global _C_LABEL(astpending)
-_C_LABEL(astpending):
- .word 0
Index: src/sys/arch/arm/xscale/i80312reg.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/xscale/i80312reg.h,v
retrieving revision 1.10
retrieving revision 1.11
diff -u -r1.10 -r1.11
--- src/sys/arch/arm/xscale/i80312reg.h 24 Jan 2002 01:21:44 -0000 1.10
+++ src/sys/arch/arm/xscale/i80312reg.h 28 Apr 2008 20:23:14 -0000 1.11
@@ -1,4 +1,4 @@
-/* $NetBSD: i80312reg.h,v 1.10 2002/01/24 01:21:44 thorpej Exp $ */
+/* $NetBSD: i80312reg.h,v 1.11 2008/04/28 20:23:14 martin Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -50,13 +50,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/xscale/i80321_aau.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/xscale/i80321_aau.c,v
retrieving revision 1.12
retrieving revision 1.13
diff -u -r1.12 -r1.13
--- src/sys/arch/arm/xscale/i80321_aau.c 5 Jan 2008 00:31:55 -0000
1.12
+++ src/sys/arch/arm/xscale/i80321_aau.c 27 Apr 2008 18:58:45 -0000
1.13
@@ -1,4 +1,4 @@
-/* $NetBSD: i80321_aau.c,v 1.12 2008/01/05 00:31:55 ad Exp $ */
+/* $NetBSD: i80321_aau.c,v 1.13 2008/04/27 18:58:45 matt Exp $ */
/*
* Copyright (c) 2002 Wasabi Systems, Inc.
@@ -40,7 +40,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: i80321_aau.c,v 1.12 2008/01/05 00:31:55 ad Exp $");
+__KERNEL_RCSID(0, "$NetBSD: i80321_aau.c,v 1.13 2008/04/27 18:58:45 matt Exp
$");
#include <sys/param.h>
#include <sys/pool.h>
@@ -69,79 +69,74 @@
};
static struct iopaau_function aau321_func_zero = {
- iopaau_func_zero_setup,
- NULL,
+ .af_setup = iopaau_func_zero_setup,
};
static struct iopaau_function aau321_func_fill8 = {
- iopaau_func_fill8_setup,
- NULL,
+ .af_setup = iopaau_func_fill8_setup,
};
static struct iopaau_function aau321_func_xor_1_4 = {
- iopaau_func_xor_setup,
- NULL,
+ .af_setup = iopaau_func_xor_setup,
};
static struct iopaau_function aau321_func_xor_5_8 = {
- iopaau_func_xor_setup,
- NULL,
+ .af_setup = iopaau_func_xor_setup,
};
static const struct dmover_algdesc aau321_algdescs[] = {
{
- DMOVER_FUNC_ZERO,
- &aau321_func_zero,
- 0
+ .dad_name = DMOVER_FUNC_ZERO,
+ .dad_data = &aau321_func_zero,
+ .dad_ninputs = 0
},
{
- DMOVER_FUNC_FILL8,
- &aau321_func_fill8,
- 0
+ .dad_name = DMOVER_FUNC_FILL8,
+ .dad_data = &aau321_func_fill8,
+ .dad_ninputs = 0
},
{
- DMOVER_FUNC_COPY,
- &aau321_func_xor_1_4,
- 1
+ .dad_name = DMOVER_FUNC_COPY,
+ .dad_data = &aau321_func_xor_1_4,
+ .dad_ninputs = 1
},
{
- DMOVER_FUNC_XOR2,
- &aau321_func_xor_1_4,
- 2
+ .dad_name = DMOVER_FUNC_XOR2,
+ .dad_data = &aau321_func_xor_1_4,
+ .dad_ninputs = 2
},
{
- DMOVER_FUNC_XOR3,
- &aau321_func_xor_1_4,
- 3
+ .dad_name = DMOVER_FUNC_XOR3,
+ .dad_data = &aau321_func_xor_1_4,
+ .dad_ninputs = 3
},
{
- DMOVER_FUNC_XOR4,
- &aau321_func_xor_1_4,
- 4
+ .dad_name = DMOVER_FUNC_XOR4,
+ .dad_data = &aau321_func_xor_1_4,
+ .dad_ninputs = 4
},
{
- DMOVER_FUNC_XOR5,
- &aau321_func_xor_5_8,
+ .dad_name = DMOVER_FUNC_XOR5,
+ .dad_data = &aau321_func_xor_5_8,
5
},
{
- DMOVER_FUNC_XOR6,
- &aau321_func_xor_5_8,
- 6
+ .dad_name = DMOVER_FUNC_XOR6,
+ .dad_data = &aau321_func_xor_5_8,
+ .dad_ninputs = 6
},
{
- DMOVER_FUNC_XOR7,
- &aau321_func_xor_5_8,
- 7
+ .dad_name = DMOVER_FUNC_XOR7,
+ .dad_data = &aau321_func_xor_5_8,
+ .dad_ninputs = 7
},
{
- DMOVER_FUNC_XOR8,
- &aau321_func_xor_5_8,
- 8
+ .dad_name = DMOVER_FUNC_XOR8,
+ .dad_data = &aau321_func_xor_5_8,
+ .dad_ninputs = 8
},
};
-#define AAU321_ALGDESC_COUNT \
- (sizeof(aau321_algdescs) / sizeof(aau321_algdescs[0]))
+#define AAU321_ALGDESC_COUNT __arraycount(aau321_algdescs)
static int
aau321_match(struct device *parent, struct cfdata *match, void *aux)
@@ -165,6 +160,14 @@
aprint_naive("\n");
aprint_normal("\n");
+ KASSERT(iopaau_desc_4_cache != NULL);
+ aau321_func_zero.af_desc_cache = iopaau_desc_4_cache;
+ aau321_func_fill8.af_desc_cache = iopaau_desc_4_cache;
+ aau321_func_xor_1_4.af_desc_cache = iopaau_desc_4_cache;
+
+ KASSERT(iopaau_desc_8_cache != NULL);
+ aau321_func_xor_5_8.af_desc_cache = iopaau_desc_8_cache;
+
sc->sc_st = ia->ia_st;
error = bus_space_subregion(sc->sc_st, ia->ia_sh,
ia->ia_offset, ia->ia_size, &sc->sc_sh);
Index: src/sys/arch/arm/xscale/i80321_icu.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/xscale/i80321_icu.c,v
retrieving revision 1.17
retrieving revision 1.18
diff -u -r1.17 -r1.18
--- src/sys/arch/arm/xscale/i80321_icu.c 6 Jan 2008 01:37:57 -0000
1.17
+++ src/sys/arch/arm/xscale/i80321_icu.c 27 Apr 2008 18:58:45 -0000
1.18
@@ -1,4 +1,4 @@
-/* $NetBSD: i80321_icu.c,v 1.17 2008/01/06 01:37:57 matt Exp $ */
+/* $NetBSD: i80321_icu.c,v 1.18 2008/04/27 18:58:45 matt Exp $ */
/*
* Copyright (c) 2001, 2002, 2006 Wasabi Systems, Inc.
@@ -36,7 +36,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: i80321_icu.c,v 1.17 2008/01/06 01:37:57 matt Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: i80321_icu.c,v 1.18 2008/04/27 18:58:45 matt Exp
$");
#ifndef EVBARM_SPL_NOINLINE
#define EVBARM_SPL_NOINLINE
@@ -66,9 +66,6 @@
/* Interrupts to mask at each level. */
int i80321_imask[NIPL];
-/* Current interrupt priority level. */
-volatile int current_spl_level;
-
/* Interrupts pending. */
volatile int i80321_ipending;
@@ -79,35 +76,9 @@
uint32_t intr_steer;
/*
- * Map a software interrupt queue index (to the unused bits in the
- * ICU registers -- XXX will need to revisit this if those bits are
- * ever used in future steppings).
- */
-#ifdef __HAVE_FAST_SOFTINTS
-static const uint32_t si_to_irqbit[4] = {
- ICU_INT_bit26, /* SI_SOFTCLOCK */
- ICU_INT_bit22, /* SI_SOFTBIO */
- ICU_INT_bit5, /* SI_SOFTNET */
- ICU_INT_bit4, /* SI_SOFTSERIAL */
-};
-
-#define SI_TO_IRQBIT(si) (1U << si_to_irqbit[(si)])
-
-/*
- * Map a software interrupt queue to an interrupt priority level.
- */
-static const int si_to_ipl[4] = {
- IPL_SOFTCLOCK, /* SI_SOFTCLOCK */
- IPL_SOFTBIO, /* SI_SOFTBIO */
- IPL_SOFTNET, /* SI_SOFTNET */
- IPL_SOFTSERIAL, /* SI_SOFTSERIAL */
-};
-#endif
-
-/*
* Interrupt bit names.
*/
-const char *i80321_irqnames[] = {
+const char * const i80321_irqnames[] = {
"DMA0 EOT",
"DMA0 EOC",
"DMA1 EOT",
@@ -223,17 +194,9 @@
* limited input buffer space/"real-time" requirements) a better
* chance at not dropping data.
*/
-#ifdef __HAVE_FAST_SOFTINTS
- i80321_imask[IPL_SOFTCLOCK] = SI_TO_IRQBIT(SI_SOFTCLOCK);
- i80321_imask[IPL_SOFTBIO] = SI_TO_IRQBIT(SI_SOFTBIO);
- i80321_imask[IPL_SOFTNET] = SI_TO_IRQBIT(SI_SOFTNET);
- i80321_imask[IPL_SOFTSERIAL] = SI_TO_IRQBIT(SI_SOFTSERIAL);
-#endif
- i80321_imask[IPL_SOFTBIO] |= i80321_imask[IPL_SOFTCLOCK];
- i80321_imask[IPL_SOFTNET] |= i80321_imask[IPL_SOFTBIO];
- i80321_imask[IPL_SOFTSERIAL] |= i80321_imask[IPL_SOFTNET];
- i80321_imask[IPL_VM] |= i80321_imask[IPL_SOFTSERIAL];
+ KASSERT(i80321_imask[IPL_VM] != 0);
+ i80321_imask[IPL_SCHED] |= i80321_imask[IPL_VM];
i80321_imask[IPL_HIGH] |= i80321_imask[IPL_SCHED];
/*
@@ -253,77 +216,23 @@
}
void
-i80321_do_pending(void)
-{
-#ifdef __HAVE_FAST_SOFTINTS
- static __cpu_simple_lock_t processing = __SIMPLELOCK_UNLOCKED;
- int new, oldirqstate;
-
- if (__cpu_simple_lock_try(&processing) == 0)
- return;
-
- new = current_spl_level;
-
- oldirqstate = disable_interrupts(I32_bit);
-
-#define DO_SOFTINT(si)
\
- if ((i80321_ipending & ~new) & SI_TO_IRQBIT(si)) { \
- i80321_ipending &= ~SI_TO_IRQBIT(si); \
- current_spl_level |= i80321_imask[si_to_ipl[(si)]]; \
- restore_interrupts(oldirqstate); \
- softintr_dispatch(si); \
- oldirqstate = disable_interrupts(I32_bit); \
- current_spl_level = new; \
- }
-
- DO_SOFTINT(SI_SOFTSERIAL);
- DO_SOFTINT(SI_SOFTNET);
- DO_SOFTINT(SI_SOFTCLOCK);
- DO_SOFTINT(SI_SOFT);
-
- __cpu_simple_unlock(&processing);
-
- restore_interrupts(oldirqstate);
-#endif /* __HAVE_FAST_SOFTINTRS */
-}
-
-void
splx(int new)
{
-
i80321_splx(new);
}
int
_spllower(int ipl)
{
-
return (i80321_spllower(ipl));
}
int
_splraise(int ipl)
{
-
return (i80321_splraise(ipl));
}
-#if __HAVE_FAST_SOFTINTRS
-void
-_setsoftintr(int si)
-{
- int oldirqstate;
-
- oldirqstate = disable_interrupts(I32_bit);
- i80321_ipending |= SI_TO_IRQBIT(si);
- restore_interrupts(oldirqstate);
-
- /* Process unmasked pending soft interrupts. */
- if ((i80321_ipending & INT_SWMASK) & ~current_spl_level)
- i80321_do_pending();
-}
-#endif /* __HAVE_FAST_SOFTINTRS */
-
/*
* i80321_icu_init:
*
@@ -456,15 +365,14 @@
{
struct intrq *iq;
struct intrhand *ih;
- int oldirqstate, pcpl, irq, ibit, hwpend;
- struct cpu_info *ci;
+ int oldirqstate, irq, ibit, hwpend;
#ifdef I80321_HPI_ENABLED
int oldpending;
#endif
+ struct cpu_info * const ci = curcpu();
+ const int ppl = ci->ci_cpl;
+ const uint32_t imask = i80321_imask[ppl];
- ci = curcpu();
- ci->ci_idepth++;
- pcpl = current_spl_level;
hwpend = i80321_iintsrc_read();
/*
@@ -490,7 +398,7 @@
hwpend &= ~ibit;
- if (pcpl & ibit) {
+ if (imask & ibit) {
/*
* IRQ is masked; mark it as pending and check
* the next one. Note: the IRQ is already disabled.
@@ -520,24 +428,20 @@
iq = &intrq[irq];
iq->iq_ev.ev_count++;
uvmexp.intrs++;
- current_spl_level |= iq->iq_mask;
#ifdef I80321_HPI_ENABLED
/*
* Re-enable interrupts iff an HPI is not pending
*/
- if (__predict_true((oldpending & INT_HPIMASK) == 0))
-#endif
- oldirqstate = enable_interrupts(I32_bit);
- for (ih = TAILQ_FIRST(&iq->iq_list); ih != NULL;
- ih = TAILQ_NEXT(ih, ih_list)) {
- (void) (*ih->ih_func)(ih->ih_arg ? ih->ih_arg : frame);
- }
-#ifdef I80321_HPI_ENABLED
- if (__predict_true((oldpending & INT_HPIMASK) == 0))
+ if (__predict_true((oldpending & INT_HPIMASK) == 0)) {
#endif
- restore_interrupts(oldirqstate);
+ TAILQ_FOREACH (ih, &iq->iq_list, ih_list) {
+ ci->ci_cpl = ih->ih_ipl;
+ oldirqstate = enable_interrupts(I32_bit);
+ (void) (*ih->ih_func)(ih->ih_arg ? ih->ih_arg :
frame);
+ restore_interrupts(oldirqstate);
+ }
#ifdef I80321_HPI_ENABLED
- else if (irq == ICU_INT_HPI) {
+ } else if (irq == ICU_INT_HPI) {
/*
* We've just handled the HPI. Make sure IRQs
* are enabled in the interrupt frame.
@@ -547,7 +451,7 @@
frame->cf_if.if_spsr &= ~I32_bit;
}
#endif
- current_spl_level = pcpl;
+ ci->ci_cpl = ppl;
/* Re-enable this interrupt now that's it's cleared. */
intr_enabled |= ibit;
@@ -557,22 +461,10 @@
* Don't forget to include interrupts which may have
* arrived in the meantime.
*/
- hwpend |= ((i80321_ipending & ICU_INT_HWMASK) & ~pcpl);
+ hwpend |= ((i80321_ipending & ICU_INT_HWMASK) & ~imask);
}
- ci->ci_idepth--;
- /* Check for pendings soft intrs. */
- if ((i80321_ipending & INT_SWMASK) & ~current_spl_level) {
-#ifdef I80321_HPI_ENABLED
- /* XXX: This is only necessary if HPI is < IPL_SOFT* */
- if (__predict_true((i80321_ipending & INT_HPIMASK) == 0))
-#endif
- oldirqstate = enable_interrupts(I32_bit);
- i80321_do_pending();
-#ifdef I80321_HPI_ENABLED
- /* XXX: This is only necessary if HPI is < IPL_NET* */
- if (__predict_true((i80321_ipending & INT_HPIMASK) == 0))
+#ifdef __HAVE_FAST_SOFTINTS
+ cpu_dosoftints();
#endif
- restore_interrupts(oldirqstate);
- }
}
Index: src/sys/arch/arm/xscale/i80321_intr.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/xscale/i80321_intr.h,v
retrieving revision 1.9
retrieving revision 1.10
diff -u -r1.9 -r1.10
--- src/sys/arch/arm/xscale/i80321_intr.h 8 Nov 2006 23:45:41 -0000
1.9
+++ src/sys/arch/arm/xscale/i80321_intr.h 27 Apr 2008 18:58:45 -0000
1.10
@@ -1,4 +1,4 @@
-/* $NetBSD: i80321_intr.h,v 1.9 2006/11/08 23:45:41 scw Exp $ */
+/* $NetBSD: i80321_intr.h,v 1.10 2008/04/27 18:58:45 matt Exp $ */
/*
* Copyright (c) 2001, 2002, 2006 Wasabi Systems, Inc.
@@ -36,6 +36,7 @@
*/
#ifndef _I80321_INTR_H_
+#ifndef _NO_INTR_H_
#define _I80321_INTR_H_
#define ARM_IRQ_HANDLER _C_LABEL(i80321_intr_dispatch)
@@ -44,11 +45,11 @@
#include <arm/armreg.h>
#include <arm/cpufunc.h>
+#include <arm/cpu.h>
#include <arm/xscale/i80321reg.h>
-void i80321_do_pending(void);
-
+#ifdef __PROG32
static inline void __attribute__((__unused__))
i80321_set_intrmask(void)
{
@@ -59,27 +60,22 @@
: "r" (intr_enabled & ICU_INT_HWMASK));
}
-#define INT_SWMASK \
- ((1U << ICU_INT_bit26) | (1U << ICU_INT_bit22) | \
- (1U << ICU_INT_bit5) | (1U << ICU_INT_bit4))
-
#define INT_HPIMASK (1u << ICU_INT_HPI)
+extern volatile uint32_t intr_enabled;
+extern volatile int i80321_ipending;
+extern int i80321_imask[];
static inline void __attribute__((__unused__))
i80321_splx(int new)
{
- extern volatile uint32_t intr_enabled;
- extern volatile int current_spl_level;
- extern volatile int i80321_ipending;
- extern void i80321_do_pending(void);
int oldirqstate, hwpend;
/* Don't let the compiler re-order this code with preceding code */
__insn_barrier();
- current_spl_level = new;
+ set_curcpl(new);
- hwpend = (i80321_ipending & ICU_INT_HWMASK) & ~new;
+ hwpend = (i80321_ipending & ICU_INT_HWMASK) & ~i80321_imask[new];
if (hwpend != 0) {
oldirqstate = disable_interrupts(I32_bit);
intr_enabled |= hwpend;
@@ -91,19 +87,16 @@
restore_interrupts(oldirqstate);
}
- if ((i80321_ipending & INT_SWMASK) & ~new)
- i80321_do_pending();
+#ifdef __HAVE_FAST_SOFTINTS
+ cpu_dosoftints();
+#endif
}
static inline int __attribute__((__unused__))
i80321_splraise(int ipl)
{
- extern volatile int current_spl_level;
- extern int i80321_imask[];
- int old;
-
- old = current_spl_level;
- current_spl_level |= i80321_imask[ipl];
+ int old = curcpl();
+ set_curcpl(ipl);
/* Don't let the compiler re-order this code with subsequent code */
__insn_barrier();
@@ -114,14 +107,13 @@
static inline int __attribute__((__unused__))
i80321_spllower(int ipl)
{
- extern volatile int current_spl_level;
- extern int i80321_imask[];
- int old = current_spl_level;
-
- i80321_splx(i80321_imask[ipl]);
+ int old = curcpl();
+ i80321_splx(ipl);
return(old);
}
+#endif /* __PROG32 */
+
#if !defined(EVBARM_SPL_NOINLINE)
#define splx(new) i80321_splx(new)
@@ -140,4 +132,5 @@
#endif /* _LOCORE */
+#endif /* _NO_INTR_H_ */
#endif /* _I80321_INTR_H_ */
Index: src/sys/arch/arm/xscale/i80321_timer.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/xscale/i80321_timer.c,v
retrieving revision 1.18
retrieving revision 1.19
diff -u -r1.18 -r1.19
--- src/sys/arch/arm/xscale/i80321_timer.c 20 Jan 2008 16:28:24 -0000
1.18
+++ src/sys/arch/arm/xscale/i80321_timer.c 27 Apr 2008 18:58:45 -0000
1.19
@@ -1,4 +1,4 @@
-/* $NetBSD: i80321_timer.c,v 1.18 2008/01/20 16:28:24 joerg Exp $ */
+/* $NetBSD: i80321_timer.c,v 1.19 2008/04/27 18:58:45 matt Exp $ */
/*
* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
@@ -40,7 +40,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: i80321_timer.c,v 1.18 2008/01/20 16:28:24 joerg
Exp $");
+__KERNEL_RCSID(0, "$NetBSD: i80321_timer.c,v 1.19 2008/04/27 18:58:45 matt Exp
$");
#include "opt_perfctrs.h"
#include "opt_i80321.h"
Index: src/sys/arch/arm/xscale/i80321var.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/xscale/i80321var.h,v
retrieving revision 1.11
retrieving revision 1.12
diff -u -r1.11 -r1.12
--- src/sys/arch/arm/xscale/i80321var.h 10 Apr 2006 03:36:03 -0000 1.11
+++ src/sys/arch/arm/xscale/i80321var.h 27 Apr 2008 18:58:45 -0000 1.12
@@ -1,4 +1,4 @@
-/* $NetBSD: i80321var.h,v 1.11 2006/04/10 03:36:03 simonb Exp $ */
+/* $NetBSD: i80321var.h,v 1.12 2008/04/27 18:58:45 matt Exp $ */
/*
* Copyright (c) 2002, 2003 Wasabi Systems, Inc.
@@ -164,7 +164,7 @@
extern struct bus_space i80321_bs_tag;
extern struct i80321_softc *i80321_softc;
-extern const char *i80321_irqnames[];
+extern const char * const i80321_irqnames[];
extern void (*i80321_hardclock_hook)(void);
Index: src/sys/arch/arm/xscale/iopaauvar.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/xscale/iopaauvar.h,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -r1.6 -r1.7
--- src/sys/arch/arm/xscale/iopaauvar.h 17 Nov 2007 15:28:37 -0000 1.6
+++ src/sys/arch/arm/xscale/iopaauvar.h 27 Apr 2008 18:58:45 -0000 1.7
@@ -1,4 +1,4 @@
-/* $NetBSD: iopaauvar.h,v 1.6 2007/11/17 15:28:37 ad Exp $ */
+/* $NetBSD: iopaauvar.h,v 1.7 2008/04/27 18:58:45 matt Exp $ */
/*
* Copyright (c) 2002 Wasabi Systems, Inc.
@@ -90,6 +90,6 @@
int iopaau_func_xor_setup(struct iopaau_softc *,
struct dmover_request *);
-void iopaau_desc_free(struct pool_cache *, void *);
+void iopaau_desc_free(pool_cache_t, void *);
#endif /* _XSCALE_IOPAAUVAR_H_ */
Index: src/sys/arch/arm/xscale/ixp425_if_npe.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/xscale/ixp425_if_npe.c,v
retrieving revision 1.8
retrieving revision 1.9
diff -u -r1.8 -r1.9
--- src/sys/arch/arm/xscale/ixp425_if_npe.c 26 Jan 2008 10:46:39 -0000
1.8
+++ src/sys/arch/arm/xscale/ixp425_if_npe.c 27 Apr 2008 18:58:45 -0000
1.9
@@ -1,4 +1,4 @@
-/* $NetBSD: ixp425_if_npe.c,v 1.8 2008/01/26 10:46:39 scw Exp $ */
+/* $NetBSD: ixp425_if_npe.c,v 1.9 2008/04/27 18:58:45 matt Exp $ */
/*-
* Copyright (c) 2006 Sam Leffler. All rights reserved.
@@ -28,7 +28,7 @@
#if 0
__FBSDID("$FreeBSD: src/sys/arm/xscale/ixp425/if_npe.c,v 1.1 2006/11/19
23:55:23 sam Exp $");
#endif
-__KERNEL_RCSID(0, "$NetBSD: ixp425_if_npe.c,v 1.8 2008/01/26 10:46:39 scw Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: ixp425_if_npe.c,v 1.9 2008/04/27 18:58:45 matt Exp
$");
/*
* Intel XScale NPE Ethernet driver.
Index: src/sys/arch/arm/xscale/ixp425_intr.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/xscale/ixp425_intr.c,v
retrieving revision 1.18
retrieving revision 1.19
diff -u -r1.18 -r1.19
--- src/sys/arch/arm/xscale/ixp425_intr.c 8 Jan 2008 02:07:52 -0000
1.18
+++ src/sys/arch/arm/xscale/ixp425_intr.c 27 Apr 2008 18:58:45 -0000
1.19
@@ -1,4 +1,4 @@
-/* $NetBSD: ixp425_intr.c,v 1.18 2008/01/08 02:07:52 matt Exp $ */
+/* $NetBSD: ixp425_intr.c,v 1.19 2008/04/27 18:58:45 matt Exp $ */
/*
* Copyright (c) 2003
@@ -68,7 +68,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ixp425_intr.c,v 1.18 2008/01/08 02:07:52 matt Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: ixp425_intr.c,v 1.19 2008/04/27 18:58:45 matt Exp
$");
#ifndef EVBARM_SPL_NOINLINE
#define EVBARM_SPL_NOINLINE
@@ -98,9 +98,6 @@
/* Interrupts to mask at each level. */
int ixp425_imask[NIPL];
-/* Current interrupt priority level. */
-volatile int current_spl_level;
-
/* Interrupts pending. */
volatile int ixp425_ipending;
@@ -265,78 +262,24 @@
}
}
-#ifdef __HAVE_FAST_SOFTINTS
-void
-ixp425_do_pending(void)
-{
- static __cpu_simple_lock_t processing = __SIMPLELOCK_UNLOCKED;
- int new, oldirqstate;
-
- if (__cpu_simple_lock_try(&processing) == 0)
- return;
-
- new = current_spl_level;
-
- oldirqstate = disable_interrupts(I32_bit);
-
-#define DO_SOFTINT(si)
\
- if ((ixp425_ipending & ~new) & SI_TO_IRQBIT(si)) { \
- ixp425_ipending &= ~SI_TO_IRQBIT(si); \
- current_spl_level |= ixp425_imask[si_to_ipl[(si)]]; \
- restore_interrupts(oldirqstate); \
- softintr_dispatch(si); \
- oldirqstate = disable_interrupts(I32_bit); \
- current_spl_level = new; \
- }
-
- DO_SOFTINT(SI_SOFTSERIAL);
- DO_SOFTINT(SI_SOFTNET);
- DO_SOFTINT(SI_SOFTCLOCK);
- DO_SOFTINT(SI_SOFT);
-
- __cpu_simple_unlock(&processing);
-
- restore_interrupts(oldirqstate);
-}
-#endif
-
void
splx(int new)
{
-
ixp425_splx(new);
}
int
_spllower(int ipl)
{
-
return (ixp425_spllower(ipl));
}
int
_splraise(int ipl)
{
-
return (ixp425_splraise(ipl));
}
-#ifdef __HAVE_FAST_SOFTINTS
-void
-_setsoftintr(int si)
-{
- int oldirqstate;
-
- oldirqstate = disable_interrupts(I32_bit);
- ixp425_ipending |= SI_TO_IRQBIT(si);
- restore_interrupts(oldirqstate);
-
- /* Process unmasked pending soft interrupts. */
- if ((ixp425_ipending & INT_SWMASK) & ~current_spl_level)
- ixp425_do_pending();
-}
-#endif /* __HAVE_FAST_SOFTINTS */
-
/*
* ixp425_icu_init:
*
@@ -442,12 +385,11 @@
{
struct intrq *iq;
struct intrhand *ih;
- int oldirqstate, pcpl, irq, ibit, hwpend;
- struct cpu_info *ci;
+ int oldirqstate, irq, ibit, hwpend;
+ struct cpu_info * const ci = curcpu();
+ const int ppl = ci->ci_cpl;
+ const uint32_t imask = ixp425_imask[ppl];
- ci = curcpu();
- ci->ci_idepth++;
- pcpl = current_spl_level;
hwpend = ixp425_irq_read();
/*
@@ -463,7 +405,7 @@
hwpend &= ~ibit;
- if (pcpl & ibit) {
+ if (imask & ibit) {
/*
* IRQ is masked; mark it as pending and check
* the next one. Note: the IRQ is already disabled.
@@ -477,7 +419,6 @@
iq = &intrq[irq];
iq->iq_ev.ev_count++;
uvmexp.intrs++;
- current_spl_level |= iq->iq_mask;
/* Clear down non-level triggered GPIO interrupts now */
if ((ibit & IXP425_INT_GPIOMASK) && iq->iq_ist != IST_LEVEL) {
@@ -485,12 +426,12 @@
ixp425_irq2gpio_bit(irq);
}
- oldirqstate = enable_interrupts(I32_bit);
- for (ih = TAILQ_FIRST(&iq->iq_list); ih != NULL;
- ih = TAILQ_NEXT(ih, ih_list)) {
+ TAILQ_FOREACH(ih, &iq->iq_list, ih_list) {
+ ci->ci_cpl = ih->ih_ipl;
+ oldirqstate = enable_interrupts(I32_bit);
(void) (*ih->ih_func)(ih->ih_arg ? ih->ih_arg : frame);
+ restore_interrupts(oldirqstate);
}
- restore_interrupts(oldirqstate);
/* Clear down level triggered GPIO interrupts now */
if ((ibit & IXP425_INT_GPIOMASK) && iq->iq_ist == IST_LEVEL) {
@@ -498,7 +439,7 @@
ixp425_irq2gpio_bit(irq);
}
- current_spl_level = pcpl;
+ ci->ci_cpl = ppl;
/* Re-enable this interrupt now that's it's cleared. */
intr_enabled |= ibit;
@@ -508,16 +449,10 @@
* Don't forget to include interrupts which may have
* arrived in the meantime.
*/
- hwpend |= ((ixp425_ipending & IXP425_INT_HWMASK) & ~pcpl);
+ hwpend |= ((ixp425_ipending & IXP425_INT_HWMASK) & ~imask);
}
- ci->ci_idepth--;
#ifdef __HAVE_FAST_SOFTINTS
- /* Check for pendings soft intrs. */
- if ((ixp425_ipending & INT_SWMASK) & ~current_spl_level) {
- oldirqstate = enable_interrupts(I32_bit);
- ixp425_do_pending();
- restore_interrupts(oldirqstate);
- }
+ cpu_dosoftints();
#endif
}
Index: src/sys/arch/arm/xscale/ixp425_intr.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/xscale/ixp425_intr.h,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -r1.7 -r1.8
--- src/sys/arch/arm/xscale/ixp425_intr.h 8 Jan 2008 02:07:53 -0000
1.7
+++ src/sys/arch/arm/xscale/ixp425_intr.h 27 Apr 2008 18:58:45 -0000
1.8
@@ -1,4 +1,4 @@
-/* $NetBSD: ixp425_intr.h,v 1.7 2008/01/08 02:07:53 matt Exp $ */
+/* $NetBSD: ixp425_intr.h,v 1.8 2008/04/27 18:58:45 matt Exp $ */
/*
* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
@@ -57,29 +57,20 @@
IXPREG(IXP425_INT_ENABLE) = intr_enabled & IXP425_INT_HWMASK;
}
-#ifdef __HAVE_FAST_SOFTINTS
-void ixp425_do_pending(void);
-
-#define INT_SWMASK \
- ((1U << IXP425_INT_bit31) | (1U << IXP425_INT_bit30) | \
- (1U << IXP425_INT_bit14) | (1U << IXP425_INT_bit11))
-#endif
-
static inline void __attribute__((__unused__))
-ixp425_splx(int new)
+ixp425_splx(int ipl)
{
+ extern int ixp425_imask[];
extern volatile uint32_t intr_enabled;
- extern volatile int current_spl_level;
extern volatile int ixp425_ipending;
- extern void ixp425_do_pending(void);
int oldirqstate, hwpend;
/* Don't let the compiler re-order this code with preceding code */
__insn_barrier();
- current_spl_level = new;
+ set_curcpl(ipl);
- hwpend = (ixp425_ipending & IXP425_INT_HWMASK) & ~new;
+ hwpend = (ixp425_ipending & IXP425_INT_HWMASK) & ~ixp425_imask[ipl];
if (hwpend != 0) {
oldirqstate = disable_interrupts(I32_bit);
intr_enabled |= hwpend;
@@ -88,20 +79,15 @@
}
#ifdef __HAVE_FAST_SOFTINTS
- if ((ixp425_ipending & INT_SWMASK) & ~new)
- ixp425_do_pending();
+ cpu_dosoftints();
#endif
}
static inline int __attribute__((__unused__))
ixp425_splraise(int ipl)
{
- extern volatile int current_spl_level;
- extern int ixp425_imask[];
- int old;
-
- old = current_spl_level;
- current_spl_level |= ixp425_imask[ipl];
+ int old = curcpl();
+ set_curcpl(ipl);
/* Don't let the compiler re-order this code with subsequent code */
__insn_barrier();
@@ -112,11 +98,8 @@
static inline int __attribute__((__unused__))
ixp425_spllower(int ipl)
{
- extern volatile int current_spl_level;
- extern int ixp425_imask[];
- int old = current_spl_level;
-
- ixp425_splx(ixp425_imask[ipl]);
+ int old = curcpl();
+ ixp425_splx(ipl);
return(old);
}
@@ -125,18 +108,12 @@
#define splx(new) ixp425_splx(new)
#define _spllower(ipl) ixp425_spllower(ipl)
#define _splraise(ipl) ixp425_splraise(ipl)
-#ifdef __HAVE_FAST_SOFTINTS
-void _setsoftintr(int);
-#endif
#else
int _splraise(int);
int _spllower(int);
void splx(int);
-#ifdef __HAVE_FAST_SOFTINTS
-void _setsoftintr(int);
-#endif
#endif /* ! EVBARM_SPL_NOINLINE */
Index: src/sys/arch/arm/xscale/ixp425_ixme.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/xscale/ixp425_ixme.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- src/sys/arch/arm/xscale/ixp425_ixme.c 10 Dec 2006 10:01:49 -0000
1.1
+++ src/sys/arch/arm/xscale/ixp425_ixme.c 28 Apr 2008 20:23:14 -0000
1.2
@@ -1,4 +1,4 @@
-/* $NetBSD: ixp425_ixme.c,v 1.1 2006/12/10 10:01:49 scw Exp $ */
+/* $NetBSD: ixp425_ixme.c,v 1.2 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 2006 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -37,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ixp425_ixme.c,v 1.1 2006/12/10 10:01:49 scw Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: ixp425_ixme.c,v 1.2 2008/04/28 20:23:14 martin Exp
$");
#include <sys/param.h>
#include <sys/systm.h>
Index: src/sys/arch/arm/xscale/ixp425_ixmevar.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/xscale/ixp425_ixmevar.h,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- src/sys/arch/arm/xscale/ixp425_ixmevar.h 10 Dec 2006 10:01:49 -0000
1.1
+++ src/sys/arch/arm/xscale/ixp425_ixmevar.h 28 Apr 2008 20:23:14 -0000
1.2
@@ -1,4 +1,4 @@
-/* $NetBSD: ixp425_ixmevar.h,v 1.1 2006/12/10 10:01:49 scw Exp $ */
+/* $NetBSD: ixp425_ixmevar.h,v 1.2 2008/04/28 20:23:14 martin Exp $
*/
/*-
* Copyright (c) 2006 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/arm/xscale/ixp425_wdog.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/xscale/ixp425_wdog.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- src/sys/arch/arm/xscale/ixp425_wdog.c 10 Dec 2006 10:03:22 -0000
1.1
+++ src/sys/arch/arm/xscale/ixp425_wdog.c 28 Apr 2008 20:23:14 -0000
1.2
@@ -1,4 +1,4 @@
-/* $NetBSD: ixp425_wdog.c,v 1.1 2006/12/10 10:03:22 scw Exp $ */
+/* $NetBSD: ixp425_wdog.c,v 1.2 2008/04/28 20:23:14 martin Exp $ */
/*-
* Copyright (c) 2006 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -39,7 +32,7 @@
#include "opt_ddb.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ixp425_wdog.c,v 1.1 2006/12/10 10:03:22 scw Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: ixp425_wdog.c,v 1.2 2008/04/28 20:23:14 martin Exp
$");
#include <sys/systm.h>
#include <sys/param.h>
Index: src/sys/arch/arm/xscale/pxa2x0.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/xscale/pxa2x0.c,v
retrieving revision 1.16
retrieving revision 1.17
diff -u -r1.16 -r1.17
--- src/sys/arch/arm/xscale/pxa2x0.c 21 Feb 2007 22:59:39 -0000 1.16
+++ src/sys/arch/arm/xscale/pxa2x0.c 3 May 2008 23:06:06 -0000 1.17
@@ -1,4 +1,4 @@
-/* $NetBSD: pxa2x0.c,v 1.16 2007/02/21 22:59:39 thorpej Exp $ */
+/* $NetBSD: pxa2x0.c,v 1.17 2008/05/03 23:06:06 martin Exp $ */
/*
* Copyright (c) 2002, 2005 Genetec Corporation. All rights reserved.
@@ -51,13 +51,18 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*/
/*-
* Copyright (c) 1999
@@ -94,7 +99,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pxa2x0.c,v 1.16 2007/02/21 22:59:39 thorpej Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: pxa2x0.c,v 1.17 2008/05/03 23:06:06 martin Exp $");
#include "pxaintc.h"
#include "pxagpio.h"
Index: src/sys/arch/arm/xscale/pxa2x0_intr.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/xscale/pxa2x0_intr.c,v
retrieving revision 1.13
retrieving revision 1.14
diff -u -r1.13 -r1.14
--- src/sys/arch/arm/xscale/pxa2x0_intr.c 11 Dec 2007 17:12:27 -0000
1.13
+++ src/sys/arch/arm/xscale/pxa2x0_intr.c 27 Apr 2008 18:58:45 -0000
1.14
@@ -1,4 +1,4 @@
-/* $NetBSD: pxa2x0_intr.c,v 1.13 2007/12/11 17:12:27 ad Exp $ */
+/* $NetBSD: pxa2x0_intr.c,v 1.14 2008/04/27 18:58:45 matt Exp $ */
/*
* Copyright (c) 2002 Genetec Corporation. All rights reserved.
@@ -39,7 +39,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pxa2x0_intr.c,v 1.13 2007/12/11 17:12:27 ad Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: pxa2x0_intr.c,v 1.14 2008/04/27 18:58:45 matt Exp
$");
#include <sys/param.h>
#include <sys/systm.h>
@@ -91,7 +91,6 @@
} handler[ICU_LEN];
volatile int softint_pending;
-volatile int current_spl_level;
volatile int intr_mask;
/* interrupt masks for each level */
int pxa2x0_imask[NIPL];
@@ -150,21 +149,10 @@
__raise(int ipl)
{
- if (current_spl_level < ipl)
+ if (curcpu()->ci_cpl < ipl)
pxa2x0_setipl(ipl);
}
-
-/*
- * Map a software interrupt queue to an interrupt priority level.
- */
-static const int si_to_ipl[SI_NQUEUES] = {
- IPL_SOFTCLOCK, /* SI_SOFTCLOCK */
- IPL_SOFTBIO, /* SI_SOFTBIO */
- IPL_SOFTNET, /* SI_SOFTNET */
- IPL_SOFTSERIAL, /* SI_SOFTSERIAL */
-};
-
/*
* called from irq_entry.
*/
@@ -175,11 +163,8 @@
uint32_t irqbits;
int irqno;
int saved_spl_level;
- struct cpu_info *ci;
- ci = curcpu();
- ci->ci_idepth++;
- saved_spl_level = current_spl_level;
+ saved_spl_level = curcpu()->ci_cpl;
/* get pending IRQs */
irqbits = read_icu(SAIPIC_IP);
@@ -213,10 +198,9 @@
/* restore spl to that was when this interrupt happen */
pxa2x0_setipl(saved_spl_level);
- ci->ci_idepth--;
-
- if(softint_pending & intr_mask)
- pxa2x0_do_pending();
+#ifdef __HAVE_FAST_SOFTINTS
+ cpu_dosoftints();
+#endif
}
static int
@@ -266,7 +250,7 @@
pxa2x0_imask[IPL_SCHED] &= pxa2x0_imask[IPL_VM];
pxa2x0_imask[IPL_HIGH] &= pxa2x0_imask[IPL_SCHED];
- write_icu(SAIPIC_MR, pxa2x0_imask[current_spl_level]);
+ write_icu(SAIPIC_MR, pxa2x0_imask[curcpu()->ci_cpl]);
restore_interrupts(psw);
}
@@ -282,19 +266,14 @@
* IPL_NONE has soft interrupts enabled only, at least until
* hardware handlers are installed.
*/
- pxa2x0_imask[IPL_NONE] =
- SI_TO_IRQBIT(SI_SOFTCLOCK) |
- SI_TO_IRQBIT(SI_SOFTBIO) |
- SI_TO_IRQBIT(SI_SOFTNET) |
- SI_TO_IRQBIT(SI_SOFTSERIAL);
-
+ pxa2x0_imask[IPL_NONE] = ~0;
/*
* Initialize the soft interrupt masks to block themselves.
*/
- pxa2x0_imask[IPL_SOFTCLOCK] = ~SI_TO_IRQBIT(SI_SOFTCLOCK);
- pxa2x0_imask[IPL_SOFTBIO] = ~SI_TO_IRQBIT(SI_SOFTBIO);
- pxa2x0_imask[IPL_SOFTNET] = ~SI_TO_IRQBIT(SI_SOFTNET);
- pxa2x0_imask[IPL_SOFTSERIAL] = ~SI_TO_IRQBIT(SI_SOFTSERIAL);
+ pxa2x0_imask[IPL_SOFTCLOCK] = ~0;
+ pxa2x0_imask[IPL_SOFTBIO] = ~0;
+ pxa2x0_imask[IPL_SOFTNET] = ~0;
+ pxa2x0_imask[IPL_SOFTSERIAL] = ~0;
pxa2x0_imask[IPL_SOFTCLOCK] &= pxa2x0_imask[IPL_NONE];
pxa2x0_imask[IPL_SOFTBIO] &= pxa2x0_imask[IPL_SOFTCLOCK];
@@ -302,60 +281,10 @@
pxa2x0_imask[IPL_SOFTSERIAL] &= pxa2x0_imask[IPL_SOFTNET];
}
-void
-pxa2x0_do_pending(void)
-{
-#ifdef __HAVE_FAST_SOFTINTS
- static __cpu_simple_lock_t processing = __SIMPLELOCK_UNLOCKED;
- int oldirqstate, spl_save;
-
- if (__cpu_simple_lock_try(&processing) == 0)
- return;
-
- spl_save = current_spl_level;
-
- oldirqstate = disable_interrupts(I32_bit);
-
-#if 1
-#define DO_SOFTINT(si,ipl)
\
- if ((softint_pending & intr_mask) & SI_TO_IRQBIT(si)) { \
- softint_pending &= ~SI_TO_IRQBIT(si); \
- __raise(ipl); \
- restore_interrupts(oldirqstate); \
- softintr_dispatch(si); \
- oldirqstate = disable_interrupts(I32_bit); \
- pxa2x0_setipl(spl_save); \
- }
-
- do {
- DO_SOFTINT(SI_SOFTSERIAL,IPL_SOFTSERIAL);
- DO_SOFTINT(SI_SOFTNET, IPL_SOFTNET);
- DO_SOFTINT(SI_SOFTCLOCK, IPL_SOFTCLOCK);
- DO_SOFTINT(SI_SOFT, IPL_SOFT);
- } while( softint_pending & intr_mask );
-#else
- while( (si = find_first_bit(softint_pending & intr_mask)) >= 0 ){
- softint_pending &= ~SI_TO_IRQBIT(si);
- __raise(si_to_ipl(si));
- restore_interrupts(oldirqstate);
- softintr_dispatch(si);
- oldirqstate = disable_interrupts(I32_bit);
- pxa2x0_setipl(spl_save);
- }
-#endif
-
- __cpu_simple_unlock(&processing);
-
- restore_interrupts(oldirqstate);
-#endif
-}
-
-
#undef splx
void
splx(int ipl)
{
-
pxa2x0_splx(ipl);
}
@@ -363,7 +292,6 @@
int
_splraise(int ipl)
{
-
return pxa2x0_splraise(ipl);
}
@@ -371,18 +299,9 @@
int
_spllower(int ipl)
{
-
return pxa2x0_spllower(ipl);
}
-#undef _setsoftintr
-void
-_setsoftintr(int si)
-{
-
- return pxa2x0_setsoftintr(si);
-}
-
void *
pxa2x0_intr_establish(int irqno, int level,
int (*func)(void *), void *cookie)
@@ -400,7 +319,7 @@
extirq_level[irqno] = level;
pxa2x0_update_intr_masks(irqno, level);
- intr_mask = pxa2x0_imask[current_spl_level];
+ intr_mask = pxa2x0_imask[curcpu()->ci_cpl];
restore_interrupts(psw);
Index: src/sys/arch/arm/xscale/pxa2x0_intr.h
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/xscale/pxa2x0_intr.h,v
retrieving revision 1.10
retrieving revision 1.11
diff -u -r1.10 -r1.11
--- src/sys/arch/arm/xscale/pxa2x0_intr.h 28 Feb 2007 23:26:10 -0000
1.10
+++ src/sys/arch/arm/xscale/pxa2x0_intr.h 27 Apr 2008 18:58:45 -0000
1.11
@@ -1,4 +1,4 @@
-/* $NetBSD: pxa2x0_intr.h,v 1.10 2007/02/28 23:26:10 bjh21 Exp $ */
+/* $NetBSD: pxa2x0_intr.h,v 1.11 2008/04/27 18:58:45 matt Exp $ */
/* Derived from i80321_intr.h */
@@ -49,7 +49,6 @@
#include <arm/cpufunc.h>
#include <machine/atomic.h>
#include <machine/intr.h>
-#include <arm/softintr.h>
#include <arm/xscale/pxa2x0reg.h>
@@ -58,24 +57,20 @@
#define write_icu(offset,value) \
(*(volatile uint32_t *)(pxaic_base + (offset)) = (value))
-extern volatile int current_spl_level;
extern volatile int intr_mask;
-extern volatile int softint_pending;
extern int pxa2x0_imask[];
-void pxa2x0_do_pending(void);
+
+#ifdef __PROG32
/*
* Cotulla's integrated ICU doesn't have IRQ0..7, so
* we map software interrupts to bit 0..3
*/
-#define SI_TO_IRQBIT(si) (1U<<(si))
-
static inline void
pxa2x0_setipl(int new)
{
-
- current_spl_level = new;
- intr_mask = pxa2x0_imask[current_spl_level];
+ set_curcpl(new);
+ intr_mask = pxa2x0_imask[new];
write_icu(SAIPIC_MR, intr_mask);
}
@@ -89,9 +84,9 @@
pxa2x0_setipl(new);
restore_interrupts(psw);
- /* If there are software interrupts to process, do it. */
- if (softint_pending & intr_mask)
- pxa2x0_do_pending();
+#ifdef __HAVE_FAST_SOFTINTS
+ cpu_dosoftints();
+#endif
}
@@ -100,8 +95,8 @@
{
int old, psw;
- old = current_spl_level;
- if (ipl > current_spl_level) {
+ old = curcpl();
+ if (ipl > old) {
psw = disable_interrupts(I32_bit);
pxa2x0_setipl(ipl);
restore_interrupts(psw);
@@ -113,7 +108,7 @@
static inline int
pxa2x0_spllower(int ipl)
{
- int old = current_spl_level;
+ int old = curcpl();
int psw = disable_interrupts(I32_bit);
pxa2x0_splx(ipl);
@@ -121,19 +116,6 @@
return old;
}
-static inline void
-pxa2x0_setsoftintr(int si)
-{
-
- atomic_set_bit((u_int *)__UNVOLATILE(&softint_pending),
- SI_TO_IRQBIT(si));
-
- /* Process unmasked pending soft interrupts. */
- if (softint_pending & intr_mask)
- pxa2x0_do_pending();
-}
-
-
/*
* An useful function for interrupt handlers.
* XXX: This shouldn't be here.
@@ -141,16 +123,14 @@
static inline int
find_first_bit(uint32_t bits)
{
- int count;
-
/*
* Since CLZ is available only on ARMv5, this isn't portable
* to all ARM CPUs. This file is for PXA2[15]0 processor.
*/
- __asm( "clz %0, %1" : "=r" (count) : "r" (bits) );
- return 31 - count;
+ return 31 - __builtin_clz(bits);
}
+#endif /* __PROG32 */
int _splraise(int);
int _spllower(int);
@@ -180,7 +160,6 @@
int (*func)(void *), void *cookie);
void pxa2x0_intr_disestablish(void *cookie);
void pxa2x0_update_intr_masks(int irqno, int level);
-extern volatile int current_spl_level;
#endif /* ! _LOCORE */
? src/sys/arch/evbarm/conf/NSLU2_ALL
Index: src/sys/arch/evbarm/adi_brh/brh_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/adi_brh/brh_machdep.c,v
retrieving revision 1.27
retrieving revision 1.28
diff -u -r1.27 -r1.28
--- src/sys/arch/evbarm/adi_brh/brh_machdep.c 19 Jan 2008 13:11:12 -0000
1.27
+++ src/sys/arch/evbarm/adi_brh/brh_machdep.c 27 Apr 2008 18:58:45 -0000
1.28
@@ -1,4 +1,4 @@
-/* $NetBSD: brh_machdep.c,v 1.27 2008/01/19 13:11:12 chris Exp $ */
+/* $NetBSD: brh_machdep.c,v 1.28 2008/04/27 18:58:45 matt Exp $ */
/*
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
@@ -73,7 +73,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: brh_machdep.c,v 1.27 2008/01/19 13:11:12 chris Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: brh_machdep.c,v 1.28 2008/04/27 18:58:45 matt Exp
$");
#include "opt_ddb.h"
#include "opt_pmap_debug.h"
@@ -160,7 +160,6 @@
#endif /* !PMAP_STATIC_L1S */
/* Physical and virtual addresses for some global pages */
-pv_addr_t systempage;
pv_addr_t irqstack;
pv_addr_t undstack;
pv_addr_t abtstack;
@@ -382,13 +381,9 @@
int loop;
int loop1;
u_int l1pagetable;
- pv_addr_t kernel_l1pt;
paddr_t memstart;
psize_t memsize;
- kernel_l1pt.pv_pa = 0;
- kernel_l1pt.pv_va = 0;
-
/*
* Clear out the 7-segment display. Whee, the first visual
* indication that we're running kernel code.
@@ -794,8 +789,7 @@
#ifdef VERBOSE_INIT_ARM
printf("pmap ");
#endif
- pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
- KERNEL_VM_BASE + KERNEL_VM_SIZE);
+ pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
/* Setup the IRQ system */
#ifdef VERBOSE_INIT_ARM
Index: src/sys/arch/evbarm/adi_brh/com_obio.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/adi_brh/com_obio.c,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -r1.5 -r1.6
--- src/sys/arch/evbarm/adi_brh/com_obio.c 14 Mar 2008 15:09:09 -0000
1.5
+++ src/sys/arch/evbarm/adi_brh/com_obio.c 28 Apr 2008 20:23:16 -0000
1.6
@@ -1,4 +1,4 @@
-/* $NetBSD: com_obio.c,v 1.5 2008/03/14 15:09:09 cube Exp $ */
+/* $NetBSD: com_obio.c,v 1.6 2008/04/28 20:23:16 martin Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -37,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: com_obio.c,v 1.5 2008/03/14 15:09:09 cube Exp $");
+__KERNEL_RCSID(0, "$NetBSD: com_obio.c,v 1.6 2008/04/28 20:23:16 martin Exp
$");
#include <sys/param.h>
#include <sys/systm.h>
Index: src/sys/arch/evbarm/armadillo/armadillo9_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/armadillo/armadillo9_machdep.c,v
retrieving revision 1.10
retrieving revision 1.11
diff -u -r1.10 -r1.11
--- src/sys/arch/evbarm/armadillo/armadillo9_machdep.c 19 Jan 2008 13:11:12
-0000 1.10
+++ src/sys/arch/evbarm/armadillo/armadillo9_machdep.c 27 Apr 2008 18:58:45
-0000 1.11
@@ -1,4 +1,4 @@
-/* $NetBSD: armadillo9_machdep.c,v 1.10 2008/01/19 13:11:12 chris Exp $
*/
+/* $NetBSD: armadillo9_machdep.c,v 1.11 2008/04/27 18:58:45 matt Exp $
*/
/*
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
@@ -110,7 +110,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: armadillo9_machdep.c,v 1.10 2008/01/19 13:11:12
chris Exp $");
+__KERNEL_RCSID(0, "$NetBSD: armadillo9_machdep.c,v 1.11 2008/04/27 18:58:45
matt Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
@@ -481,7 +481,6 @@
int loop;
int loop1;
u_int l1pagetable;
- pv_addr_t kernel_l1pt;
struct bootparam_tag *bootparam_p;
unsigned long devcfg;
@@ -613,8 +612,6 @@
memset((char *)(var), 0, ((np) * PAGE_SIZE));
loop1 = 0;
- kernel_l1pt.pv_pa = 0;
- kernel_l1pt.pv_va = 0;
for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
/* Are we 16KB aligned for an L1 ? */
if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1))
== 0
@@ -856,8 +853,7 @@
#ifdef VERBOSE_INIT_ARM
printf("pmap ");
#endif
- pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
- KERNEL_VM_BASE + KERNEL_VM_SIZE);
+ pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
/* Setup the IRQ system */
#ifdef VERBOSE_INIT_ARM
Index: src/sys/arch/evbarm/conf/GUMSTIX
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/conf/GUMSTIX,v
retrieving revision 1.24
retrieving revision 1.25
diff -u -r1.24 -r1.25
--- src/sys/arch/evbarm/conf/GUMSTIX 27 Jan 2008 06:23:38 -0000 1.24
+++ src/sys/arch/evbarm/conf/GUMSTIX 9 May 2008 00:08:37 -0000 1.25
@@ -1,4 +1,4 @@
-# $NetBSD: GUMSTIX,v 1.24 2008/01/27 06:23:38 kiyohara Exp $
+# $NetBSD: GUMSTIX,v 1.25 2008/05/09 00:08:37 matt Exp $
#
# GUMSTIX -- Gumstix. Inc. gumstix platforms kernel
#
@@ -209,18 +209,18 @@
pxaudc0 at pxaip? # USB Device Controller
# integrated MMC/SD contoller
-#pxamci0 at pxaip? addr 0x41100000 size 0x48
-#sdmmc* at pxamci?
+pxamci0 at pxaip? addr 0x41100000 size 0x48
+sdmmc* at pxamci?
#options PXAMCI_DEBUG
#options SDMMC_DEBUG
#options SDMMC_DUMP_CSD
# SCSI bus support
-#scsibus* at scsi?
+scsibus* at scsi?
# SCSI devices
-#sd* at scsibus? target ? lun ? # SCSI disk drives
-#uk* at scsibus? target ? lun ? # SCSI unknown
+sd* at scsibus? target ? lun ? # SCSI disk drives
+uk* at scsibus? target ? lun ? # SCSI unknown
# gumstix device support
gxio0 at pxaip?
Index: src/sys/arch/evbarm/conf/INTEGRATOR
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/conf/INTEGRATOR,v
retrieving revision 1.49
retrieving revision 1.50
diff -u -r1.49 -r1.50
--- src/sys/arch/evbarm/conf/INTEGRATOR 15 Mar 2008 10:30:51 -0000 1.49
+++ src/sys/arch/evbarm/conf/INTEGRATOR 27 Apr 2008 18:58:46 -0000 1.50
@@ -1,4 +1,4 @@
-# $NetBSD: INTEGRATOR,v 1.49 2008/03/15 10:30:51 rearnsha Exp $
+# $NetBSD: INTEGRATOR,v 1.50 2008/04/27 18:58:46 matt Exp $
#
# GENERIC -- ARM Integrator board Generic kernel
#
@@ -21,7 +21,7 @@
options CPU_ARM9 # Support the ARM9TDMI core
options CPU_ARM10 # Support the ARM10 core
options CPU_ARM11 # Support the ARM11 core
-options FPU_VFP
+options FPU_VFP
# XXX Should be armv5 for ARM10 processor.
makeoptions CPUFLAGS="-march=armv4"
Index: src/sys/arch/evbarm/conf/IQ80310
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/conf/IQ80310,v
retrieving revision 1.58
retrieving revision 1.59
diff -u -r1.58 -r1.59
--- src/sys/arch/evbarm/conf/IQ80310 19 Jan 2008 13:11:13 -0000 1.58
+++ src/sys/arch/evbarm/conf/IQ80310 27 Apr 2008 18:58:46 -0000 1.59
@@ -1,4 +1,4 @@
-# $NetBSD: IQ80310,v 1.58 2008/01/19 13:11:13 chris Exp $
+# $NetBSD: IQ80310,v 1.59 2008/04/27 18:58:46 matt Exp $
#
# IQ80310 -- Intel IQ80310 Evaluation Board Kernel
#
@@ -137,7 +137,7 @@
options DDB # in-kernel debugger
options DDB_HISTORY_SIZE=100 # Enable history editing in DDB
#makeoptions DEBUG="-g" # compile full symbol table
-options SYMTAB_SPACE=310000
+options SYMTAB_SPACE=320000
config netbsd root on ? type ?
config netbsd-fxp0 root on fxp0 type nfs
Index: src/sys/arch/evbarm/conf/Makefile.evbarm.inc
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/conf/Makefile.evbarm.inc,v
retrieving revision 1.17
retrieving revision 1.18
diff -u -r1.17 -r1.18
--- src/sys/arch/evbarm/conf/Makefile.evbarm.inc 24 Nov 2005 12:54:29
-0000 1.17
+++ src/sys/arch/evbarm/conf/Makefile.evbarm.inc 27 Apr 2008 18:58:46
-0000 1.18
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile.evbarm.inc,v 1.17 2005/11/24 12:54:29 dbj Exp $
+# $NetBSD: Makefile.evbarm.inc,v 1.18 2008/04/27 18:58:46 matt Exp $
.if defined(BOARDMKFRAG) # Must be a full pathname.
.include "${BOARDMKFRAG}"
@@ -12,7 +12,7 @@
EXTRA_CLEAN+= ldscript tmp
# generate ldscript from common template
-ldscript: ${THISARM}/conf/ldscript.evbarm ${THISARM}/conf/Makefile.evbarm.inc
+ldscript: ${THISARM}/conf/ldscript.evbarm ${THISARM}/conf/Makefile.evbarm.inc
Makefile ${BOARDMKFRAG}
echo ${KERNELS}
sed -e 's/@KERNEL_BASE_PHYS@/${KERNEL_BASE_PHYS}/' \
-e 's/@KERNEL_BASE_VIRT@/${KERNEL_BASE_VIRT}/' \
Index: src/sys/arch/evbarm/conf/files.gumstix
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/conf/files.gumstix,v
retrieving revision 1.10
retrieving revision 1.11
diff -u -r1.10 -r1.11
--- src/sys/arch/evbarm/conf/files.gumstix 17 Mar 2008 09:30:02 -0000
1.10
+++ src/sys/arch/evbarm/conf/files.gumstix 9 May 2008 00:08:37 -0000
1.11
@@ -1,4 +1,4 @@
-# $NetBSD: files.gumstix,v 1.10 2008/03/17 09:30:02 kiyohara Exp $
+# $NetBSD: files.gumstix,v 1.11 2008/05/09 00:08:37 matt Exp $
#
# Gumstix. Inc. Gumstix boards configuration info
#
@@ -8,7 +8,7 @@
# CPU support and integrated peripherals
include "arch/arm/xscale/files.pxa2x0"
-#include "dev/sdmmc/files.sdmmc"
+include "dev/sdmmc/files.sdmmc"
# gumstix devices
device gxio {[addr = -1], [gpirq = -1]}
@@ -25,6 +25,10 @@
attach pxapcic at pxaip with pxapcic_gxpcic
file arch/evbarm/gumstix/gxpcic.c pxapcic_gxpcic
+# PXA2x0 MMC/SD controller
+attach pxamci at pxaip with gxmci
+file arch/evbarm/gumstix/gxmci.c gxmci
+
# Inter-Integrated Circuit controller
device gxiic: pxaiic, i2cbus
attach gxiic at pxaip
Index: src/sys/arch/evbarm/conf/ldscript.evbarm
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/conf/ldscript.evbarm,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -r1.3 -r1.4
--- src/sys/arch/evbarm/conf/ldscript.evbarm 23 May 2003 00:57:27 -0000
1.3
+++ src/sys/arch/evbarm/conf/ldscript.evbarm 27 Apr 2008 18:58:46 -0000
1.4
@@ -1,4 +1,4 @@
-/* $NetBSD: ldscript.evbarm,v 1.3 2003/05/23 00:57:27 ichiro Exp $ */
+/* $NetBSD: ldscript.evbarm,v 1.4 2008/04/27 18:58:46 matt Exp $ */
OUTPUT_ARCH(arm)
ENTRY(KERNEL_BASE_phys)
@@ -26,9 +26,9 @@
PROVIDE (__etext = .);
PROVIDE (_etext = .);
PROVIDE (etext = .);
- /* Adjust the address for the data segment to start on the next page
+ /* Adjust the address for the data segment to start on the next large page
boundary. */
- . = ALIGN(0x8000);
+ . = ALIGN(0x10000);
.data :
AT (LOADADDR(.text) + (ADDR(.data) - ADDR(.text)))
{
Index: src/sys/arch/evbarm/conf/mk.osk5912
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/conf/mk.osk5912,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- src/sys/arch/evbarm/conf/mk.osk5912 6 Jan 2007 08:16:26 -0000 1.1
+++ src/sys/arch/evbarm/conf/mk.osk5912 27 Apr 2008 18:58:46 -0000 1.2
@@ -1,11 +1,11 @@
-# $NetBSD: mk.osk5912,v 1.1 2007/01/06 08:16:26 christos Exp $
+# $NetBSD: mk.osk5912,v 1.2 2008/04/27 18:58:46 matt Exp $
CFLAGS+=-mcpu=arm926ej-s
SYSTEM_FIRST_OBJ= omap_start.o
SYSTEM_FIRST_SFILE= ${ARM}/omap/omap_start.S
KERNEL_BASE_PHYS=0x10000000
-KERNEL_BASE_VIRT=0xc0000000
+KERNEL_BASE_VIRT=0x80000000
SYSTEM_LD_TAIL_EXTRA+=; \
echo ${OBJCOPY} -S -O binary $@ $@.bin; \
Index: src/sys/arch/evbarm/conf/std.adi_brh
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/conf/std.adi_brh,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -r1.6 -r1.7
--- src/sys/arch/evbarm/conf/std.adi_brh 27 Jan 2008 12:37:11 -0000
1.6
+++ src/sys/arch/evbarm/conf/std.adi_brh 9 May 2008 00:08:37 -0000
1.7
@@ -1,4 +1,4 @@
-# $NetBSD: std.adi_brh,v 1.6 2008/01/27 12:37:11 chris Exp $
+# $NetBSD: std.adi_brh,v 1.7 2008/05/09 00:08:37 matt Exp $
#
# standard NetBSD/evbarm for ADI BRH options
@@ -16,6 +16,7 @@
# To support easy transit to ../arch/arm/arm32
options ARM32
+options KERNEL_EXT_BASE=0xc0000000
makeoptions LOADADDRESS="0xc0200000"
makeoptions BOARDTYPE="adi_brh"
makeoptions BOARDMKFRAG="${THISARM}/conf/mk.adi_brh"
Index: src/sys/arch/evbarm/conf/std.armadillo9
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/conf/std.armadillo9,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -r1.3 -r1.4
--- src/sys/arch/evbarm/conf/std.armadillo9 27 Jan 2008 12:37:11 -0000
1.3
+++ src/sys/arch/evbarm/conf/std.armadillo9 9 May 2008 00:08:37 -0000
1.4
@@ -1,4 +1,4 @@
-# $NetBSD: std.armadillo9,v 1.3 2008/01/27 12:37:11 chris Exp $
+# $NetBSD: std.armadillo9,v 1.4 2008/05/09 00:08:37 matt Exp $
#
# standard NetBSD/evbarm for Armadillo9 options
@@ -18,6 +18,7 @@
makeoptions BOARDTYPE="armadillo9"
+options KERNEL_EXT_BASE=0xc0000000
makeoptions LOADADDRESS="0xc0200000"
makeoptions BOARDMKFRAG="${THISARM}/conf/mk.armadillo9"
options ARM_INTR_IMPL="<arch/arm/ep93xx/ep93xx_intr.h>"
Index: src/sys/arch/evbarm/conf/std.g42xxeb
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/conf/std.g42xxeb,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -r1.4 -r1.5
--- src/sys/arch/evbarm/conf/std.g42xxeb 27 Jan 2008 12:37:11 -0000
1.4
+++ src/sys/arch/evbarm/conf/std.g42xxeb 9 May 2008 00:08:37 -0000
1.5
@@ -1,4 +1,4 @@
-# $NetBSD: std.g42xxeb,v 1.4 2008/01/27 12:37:11 chris Exp $
+# $NetBSD: std.g42xxeb,v 1.5 2008/05/09 00:08:37 matt Exp $
#
# standard NetBSD/evbarm for TWINTAIL (G4255EB) options
@@ -16,6 +16,7 @@
# To support easy transit to ../arch/arm/arm32
options ARM32
+options KERNEL_EXT_BASE=0xc0000000
makeoptions LOADADDRESS="0xc0200000"
makeoptions BOARDTYPE="g42xxeb"
makeoptions BOARDMKFRAG="${THISARM}/conf/mk.g42xxeb"
Index: src/sys/arch/evbarm/conf/std.gumstix
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/conf/std.gumstix,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -r1.3 -r1.4
--- src/sys/arch/evbarm/conf/std.gumstix 27 Jan 2008 12:37:11 -0000
1.3
+++ src/sys/arch/evbarm/conf/std.gumstix 9 May 2008 00:08:37 -0000
1.4
@@ -1,4 +1,4 @@
-# $NetBSD: std.gumstix,v 1.3 2008/01/27 12:37:11 chris Exp $
+# $NetBSD: std.gumstix,v 1.4 2008/05/09 00:08:37 matt Exp $
#
# standard NetBSD/evbarm for GUMSTIX options
@@ -15,6 +15,7 @@
# To support easy transit to ../arch/arm/arm32
options ARM32
+options KERNEL_EXT_BASE=0xc0000000
makeoptions LOADADDRESS="0xc0200000"
makeoptions BOARDTYPE="gumstix"
makeoptions BOARDMKFRAG="${THISARM}/conf/mk.gumstix"
Index: src/sys/arch/evbarm/conf/std.ixdp425
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/conf/std.ixdp425,v
retrieving revision 1.8
retrieving revision 1.9
diff -u -r1.8 -r1.9
--- src/sys/arch/evbarm/conf/std.ixdp425 27 Jan 2008 12:37:11 -0000
1.8
+++ src/sys/arch/evbarm/conf/std.ixdp425 9 May 2008 00:08:37 -0000
1.9
@@ -1,4 +1,4 @@
-# $NetBSD: std.ixdp425,v 1.8 2008/01/27 12:37:11 chris Exp $
+# $NetBSD: std.ixdp425,v 1.9 2008/05/09 00:08:37 matt Exp $
#
# standard NetBSD/evbarm for IXDP425 options
@@ -18,6 +18,7 @@
#options ARM32_NEW_VM_LAYOUT # Not yet ready for prime-time
+options KERNEL_EXT_BASE=0xc0000000
makeoptions LOADADDRESS="0xc0200000"
makeoptions BOARDMKFRAG="${THISARM}/conf/mk.ixdp425"
Index: src/sys/arch/evbarm/conf/std.ixm1200
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/conf/std.ixm1200,v
retrieving revision 1.10
retrieving revision 1.11
diff -u -r1.10 -r1.11
--- src/sys/arch/evbarm/conf/std.ixm1200 27 Jan 2008 12:37:11 -0000
1.10
+++ src/sys/arch/evbarm/conf/std.ixm1200 9 May 2008 00:08:37 -0000
1.11
@@ -1,4 +1,4 @@
-# $NetBSD: std.ixm1200,v 1.10 2008/01/27 12:37:11 chris Exp $
+# $NetBSD: std.ixm1200,v 1.11 2008/05/09 00:08:37 matt Exp $
#
# standard NetBSD/evbarm for IXM1200 options
@@ -18,6 +18,7 @@
#options ARM32_NEW_VM_LAYOUT # Not yet ready for prime-time
+options KERNEL_EXT_BASE=0xc0000000
makeoptions LOADADDRESS="0xC0200000"
makeoptions BOARDTYPE="ixm1200"
makeoptions BOARDMKFRAG="${THISARM}/conf/mk.ixm1200"
Index: src/sys/arch/evbarm/conf/std.lubbock
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/conf/std.lubbock,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -r1.6 -r1.7
--- src/sys/arch/evbarm/conf/std.lubbock 27 Jan 2008 12:37:12 -0000
1.6
+++ src/sys/arch/evbarm/conf/std.lubbock 9 May 2008 00:08:37 -0000
1.7
@@ -1,4 +1,4 @@
-# $NetBSD: std.lubbock,v 1.6 2008/01/27 12:37:12 chris Exp $
+# $NetBSD: std.lubbock,v 1.7 2008/05/09 00:08:37 matt Exp $
#
# standard NetBSD/evbarm for LUBBOCK options
@@ -17,6 +17,7 @@
# To support easy transit to ../arch/arm/arm32
options ARM32
+options KERNEL_EXT_BASE=0xc0000000
makeoptions LOADADDRESS="0xc0200000"
makeoptions BOARDTYPE="lubbock"
makeoptions BOARDMKFRAG="${THISARM}/conf/mk.lubbock"
Index: src/sys/arch/evbarm/conf/std.nslu2
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/conf/std.nslu2,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- src/sys/arch/evbarm/conf/std.nslu2 27 Jan 2008 12:37:12 -0000 1.2
+++ src/sys/arch/evbarm/conf/std.nslu2 9 May 2008 00:08:37 -0000 1.3
@@ -1,4 +1,4 @@
-# $NetBSD: std.nslu2,v 1.2 2008/01/27 12:37:12 chris Exp $
+# $NetBSD: std.nslu2,v 1.3 2008/05/09 00:08:37 matt Exp $
#
# Standard NetBSD/evbarm options for Linksys NSLU2
@@ -10,10 +10,10 @@
include "arch/evbarm/conf/files.nslu2"
options EXEC_ELF32
-options EXEC_AOUT
options EXEC_SCRIPT
options ARM32
+options KERNEL_BASE_EXT=0xc0000000
makeoptions LOADADDRESS="0xc0200000"
makeoptions BOARDMKFRAG="${THISARM}/conf/mk.nslu2"
Index: src/sys/arch/evbarm/conf/std.osk5912
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/conf/std.osk5912,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- src/sys/arch/evbarm/conf/std.osk5912 27 Jan 2008 12:37:12 -0000
1.2
+++ src/sys/arch/evbarm/conf/std.osk5912 27 Apr 2008 18:58:46 -0000
1.3
@@ -1,4 +1,4 @@
-# $NetBSD: std.osk5912,v 1.2 2008/01/27 12:37:12 chris Exp $
+# $NetBSD: std.osk5912,v 1.3 2008/04/27 18:58:46 matt Exp $
#
# standard NetBSD/evbarm for OSK5912 options
@@ -15,7 +15,7 @@
# To support easy transit to ../arch/arm/arm32
options ARM32
-makeoptions LOADADDRESS="0xc0000000"
+makeoptions LOADADDRESS="0x80000000"
makeoptions BOARDTYPE="osk5912"
makeoptions BOARDMKFRAG="${THISARM}/conf/mk.osk5912"
Index: src/sys/arch/evbarm/conf/std.tsarm
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/conf/std.tsarm,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -r1.4 -r1.5
--- src/sys/arch/evbarm/conf/std.tsarm 27 Jan 2008 12:37:12 -0000 1.4
+++ src/sys/arch/evbarm/conf/std.tsarm 9 May 2008 00:08:37 -0000 1.5
@@ -1,4 +1,4 @@
-# $NetBSD: std.tsarm,v 1.4 2008/01/27 12:37:12 chris Exp $
+# $NetBSD: std.tsarm,v 1.5 2008/05/09 00:08:37 matt Exp $
#
# standard NetBSD/evbarm for TS7200 options
@@ -20,6 +20,7 @@
makeoptions BOARDTYPE="tsarm"
+options KERNEL_EXT_BASE=0xc0000000
makeoptions LOADADDRESS="0xc0200000"
makeoptions BOARDMKFRAG="${THISARM}/conf/mk.tsarm"
options ARM_INTR_IMPL="<arch/arm/ep93xx/ep93xx_intr.h>"
Index: src/sys/arch/evbarm/conf/std.viper
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/conf/std.viper,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -r1.4 -r1.5
--- src/sys/arch/evbarm/conf/std.viper 27 Jan 2008 12:37:12 -0000 1.4
+++ src/sys/arch/evbarm/conf/std.viper 9 May 2008 00:08:37 -0000 1.5
@@ -1,4 +1,4 @@
-# $NetBSD: std.viper,v 1.4 2008/01/27 12:37:12 chris Exp $
+# $NetBSD: std.viper,v 1.5 2008/05/09 00:08:37 matt Exp $
#
# Arcom Viper standard kernel options
#
@@ -14,6 +14,7 @@
options ARM32
+options KERNEL_EXT_BASE=0xc0000000
makeoptions LOADADDRESS="0xc0200000"
makeoptions BOARDTYPE="viper"
makeoptions BOARDMKFRAG="${THISARM}/conf/mk.viper"
Index: src/sys/arch/evbarm/dev/plcom.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/dev/plcom.c,v
retrieving revision 1.26
retrieving revision 1.27
diff -u -r1.26 -r1.27
--- src/sys/arch/evbarm/dev/plcom.c 21 Apr 2008 12:56:30 -0000 1.26
+++ src/sys/arch/evbarm/dev/plcom.c 28 Apr 2008 20:23:16 -0000 1.27
@@ -1,4 +1,4 @@
-/* $NetBSD: plcom.c,v 1.26 2008/04/21 12:56:30 ad Exp $ */
+/* $NetBSD: plcom.c,v 1.27 2008/04/28 20:23:16 martin Exp $ */
/*-
* Copyright (c) 2001 ARM Ltd
@@ -42,13 +42,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -101,7 +94,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: plcom.c,v 1.26 2008/04/21 12:56:30 ad Exp $");
+__KERNEL_RCSID(0, "$NetBSD: plcom.c,v 1.27 2008/04/28 20:23:16 martin Exp $");
#include "opt_plcom.h"
#include "opt_ddb.h"
Index: src/sys/arch/evbarm/evbarm/autoconf.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/evbarm/autoconf.c,v
retrieving revision 1.11
retrieving revision 1.12
diff -u -r1.11 -r1.12
--- src/sys/arch/evbarm/evbarm/autoconf.c 3 Dec 2007 15:33:32 -0000
1.11
+++ src/sys/arch/evbarm/evbarm/autoconf.c 28 Apr 2008 20:23:16 -0000
1.12
@@ -1,4 +1,4 @@
-/* $NetBSD: autoconf.c,v 1.11 2007/12/03 15:33:32 ad Exp $ */
+/* $NetBSD: autoconf.c,v 1.12 2008/04/28 20:23:16 martin Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -37,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.11 2007/12/03 15:33:32 ad Exp $");
+__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.12 2008/04/28 20:23:16 martin Exp
$");
#include "opt_md.h"
Index: src/sys/arch/evbarm/g42xxeb/g42xxeb_kmkbd.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/g42xxeb/g42xxeb_kmkbd.c,v
retrieving revision 1.7
retrieving revision 1.9
diff -u -r1.7 -r1.9
--- src/sys/arch/evbarm/g42xxeb/g42xxeb_kmkbd.c 17 Oct 2007 19:54:12 -0000
1.7
+++ src/sys/arch/evbarm/g42xxeb/g42xxeb_kmkbd.c 10 May 2008 15:31:04 -0000
1.9
@@ -1,4 +1,4 @@
-/* $NetBSD: g42xxeb_kmkbd.c,v 1.7 2007/10/17 19:54:12 garbled Exp $ */
+/* $NetBSD: g42xxeb_kmkbd.c,v 1.9 2008/05/10 15:31:04 martin Exp $ */
/*-
* Copyright (c) 2002, 2003, 2005 Genetec corp.
@@ -37,7 +37,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: g42xxeb_kmkbd.c,v 1.7 2007/10/17 19:54:12 garbled
Exp $" );
+__KERNEL_RCSID(0, "$NetBSD: g42xxeb_kmkbd.c,v 1.9 2008/05/10 15:31:04 martin
Exp $" );
#include <sys/param.h>
#include <sys/systm.h>
Index: src/sys/arch/evbarm/g42xxeb/g42xxeb_lcd.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/g42xxeb/g42xxeb_lcd.c,v
retrieving revision 1.8
retrieving revision 1.10
diff -u -r1.8 -r1.10
--- src/sys/arch/evbarm/g42xxeb/g42xxeb_lcd.c 4 Mar 2007 05:59:44 -0000
1.8
+++ src/sys/arch/evbarm/g42xxeb/g42xxeb_lcd.c 10 May 2008 15:31:04 -0000
1.10
@@ -1,4 +1,4 @@
-/* $NetBSD: g42xxeb_lcd.c,v 1.8 2007/03/04 05:59:44 christos Exp $ */
+/* $NetBSD: g42xxeb_lcd.c,v 1.10 2008/05/10 15:31:04 martin Exp $ */
/*-
* Copyright (c) 2001, 2002, 2005 Genetec corp.
Index: src/sys/arch/evbarm/g42xxeb/g42xxeb_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/g42xxeb/g42xxeb_machdep.c,v
retrieving revision 1.13
retrieving revision 1.14
diff -u -r1.13 -r1.14
--- src/sys/arch/evbarm/g42xxeb/g42xxeb_machdep.c 19 Jan 2008 13:11:14
-0000 1.13
+++ src/sys/arch/evbarm/g42xxeb/g42xxeb_machdep.c 27 Apr 2008 18:58:46
-0000 1.14
@@ -1,4 +1,4 @@
-/* $NetBSD: g42xxeb_machdep.c,v 1.13 2008/01/19 13:11:14 chris Exp $ */
+/* $NetBSD: g42xxeb_machdep.c,v 1.14 2008/04/27 18:58:46 matt Exp $ */
/*
* Copyright (c) 2002, 2003, 2004, 2005 Genetec Corporation.
@@ -195,7 +195,6 @@
#endif /* !PMAP_STATIC_L1S */
/* Physical and virtual addresses for some global pages */
-pv_addr_t systempage;
pv_addr_t irqstack;
pv_addr_t undstack;
pv_addr_t abtstack;
@@ -430,7 +429,6 @@
int loop;
int loop1;
u_int l1pagetable;
- pv_addr_t kernel_l1pt;
paddr_t memstart;
psize_t memsize;
int led_data = 1;
@@ -609,8 +607,6 @@
memset((char *)(var), 0, ((np) * PAGE_SIZE));
loop1 = 0;
- kernel_l1pt.pv_pa = 0;
- kernel_l1pt.pv_va = 0;
for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
/* Are we 16KB aligned for an L1 ? */
if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1))
== 0
@@ -867,8 +863,7 @@
printf("pmap ");
#endif
LEDSTEP();
- pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
- KERNEL_VM_BASE + KERNEL_VM_SIZE);
+ pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
LEDSTEP();
#ifdef __HAVE_MEMORY_DISK__
Index: src/sys/arch/evbarm/g42xxeb/gb225_slhci.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/g42xxeb/gb225_slhci.c,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -r1.3 -r1.4
--- src/sys/arch/evbarm/g42xxeb/gb225_slhci.c 23 Feb 2006 05:37:47 -0000
1.3
+++ src/sys/arch/evbarm/g42xxeb/gb225_slhci.c 28 Apr 2008 20:23:16 -0000
1.4
@@ -1,4 +1,4 @@
-/* $NetBSD: gb225_slhci.c,v 1.3 2006/02/23 05:37:47 thorpej Exp $ */
+/* $NetBSD: gb225_slhci.c,v 1.4 2008/04/28 20:23:16 martin Exp $ */
/*
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/evbarm/g42xxeb/obio.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/g42xxeb/obio.c,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -r1.6 -r1.7
--- src/sys/arch/evbarm/g42xxeb/obio.c 6 Jan 2008 01:37:57 -0000 1.6
+++ src/sys/arch/evbarm/g42xxeb/obio.c 27 Apr 2008 18:58:46 -0000 1.7
@@ -1,4 +1,4 @@
-/* $NetBSD: obio.c,v 1.6 2008/01/06 01:37:57 matt Exp $ */
+/* $NetBSD: obio.c,v 1.7 2008/04/27 18:58:46 matt Exp $ */
/*
* Copyright (c) 2002, 2003, 2005 Genetec corp. All rights reserved.
@@ -152,7 +152,7 @@
{
struct obio_softc *sc = (struct obio_softc *)arg;
int irqno;
- int spl_save = current_spl_level;
+ int spl_save = curcpl();
int psw;
psw = disable_interrupts(I32_bit);
Index: src/sys/arch/evbarm/gumstix/gumstix_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/gumstix/gumstix_machdep.c,v
retrieving revision 1.8
retrieving revision 1.9
diff -u -r1.8 -r1.9
--- src/sys/arch/evbarm/gumstix/gumstix_machdep.c 19 Jan 2008 13:11:14
-0000 1.8
+++ src/sys/arch/evbarm/gumstix/gumstix_machdep.c 27 Apr 2008 18:58:46
-0000 1.9
@@ -1,4 +1,4 @@
-/* $NetBSD: gumstix_machdep.c,v 1.8 2008/01/19 13:11:14 chris Exp $ */
+/* $NetBSD: gumstix_machdep.c,v 1.9 2008/04/27 18:58:46 matt Exp $ */
/*
* Copyright (C) 2005, 2006, 2007 WIDE Project and SOUM Corporation.
* All rights reserved.
@@ -227,7 +227,6 @@
#endif /* !PMAP_STATIC_L1S */
/* Physical and virtual addresses for some global pages */
-pv_addr_t systempage;
pv_addr_t irqstack;
pv_addr_t undstack;
pv_addr_t abtstack;
@@ -449,7 +448,6 @@
int loop;
int loop1;
u_int l1pagetable;
- pv_addr_t kernel_l1pt;
paddr_t memstart;
psize_t memsize;
#ifdef DIAGNOSTIC
@@ -588,8 +586,6 @@
memset((char *)(var), 0, ((np) * PAGE_SIZE));
loop1 = 0;
- kernel_l1pt.pv_pa = 0;
- kernel_l1pt.pv_va = 0;
for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
/* Are we 16KB aligned for an L1 ? */
if ((physical_freeend & (L1_TABLE_SIZE - 1)) == 0 &&
@@ -844,8 +840,7 @@
#ifdef VERBOSE_INIT_ARM
printf("pmap ");
#endif
- pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
- KERNEL_VM_BASE + KERNEL_VM_SIZE);
+ pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
#ifdef __HAVE_MEMORY_DISK__
md_root_setconf(memory_disk, sizeof memory_disk);
Index: src/sys/arch/evbarm/gumstix/gumstixvar.h
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/gumstix/gumstixvar.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- src/sys/arch/evbarm/gumstix/gumstixvar.h 17 Oct 2006 17:06:22 -0000
1.2
+++ src/sys/arch/evbarm/gumstix/gumstixvar.h 11 May 2008 08:23:17 -0000
1.3
@@ -1,4 +1,4 @@
-/* $NetBSD: gumstixvar.h,v 1.2 2006/10/17 17:06:22 kiyohara Exp $ */
+/* $NetBSD: gumstixvar.h,v 1.3 2008/05/11 08:23:17 kiyohara Exp $ */
/*
* Copyright (C) 2005, 2006 WIDE Project and SOUM Corporation.
* All rights reserved.
@@ -46,7 +46,7 @@
struct gxio_softc {
- struct device sc_dev;
+ device_t sc_dev;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
};
Index: src/sys/arch/evbarm/gumstix/gxiic.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/gumstix/gxiic.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- src/sys/arch/evbarm/gumstix/gxiic.c 6 Dec 2007 17:00:32 -0000 1.2
+++ src/sys/arch/evbarm/gumstix/gxiic.c 11 May 2008 08:23:17 -0000 1.3
@@ -1,4 +1,4 @@
-/* $NetBSD: gxiic.c,v 1.2 2007/12/06 17:00:32 ad Exp $ */
+/* $NetBSD: gxiic.c,v 1.3 2008/05/11 08:23:17 kiyohara Exp $ */
/*
* Copyright (c) 2007 KIYOHARA Takashi
* All rights reserved.
@@ -25,7 +25,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gxiic.c,v 1.2 2007/12/06 17:00:32 ad Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gxiic.c,v 1.3 2008/05/11 08:23:17 kiyohara Exp $");
#include <sys/param.h>
#include <sys/device.h>
@@ -47,8 +47,8 @@
};
-static int gxiicmatch(struct device *, struct cfdata *, void *);
-static void gxiicattach(struct device *, struct device *, void *);
+static int gxiicmatch(device_t, struct cfdata *, void *);
+static void gxiicattach(device_t, device_t, void *);
/* fuctions for i2c_controller */
static int gxiic_acquire_bus(void *, int);
@@ -63,7 +63,7 @@
/* ARGSUSED */
static int
-gxiicmatch(struct device *parent, struct cfdata *match, void *aux)
+gxiicmatch(device_t parent, struct cfdata *match, void *aux)
{
return 1;
@@ -71,7 +71,7 @@
/* ARGSUSED */
static void
-gxiicattach(struct device *parent, struct device *self, void *aux)
+gxiicattach(device_t parent, device_t self, void *aux)
{
struct gxiic_softc *sc = device_private(self);
struct gxio_attach_args *gxa = aux;
@@ -83,7 +83,7 @@
sc->sc_pxa_i2c.sc_iot = gxa->gxa_iot;
sc->sc_pxa_i2c.sc_size = PXA2X0_I2C_SIZE;
if (pxa2x0_i2c_attach_sub(&sc->sc_pxa_i2c)) {
- aprint_error(": unable to attach PXA I2C\n");
+ aprint_error_dev(self, "unable to attach PXA I2C\n");
return;
}
Index: src/sys/arch/evbarm/gumstix/gxio.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/gumstix/gxio.c,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -r1.7 -r1.8
--- src/sys/arch/evbarm/gumstix/gxio.c 17 Oct 2007 19:54:12 -0000 1.7
+++ src/sys/arch/evbarm/gumstix/gxio.c 11 May 2008 08:23:17 -0000 1.8
@@ -1,4 +1,4 @@
-/* $NetBSD: gxio.c,v 1.7 2007/10/17 19:54:12 garbled Exp $ */
+/* $NetBSD: gxio.c,v 1.8 2008/05/11 08:23:17 kiyohara Exp $ */
/*
* Copyright (C) 2005, 2006, 2007 WIDE Project and SOUM Corporation.
* All rights reserved.
@@ -31,7 +31,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gxio.c,v 1.7 2007/10/17 19:54:12 garbled Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gxio.c,v 1.8 2008/05/11 08:23:17 kiyohara Exp $");
#include "opt_gxio.h"
@@ -57,9 +57,9 @@
void (*config)(void);
};
-static int gxiomatch(struct device *, struct cfdata *, void *);
-static void gxioattach(struct device *, struct device *, void *);
-static int gxiosearch(struct device *, struct cfdata *, const int *, void *);
+static int gxiomatch(device_t, struct cfdata *, void *);
+static void gxioattach(device_t, device_t, void *);
+static int gxiosearch(device_t, struct cfdata *, const int *, void *);
static int gxioprint(void *, const char *);
void gxio_config_pin(void);
@@ -74,7 +74,7 @@
static void netmmc_config(void);
static void wifistix_cf_config(void);
-CFATTACH_DECL(
+CFATTACH_DECL_NEW(
gxio, sizeof(struct gxio_softc), gxiomatch, gxioattach, NULL, NULL);
char busheader[MAX_BOOT_STRING];
@@ -126,7 +126,7 @@
/* ARGSUSED */
static int
-gxiomatch(struct device *parent, struct cfdata *match, void *aux)
+gxiomatch(device_t parent, struct cfdata *match, void *aux)
{
bus_space_tag_t iot = &pxa2x0_bs_tag;
bus_space_handle_t ioh;
@@ -142,13 +142,14 @@
/* ARGSUSED */
static void
-gxioattach(struct device *parent, struct device *self, void *aux)
+gxioattach(device_t parent, device_t self, void *aux)
{
struct gxio_softc *sc = device_private(self);
aprint_normal("\n");
aprint_naive("\n");
+ sc->sc_dev = self;
sc->sc_iot = &pxa2x0_bs_tag;
if (bus_space_map(sc->sc_iot,
@@ -163,8 +164,7 @@
/* ARGSUSED */
static int
-gxiosearch(
- struct device *parent, struct cfdata *cf, const int *ldesc, void *aux)
+gxiosearch(device_t parent, struct cfdata *cf, const int *ldesc, void *aux)
{
struct gxio_softc *sc = device_private(parent);
struct gxio_attach_args gxa;
Index: src/sys/arch/evbarm/gumstix/gxpcic.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/gumstix/gxpcic.c,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -r1.7 -r1.8
--- src/sys/arch/evbarm/gumstix/gxpcic.c 15 Dec 2007 00:39:15 -0000
1.7
+++ src/sys/arch/evbarm/gumstix/gxpcic.c 11 May 2008 08:23:17 -0000
1.8
@@ -1,4 +1,4 @@
-/* $NetBSD: gxpcic.c,v 1.7 2007/12/15 00:39:15 perry Exp $ */
+/* $NetBSD: gxpcic.c,v 1.8 2008/05/11 08:23:17 kiyohara Exp $ */
/*
* Copyright (C) 2005, 2006 WIDE Project and SOUM Corporation.
* All rights reserved.
@@ -100,8 +100,8 @@
#define GXIO_GPIRQ36_CD2 36
-static int gxpcic_match(struct device *, struct cfdata *, void *);
-static void gxpcic_attach(struct device *, struct device *, void *);
+static int gxpcic_match(device_t, struct cfdata *, void *);
+static void gxpcic_attach(device_t, device_t, void *);
static void gxpcic_pcic_socket_setup(struct pxapcic_socket *);
static u_int gxpcic_read(struct pxapcic_socket *, int);
@@ -137,7 +137,7 @@
static int
-gxpcic_match(struct device *parent, struct cfdata *cf, void *aux)
+gxpcic_match(device_t parent, struct cfdata *cf, void *aux)
{
struct pxa2x0_gpioconf *gpioconf;
u_int reg;
@@ -160,9 +160,9 @@
}
static void
-gxpcic_attach(struct device *parent, struct device *self, void *aux)
+gxpcic_attach(device_t parent, device_t self, void *aux)
{
- struct pxapcic_softc *sc = (struct pxapcic_softc *)self;
+ struct pxapcic_softc *sc = device_private(self);
struct pxaip_attach_args *pxa = (struct pxaip_attach_args *)aux;
int nslot, i;
Index: src/sys/arch/evbarm/gumstix/if_sm_gxio.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/gumstix/if_sm_gxio.c,v
retrieving revision 1.4
retrieving revision 1.6
diff -u -r1.4 -r1.6
--- src/sys/arch/evbarm/gumstix/if_sm_gxio.c 17 Oct 2007 19:54:12 -0000
1.4
+++ src/sys/arch/evbarm/gumstix/if_sm_gxio.c 11 May 2008 08:23:17 -0000
1.6
@@ -1,4 +1,4 @@
-/* $NetBSD: if_sm_gxio.c,v 1.4 2007/10/17 19:54:12 garbled Exp $ */
+/* $NetBSD: if_sm_gxio.c,v 1.6 2008/05/11 08:23:17 kiyohara Exp $ */
/*
* Copyright (C) 2005, 2006 WIDE Project and SOUM Corporation.
* All rights reserved.
@@ -46,13 +46,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -68,7 +61,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_sm_gxio.c,v 1.4 2007/10/17 19:54:12 garbled Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: if_sm_gxio.c,v 1.6 2008/05/11 08:23:17 kiyohara
Exp $");
#include <sys/param.h>
#include <sys/device.h>
@@ -100,8 +93,8 @@
#include "locators.h"
-static int sm_gxio_match(struct device *, struct cfdata *, void *);
-static void sm_gxio_attach(struct device *, struct device *, void *);
+static int sm_gxio_match(device_t, struct cfdata *, void *);
+static void sm_gxio_attach(device_t, device_t, void *);
static int ether_serial_digit = 1;
@@ -116,7 +109,7 @@
/* ARGSUSED */
static int
-sm_gxio_match(struct device *parent, struct cfdata *match, void *aux)
+sm_gxio_match(device_t parent, struct cfdata *match, void *aux)
{
struct gxio_attach_args *gxa = aux;
bus_space_tag_t iot = gxa->gxa_iot;
@@ -172,7 +165,7 @@
/* ARGSUSED */
void
-sm_gxio_attach(struct device *parent, struct device *self, void *aux)
+sm_gxio_attach(device_t parent, device_t self, void *aux)
{
struct sm_gxio_softc *gsc = device_private(self);
struct smc91cxx_softc *sc = &gsc->sc_smc;
@@ -210,6 +203,6 @@
gxa->gxa_gpirq, IST_EDGE_RISING, IPL_NET, smc91cxx_intr, sc);
if (gsc->sc_ih == NULL)
- aprint_error("%s: couldn't establish interrupt handler\n",
- sc->sc_dev.dv_xname);
+ aprint_error_dev(self,
+ "couldn't establish interrupt handler\n");
}
Index: src/sys/arch/evbarm/hdl_g/com_obio.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/hdl_g/com_obio.c,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -r1.3 -r1.4
--- src/sys/arch/evbarm/hdl_g/com_obio.c 14 Mar 2008 15:09:09 -0000
1.3
+++ src/sys/arch/evbarm/hdl_g/com_obio.c 28 Apr 2008 20:23:16 -0000
1.4
@@ -1,4 +1,4 @@
-/* $NetBSD: com_obio.c,v 1.3 2008/03/14 15:09:09 cube Exp $ */
+/* $NetBSD: com_obio.c,v 1.4 2008/04/28 20:23:16 martin Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -37,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: com_obio.c,v 1.3 2008/03/14 15:09:09 cube Exp $");
+__KERNEL_RCSID(0, "$NetBSD: com_obio.c,v 1.4 2008/04/28 20:23:16 martin Exp
$");
#include <sys/param.h>
#include <sys/systm.h>
Index: src/sys/arch/evbarm/hdl_g/hdlg_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/hdl_g/hdlg_machdep.c,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -r1.5 -r1.6
--- src/sys/arch/evbarm/hdl_g/hdlg_machdep.c 19 Jan 2008 13:11:15 -0000
1.5
+++ src/sys/arch/evbarm/hdl_g/hdlg_machdep.c 27 Apr 2008 18:58:46 -0000
1.6
@@ -1,4 +1,4 @@
-/* $NetBSD: hdlg_machdep.c,v 1.5 2008/01/19 13:11:15 chris Exp $ */
+/* $NetBSD: hdlg_machdep.c,v 1.6 2008/04/27 18:58:46 matt Exp $ */
/*
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
@@ -73,7 +73,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: hdlg_machdep.c,v 1.5 2008/01/19 13:11:15 chris Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: hdlg_machdep.c,v 1.6 2008/04/27 18:58:46 matt Exp
$");
#include "opt_ddb.h"
#include "opt_kgdb.h"
@@ -160,7 +160,6 @@
#endif /* !PMAP_STATIC_L1S */
/* Physical and virtual addresses for some global pages */
-pv_addr_t systempage;
pv_addr_t irqstack;
pv_addr_t undstack;
pv_addr_t abtstack;
@@ -266,7 +265,6 @@
int loop;
int loop1;
u_int l1pagetable;
- pv_addr_t kernel_l1pt;
paddr_t memstart;
psize_t memsize;
@@ -385,8 +383,6 @@
memset((char *)(var), 0, ((np) * PAGE_SIZE));
loop1 = 0;
- kernel_l1pt.pv_pa = 0;
- kernel_l1pt.pv_va = 0;
for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
/* Are we 16KB aligned for an L1 ? */
if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1))
== 0
@@ -637,8 +633,7 @@
#ifdef VERBOSE_INIT_ARM
printf("pmap ");
#endif
- pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
- KERNEL_VM_BASE + KERNEL_VM_SIZE);
+ pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
/* Setup the IRQ system */
#ifdef VERBOSE_INIT_ARM
Index: src/sys/arch/evbarm/ifpga/ifpga.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/ifpga/ifpga.c,v
retrieving revision 1.21
retrieving revision 1.22
diff -u -r1.21 -r1.22
--- src/sys/arch/evbarm/ifpga/ifpga.c 11 Dec 2005 12:17:09 -0000 1.21
+++ src/sys/arch/evbarm/ifpga/ifpga.c 27 Apr 2008 18:58:46 -0000 1.22
@@ -1,4 +1,4 @@
-/* $NetBSD: ifpga.c,v 1.21 2005/12/11 12:17:09 christos Exp $ */
+/* $NetBSD: ifpga.c,v 1.22 2008/04/27 18:58:46 matt Exp $ */
/*
* Copyright (c) 2001 ARM Ltd
@@ -38,8 +38,9 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ifpga.c,v 1.21 2005/12/11 12:17:09 christos Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: ifpga.c,v 1.22 2008/04/27 18:58:46 matt Exp $");
+#include <sys/param.h>
#include <sys/types.h>
#include <sys/device.h>
#include <sys/systm.h>
@@ -50,8 +51,6 @@
#include <dev/pci/pcivar.h>
#include <dev/pci/pciconf.h>
-#include <machine/intr.h>
-
#include <arm/cpufunc.h>
#include "opt_pci.h"
Index: src/sys/arch/evbarm/ifpga/ifpga_intr.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/ifpga/ifpga_intr.c,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -r1.7 -r1.8
--- src/sys/arch/evbarm/ifpga/ifpga_intr.c 6 Jan 2008 01:37:57 -0000
1.7
+++ src/sys/arch/evbarm/ifpga/ifpga_intr.c 27 Apr 2008 18:58:46 -0000
1.8
@@ -1,4 +1,4 @@
-/* $NetBSD: ifpga_intr.c,v 1.7 2008/01/06 01:37:57 matt Exp $ */
+/* $NetBSD: ifpga_intr.c,v 1.8 2008/04/27 18:58:46 matt Exp $ */
/*
* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
@@ -62,9 +62,6 @@
/* Interrupts to mask at each level. */
int ifpga_imask[NIPL];
-/* Current interrupt priority level. */
-volatile int current_spl_level;
-
/* Interrupts pending. */
volatile int ifpga_ipending;
@@ -74,32 +71,6 @@
/* Mask if interrupts steered to FIQs. */
uint32_t intr_steer;
-#ifdef __HAVE_FAST_SOFTINTS
-/*
- * Map a software interrupt queue index (to the unused bits in the
- * ICU registers -- XXX will need to revisit this if those bits are
- * ever used in future steppings).
- */
-static const uint32_t si_to_irqbit[] = {
- [SI_SOFTCLOCK] = IFPGA_INTR_bit31,
- [SI_SOFTBIO] = IFPGA_INTR_bit30,
- [SI_SOFTNET] = IFPGA_INTR_bit29,
- [SI_SOFTSERIAL] = IFPGA_INTR_bit28,
-};
-
-#define SI_TO_IRQBIT(si) (si_to_irqbit[(si)])
-
-/*
- * Map a software interrupt queue to an interrupt priority level.
- */
-static const int si_to_ipl[] = {
- [SI_SOFTCLOCK] = IPL_SOFTCLOCK,
- [SI_SOFTBIO] = IPL_SOFTBIO,
- [SI_SOFTNET] = IPL_SOFTNET,
- [SI_SOFTSERIAL] = IPL_SOFTSERIAL,
-};
-#endif
-
/*
* Interrupt bit names.
*/
@@ -198,25 +169,12 @@
KASSERT(ifpga_imask[IPL_NONE] == 0);
-#ifdef __HAVE_FAST_SOFTINTS
- /*
- * Initialize the soft interrupt masks to block themselves.
- */
- ifpga_imask[IPL_SOFTCLOCK] = SI_TO_IRQBIT(SI_SOFTCLOCK);
- ifpga_imask[IPL_SOFTBIO] = SI_TO_IRQBIT(SI_SOFTBIO);
- ifpga_imask[IPL_SOFTNET] = SI_TO_IRQBIT(SI_SOFTNET);
- ifpga_imask[IPL_SOFTSERIAL] = SI_TO_IRQBIT(SI_SOFTSERIAL);
-#endif
-
/*
* Enforce a hierarchy that gives "slow" device (or devices with
* limited input buffer space/"real-time" requirements) a better
* chance at not dropping data.
*/
- ifpga_imask[IPL_SOFTBIO] |= ifpga_imask[IPL_SOFTCLOCK];
- ifpga_imask[IPL_SOFTNET] |= ifpga_imask[IPL_SOFTBIO];
- ifpga_imask[IPL_SOFTSERIAL] |= ifpga_imask[IPL_SOFTNET];
- ifpga_imask[IPL_VM] |= ifpga_imask[IPL_SOFTSERIAL];
+ ifpga_imask[IPL_VM] |= 0;
ifpga_imask[IPL_SCHED] |= ifpga_imask[IPL_VM];
ifpga_imask[IPL_HIGH] |= ifpga_imask[IPL_SCHED];
@@ -236,41 +194,6 @@
}
}
-#ifdef __HAVE_FAST_SOFTINTS
-void
-ifpga_do_pending(void)
-{
- static __cpu_simple_lock_t processing = __SIMPLELOCK_UNLOCKED;
- int new, oldirqstate;
-
- if (__cpu_simple_lock_try(&processing) == 0)
- return;
-
- new = current_spl_level;
-
- oldirqstate = disable_interrupts(I32_bit);
-
-#define DO_SOFTINT(si)
\
- if ((ifpga_ipending & ~new) & SI_TO_IRQBIT(si)) { \
- ifpga_ipending &= ~SI_TO_IRQBIT(si); \
- current_spl_level |= ifpga_imask[si_to_ipl[(si)]]; \
- restore_interrupts(oldirqstate); \
- softintr_dispatch(si); \
- oldirqstate = disable_interrupts(I32_bit); \
- current_spl_level = new; \
- }
-
- DO_SOFTINT(SI_SOFTSERIAL);
- DO_SOFTINT(SI_SOFTNET);
- DO_SOFTINT(SI_SOFTBIO);
- DO_SOFTINT(SI_SOFTCLOCK);
-
- __cpu_simple_unlock(&processing);
-
- restore_interrupts(oldirqstate);
-}
-#endif
-
void
splx(int new)
{
@@ -292,22 +215,6 @@
return (ifpga_splraise(ipl));
}
-#ifdef __HAVE_FAST_SOFTINTS
-void
-_setsoftintr(int si)
-{
- int oldirqstate;
-
- oldirqstate = disable_interrupts(I32_bit);
- ifpga_ipending |= SI_TO_IRQBIT(si);
- restore_interrupts(oldirqstate);
-
- /* Process unmasked pending soft interrupts. */
- if ((ifpga_ipending & INT_SWMASK) & ~current_spl_level)
- ifpga_do_pending();
-}
-#endif
-
/*
* ifpga_intr_init:
*
@@ -397,12 +304,9 @@
struct intrq *iq;
struct intrhand *ih;
int oldirqstate, pcpl, irq, ibit, hwpend;
- struct cpu_info *ci;
-
- ci = curcpu();
- ci->ci_idepth++;
+ struct cpu_info * const ci = curcpu();
- pcpl = current_spl_level;
+ pcpl = ci->ci_cpl;
hwpend = ifpga_iintsrc_read();
@@ -437,14 +341,14 @@
iq = &intrq[irq];
iq->iq_ev.ev_count++;
uvmexp.intrs++;
- current_spl_level |= iq->iq_mask;
+ ci->ci_cpl |= iq->iq_mask;
oldirqstate = enable_interrupts(I32_bit);
for (ih = TAILQ_FIRST(&iq->iq_list); ih != NULL;
ih = TAILQ_NEXT(ih, ih_list)) {
(void) (*ih->ih_func)(ih->ih_arg ? ih->ih_arg : frame);
}
restore_interrupts(oldirqstate);
- current_spl_level = pcpl;
+ ci->ci_cpl = pcpl;
hwpend |= (ifpga_ipending & IFPGA_INTR_HWMASK) & ~pcpl;
@@ -453,14 +357,7 @@
ifpga_set_intrmask();
}
- ci->ci_idepth--;
-
#ifdef __HAVE_FAST_SOFTINTS
- /* Check for pendings soft intrs. */
- if ((ifpga_ipending & INT_SWMASK) & ~current_spl_level) {
- oldirqstate = enable_interrupts(I32_bit);
- ifpga_do_pending();
- restore_interrupts(oldirqstate);
- }
+ cpu_dosoftints();
#endif
}
Index: src/sys/arch/evbarm/ifpga/ifpga_intr.h
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/ifpga/ifpga_intr.h,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -r1.7 -r1.8
--- src/sys/arch/evbarm/ifpga/ifpga_intr.h 6 Jan 2008 01:37:58 -0000
1.7
+++ src/sys/arch/evbarm/ifpga/ifpga_intr.h 27 Apr 2008 18:58:46 -0000
1.8
@@ -1,4 +1,4 @@
-/* $NetBSD: ifpga_intr.h,v 1.7 2008/01/06 01:37:58 matt Exp $ */
+/* $NetBSD: ifpga_intr.h,v 1.8 2008/04/27 18:58:46 matt Exp $ */
/*
* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
@@ -48,10 +48,6 @@
#include <evbarm/ifpga/ifpgareg.h>
#include <evbarm/ifpga/ifpgavar.h>
-#ifdef __HAVE_FAST_SOFTINTS
-void ifpga_do_pending(void);
-#endif
-
static inline void __attribute__((__unused__))
ifpga_set_intrmask(void)
{
@@ -65,24 +61,17 @@
IFPGA_INTR_ENABLESET, mask);
}
-#ifdef __HAVE_FAST_SOFTINTS
-#define INT_SWMASK \
- (IFPGA_INTR_bit31 | IFPGA_INTR_bit30 | \
- IFPGA_INTR_bit29 | IFPGA_INTR_bit28)
-#endif
-
static inline void __attribute__((__unused__))
ifpga_splx(int new)
{
extern volatile uint32_t intr_enabled;
- extern volatile int current_spl_level;
extern volatile int ifpga_ipending;
int oldirqstate, hwpend;
__insn_barrier();
oldirqstate = disable_interrupts(I32_bit);
- current_spl_level = new;
+ set_curcpl(new);
hwpend = (ifpga_ipending & IFPGA_INTR_HWMASK) & ~new;
if (hwpend != 0) {
@@ -93,20 +82,16 @@
restore_interrupts(oldirqstate);
#ifdef __HAVE_FAST_SOFTINTS
- if ((ifpga_ipending & INT_SWMASK) & ~new)
- ifpga_do_pending();
+ cpu_dosoftints();
#endif
}
static inline int __attribute__((__unused__))
ifpga_splraise(int ipl)
{
- extern volatile int current_spl_level;
extern int ifpga_imask[];
- int old;
-
- old = current_spl_level;
- current_spl_level = old | ifpga_imask[ipl];
+ const int old = curcpl();
+ set_curcpl(old | ifpga_imask[ipl]);
__insn_barrier();
@@ -116,9 +101,8 @@
static inline int __attribute__((__unused__))
ifpga_spllower(int ipl)
{
- extern volatile int current_spl_level;
extern int ifpga_imask[];
- int old = current_spl_level;
+ const int old = curcpl();
ifpga_splx(ifpga_imask[ipl]);
return(old);
@@ -129,18 +113,12 @@
#define splx(new) ifpga_splx(new)
#define _spllower(ipl) ifpga_spllower(ipl)
#define _splraise(ipl) ifpga_splraise(ipl)
-#ifdef __HAVE_FAST_SOFTINTS
-void _setsoftintr(int);
-#endif
#else
int _splraise(int);
int _spllower(int);
void splx(int);
-#ifdef __HAVE_FAST_SOFTINTS
-void _setsoftintr(int);
-#endif
#endif /* ! EVBARM_SPL_NOINLINE */
Index: src/sys/arch/evbarm/include/autoconf.h
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/include/autoconf.h,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -r1.4 -r1.5
--- src/sys/arch/evbarm/include/autoconf.h 11 Dec 2005 12:17:09 -0000
1.4
+++ src/sys/arch/evbarm/include/autoconf.h 28 Apr 2008 20:23:16 -0000
1.5
@@ -1,4 +1,4 @@
-/* $NetBSD: autoconf.h,v 1.4 2005/12/11 12:17:09 christos Exp $ */
+/* $NetBSD: autoconf.h,v 1.5 2008/04/28 20:23:16 martin Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/evbarm/include/intr.h
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/include/intr.h,v
retrieving revision 1.19
retrieving revision 1.20
diff -u -r1.19 -r1.20
--- src/sys/arch/evbarm/include/intr.h 6 Jan 2008 01:37:58 -0000 1.19
+++ src/sys/arch/evbarm/include/intr.h 27 Apr 2008 18:58:46 -0000 1.20
@@ -1,4 +1,4 @@
-/* $NetBSD: intr.h,v 1.19 2008/01/06 01:37:58 matt Exp $ */
+/* $NetBSD: intr.h,v 1.20 2008/04/27 18:58:46 matt Exp $ */
/*
* Copyright (c) 2001, 2003 Wasabi Systems, Inc.
@@ -71,11 +71,12 @@
#define IST_EDGE 2 /* edge-triggered */
#define IST_LEVEL 3 /* level-triggered */
-#define IST_LEVEL_LOW IST_LEVEL
-#define IST_LEVEL_HIGH 4
+#define IST_LEVEL_LOW IST_LEVEL
+#define IST_LEVEL_HIGH 4
#define IST_EDGE_FALLING IST_EDGE
-#define IST_EDGE_RISING 5
-#define IST_EDGE_BOTH 6
+#define IST_EDGE_RISING 5
+#define IST_EDGE_BOTH 6
+#define IST_SOFT 7
#ifdef __OLD_INTERRUPT_CODE /* XXX XXX XXX */
Index: src/sys/arch/evbarm/include/vmparam.h
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/include/vmparam.h,v
retrieving revision 1.24
retrieving revision 1.25
diff -u -r1.24 -r1.25
--- src/sys/arch/evbarm/include/vmparam.h 25 Oct 2007 13:03:03 -0000
1.24
+++ src/sys/arch/evbarm/include/vmparam.h 27 Apr 2008 18:58:46 -0000
1.25
@@ -1,4 +1,4 @@
-/* $NetBSD: vmparam.h,v 1.24 2007/10/25 13:03:03 yamt Exp $ */
+/* $NetBSD: vmparam.h,v 1.25 2008/04/27 18:58:46 matt Exp $ */
/*
* Copyright (c) 1988 The Regents of the University of California.
@@ -44,7 +44,11 @@
* The line between user space and kernel space
* Mappings >= KERNEL_BASE are constant across all processes
*/
-#define KERNEL_BASE 0xc0000000
+#ifdef KERNEL_BASE_EXT
+#define KERNEL_BASE KERNEL_BASE_EXT
+#else
+#define KERNEL_BASE 0x80000000
+#endif
/*
* Override the default pager_map size, there's not enough KVA.
Index: src/sys/arch/evbarm/integrator/integrator_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/integrator/integrator_machdep.c,v
retrieving revision 1.57
retrieving revision 1.58
diff -u -r1.57 -r1.58
--- src/sys/arch/evbarm/integrator/integrator_machdep.c 19 Jan 2008 13:11:15
-0000 1.57
+++ src/sys/arch/evbarm/integrator/integrator_machdep.c 27 Apr 2008 18:58:46
-0000 1.58
@@ -1,4 +1,4 @@
-/* $NetBSD: integrator_machdep.c,v 1.57 2008/01/19 13:11:15 chris Exp $
*/
+/* $NetBSD: integrator_machdep.c,v 1.58 2008/04/27 18:58:46 matt Exp $
*/
/*
* Copyright (c) 2001,2002 ARM Ltd
@@ -68,7 +68,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: integrator_machdep.c,v 1.57 2008/01/19 13:11:15
chris Exp $");
+__KERNEL_RCSID(0, "$NetBSD: integrator_machdep.c,v 1.58 2008/04/27 18:58:46
matt Exp $");
#include "opt_ddb.h"
#include "opt_pmap_debug.h"
@@ -146,7 +146,6 @@
#endif /* !PMAP_STATIC_L1S */
/* Physical and virtual addresses for some global pages */
-pv_addr_t systempage;
pv_addr_t irqstack;
pv_addr_t undstack;
pv_addr_t abtstack;
@@ -381,7 +380,6 @@
u_int l1pagetable;
extern char etext __asm ("_etext");
extern char end __asm ("_end");
- pv_addr_t kernel_l1pt;
paddr_t memstart;
psize_t memsize;
vm_offset_t physical_freestart;
@@ -520,8 +518,6 @@
memset((char *)(var), 0, ((np) * PAGE_SIZE));
loop1 = 0;
- kernel_l1pt.pv_pa = 0;
- kernel_l1pt.pv_va = 0;
for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
/* Are we 16KB aligned for an L1 ? */
if ((physical_freestart & (L1_TABLE_SIZE - 1)) == 0
@@ -768,8 +764,7 @@
#ifdef VERBOSE_INIT_ARM
printf("pmap ");
#endif
- pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
- KERNEL_VM_BASE + KERNEL_VM_SIZE);
+ pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
/* Setup the IRQ system */
#ifdef VERBOSE_INIT_ARM
Index: src/sys/arch/evbarm/integrator/pci_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/integrator/pci_machdep.c,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -r1.3 -r1.4
--- src/sys/arch/evbarm/integrator/pci_machdep.c 11 Dec 2005 12:17:09
-0000 1.3
+++ src/sys/arch/evbarm/integrator/pci_machdep.c 27 Apr 2008 18:58:46
-0000 1.4
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_machdep.c,v 1.3 2005/12/11 12:17:09 christos Exp $ */
+/* $NetBSD: pci_machdep.c,v 1.4 2008/04/27 18:58:46 matt Exp $ */
/*-
* Copyright (c) 2001 ARM Ltd
@@ -30,11 +30,13 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.3 2005/12/11 12:17:09 christos
Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.4 2008/04/27 18:58:46 matt Exp
$");
+#include <sys/param.h>
#include <sys/types.h>
#include <sys/device.h>
#include <sys/systm.h>
+#include <sys/cpu.h>
#include <sys/extent.h>
#include <dev/pci/pcivar.h>
Index: src/sys/arch/evbarm/iq31244/iq31244reg.h
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/iq31244/iq31244reg.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- src/sys/arch/evbarm/iq31244/iq31244reg.h 11 Dec 2005 12:17:09 -0000
1.2
+++ src/sys/arch/evbarm/iq31244/iq31244reg.h 28 Apr 2008 20:23:16 -0000
1.3
@@ -1,4 +1,4 @@
-/* $NetBSD: iq31244reg.h,v 1.2 2005/12/11 12:17:09 christos Exp $ */
+/* $NetBSD: iq31244reg.h,v 1.3 2008/04/28 20:23:16 martin Exp $ */
/*-
* Copyright (c) 2005 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/evbarm/iq31244/wdc_obio.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/iq31244/wdc_obio.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -r1.4 -r1.5
--- src/sys/arch/evbarm/iq31244/wdc_obio.c 18 Mar 2008 20:46:35 -0000
1.4
+++ src/sys/arch/evbarm/iq31244/wdc_obio.c 28 Apr 2008 20:23:16 -0000
1.5
@@ -1,4 +1,4 @@
-/* $NetBSD: wdc_obio.c,v 1.4 2008/03/18 20:46:35 cube Exp $ */
+/* $NetBSD: wdc_obio.c,v 1.5 2008/04/28 20:23:16 martin Exp $ */
/*-
* Copyright (c) 1998, 2003, 2005 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -37,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: wdc_obio.c,v 1.4 2008/03/18 20:46:35 cube Exp $");
+__KERNEL_RCSID(0, "$NetBSD: wdc_obio.c,v 1.5 2008/04/28 20:23:16 martin Exp
$");
#include <sys/param.h>
#include <sys/systm.h>
Index: src/sys/arch/evbarm/iq80310/com_obio.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/iq80310/com_obio.c,v
retrieving revision 1.12
retrieving revision 1.13
diff -u -r1.12 -r1.13
--- src/sys/arch/evbarm/iq80310/com_obio.c 14 Mar 2008 15:09:09 -0000
1.12
+++ src/sys/arch/evbarm/iq80310/com_obio.c 28 Apr 2008 20:23:16 -0000
1.13
@@ -1,4 +1,4 @@
-/* $NetBSD: com_obio.c,v 1.12 2008/03/14 15:09:09 cube Exp $ */
+/* $NetBSD: com_obio.c,v 1.13 2008/04/28 20:23:16 martin Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -37,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: com_obio.c,v 1.12 2008/03/14 15:09:09 cube Exp $");
+__KERNEL_RCSID(0, "$NetBSD: com_obio.c,v 1.13 2008/04/28 20:23:16 martin Exp
$");
#include <sys/param.h>
#include <sys/systm.h>
Index: src/sys/arch/evbarm/iq80310/iq80310_intr.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/iq80310/iq80310_intr.c,v
retrieving revision 1.25
retrieving revision 1.26
diff -u -r1.25 -r1.26
--- src/sys/arch/evbarm/iq80310/iq80310_intr.c 6 Jan 2008 01:37:58 -0000
1.25
+++ src/sys/arch/evbarm/iq80310/iq80310_intr.c 27 Apr 2008 18:58:46 -0000
1.26
@@ -1,4 +1,4 @@
-/* $NetBSD: iq80310_intr.c,v 1.25 2008/01/06 01:37:58 matt Exp $ */
+/* $NetBSD: iq80310_intr.c,v 1.26 2008/04/27 18:58:46 matt Exp $ */
/*
* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
@@ -36,7 +36,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: iq80310_intr.c,v 1.25 2008/01/06 01:37:58 matt Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: iq80310_intr.c,v 1.26 2008/04/27 18:58:46 matt Exp
$");
#ifndef EVBARM_SPL_NOINLINE
#define EVBARM_SPL_NOINLINE
@@ -70,9 +70,6 @@
/* Interrupts to mask at each level. */
int iq80310_imask[NIPL];
-/* Current interrupt priority level. */
-volatile int current_spl_level;
-
/* Interrupts pending. */
volatile int iq80310_ipending;
@@ -257,23 +254,24 @@
iq80310_do_soft(void)
{
static __cpu_simple_lock_t processing = __SIMPLELOCK_UNLOCKED;
+ struct cpu_info * const ci = curcpu();
int new, oldirqstate;
if (__cpu_simple_lock_try(&processing) == 0)
return;
- new = current_spl_level;
+ new = ci->ci_cpl;
oldirqstate = disable_interrupts(I32_bit);
#define DO_SOFTINT(si)
\
if ((iq80310_ipending & ~new) & SI_TO_IRQBIT(si)) { \
iq80310_ipending &= ~SI_TO_IRQBIT(si); \
- current_spl_level |= iq80310_imask[si_to_ipl[(si)]]; \
+ ci->ci_cpl |= iq80310_imask[si_to_ipl[(si)]]; \
restore_interrupts(oldirqstate); \
softintr_dispatch(si); \
oldirqstate = disable_interrupts(I32_bit); \
- current_spl_level = new; \
+ ci->ci_cpl = new; \
}
DO_SOFTINT(SI_SOFTSERIAL);
@@ -319,7 +317,7 @@
restore_interrupts(oldirqstate);
/* Process unmasked pending soft interrupts. */
- if ((iq80310_ipending & ~IRQ_BITS) & ~current_spl_level)
+ if ((iq80310_ipending & ~IRQ_BITS) & ~curcpl())
iq80310_do_soft();
}
#endif
@@ -413,13 +411,14 @@
struct intrq *iq;
struct intrhand *ih;
int oldirqstate, pcpl, irq, ibit, hwpend, rv, stray;
+ struct cpu_info * const ci = curcpu();
stray = 1;
/* First, disable external IRQs. */
i80200_intr_disable(INTCTL_IM | INTCTL_PM);
- pcpl = current_spl_level;
+ pcpl = ci->ci_cpl;
for (hwpend = iq80310_intstat_read(); hwpend != 0;) {
irq = ffs(hwpend) - 1;
@@ -445,7 +444,7 @@
iq = &intrq[irq];
iq->iq_ev.ev_count++;
uvmexp.intrs++;
- current_spl_level |= iq->iq_mask;
+ ci->ci_cpl |= iq->iq_mask;
oldirqstate = enable_interrupts(I32_bit);
for (ih = TAILQ_FIRST(&iq->iq_list); ih != NULL;
ih = TAILQ_NEXT(ih, ih_list)) {
@@ -453,7 +452,7 @@
}
restore_interrupts(oldirqstate);
- current_spl_level = pcpl;
+ ci->ci_cpl = pcpl;
#if 0 /* XXX */
if (rv == 0)
@@ -466,9 +465,9 @@
printf("Stray external interrupt\n");
#endif
-#if 0
+#ifdef __HAVE_FAST_SOFTINTS
/* Check for pendings soft intrs. */
- if ((iq80310_ipending & ~IRQ_BITS) & ~current_spl_level) {
+ if ((iq80310_ipending & ~IRQ_BITS) & ~ci->ci_cpl) {
oldirqstate = enable_interrupts(I32_bit);
iq80310_do_soft();
restore_interrupts(oldirqstate);
Index: src/sys/arch/evbarm/iq80310/iq80310_intr.h
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/iq80310/iq80310_intr.h,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -r1.6 -r1.7
--- src/sys/arch/evbarm/iq80310/iq80310_intr.h 6 Jan 2008 01:37:58 -0000
1.6
+++ src/sys/arch/evbarm/iq80310/iq80310_intr.h 27 Apr 2008 18:58:46 -0000
1.7
@@ -1,4 +1,4 @@
-/* $NetBSD: iq80310_intr.h,v 1.6 2008/01/06 01:37:58 matt Exp $ */
+/* $NetBSD: iq80310_intr.h,v 1.7 2008/04/27 18:58:46 matt Exp $ */
/*
* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
@@ -73,12 +73,11 @@
static inline int __attribute__((__unused__))
iq80310_splraise(int ipl)
{
- extern volatile int current_spl_level;
extern int iq80310_imask[];
int old;
- old = current_spl_level;
- current_spl_level |= iq80310_imask[ipl];
+ old = curcpl();
+ set_curcpl(old | iq80310_imask[ipl]);
/* Don't let the compiler re-order this code with subsequent code */
__insn_barrier();
@@ -90,14 +89,13 @@
iq80310_splx(int new)
{
extern volatile int iq80310_ipending;
- extern volatile int current_spl_level;
int old;
/* Don't let the compiler re-order this code with preceding code */
__insn_barrier();
- old = current_spl_level;
- current_spl_level = new;
+ old = curcpl();
+ set_curcpl(new);
#ifdef __HAVE_FAST_SOFTINTS
/* If there are software interrupts to process, do it. */
@@ -122,9 +120,8 @@
static inline int __attribute__((__unused__))
iq80310_spllower(int ipl)
{
- extern volatile int current_spl_level;
extern int iq80310_imask[];
- int old = current_spl_level;
+ const int old = curcpl();
iq80310_splx(iq80310_imask[ipl]);
return (old);
Index: src/sys/arch/evbarm/iq80310/iq80310_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/iq80310/iq80310_machdep.c,v
retrieving revision 1.69
retrieving revision 1.70
diff -u -r1.69 -r1.70
--- src/sys/arch/evbarm/iq80310/iq80310_machdep.c 19 Jan 2008 13:11:15
-0000 1.69
+++ src/sys/arch/evbarm/iq80310/iq80310_machdep.c 27 Apr 2008 18:58:46
-0000 1.70
@@ -1,4 +1,4 @@
-/* $NetBSD: iq80310_machdep.c,v 1.69 2008/01/19 13:11:15 chris Exp $
*/
+/* $NetBSD: iq80310_machdep.c,v 1.70 2008/04/27 18:58:46 matt Exp $
*/
/*
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
@@ -73,7 +73,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: iq80310_machdep.c,v 1.69 2008/01/19 13:11:15 chris
Exp $");
+__KERNEL_RCSID(0, "$NetBSD: iq80310_machdep.c,v 1.70 2008/04/27 18:58:46 matt
Exp $");
#include "opt_ddb.h"
#include "opt_pmap_debug.h"
@@ -157,7 +157,6 @@
#endif /* !PMAP_STATIC_L1S */
/* Physical and virtual addresses for some global pages */
-pv_addr_t systempage;
pv_addr_t irqstack;
pv_addr_t undstack;
pv_addr_t abtstack;
@@ -351,7 +350,6 @@
int loop;
int loop1;
u_int l1pagetable;
- pv_addr_t kernel_l1pt;
paddr_t memstart;
psize_t memsize;
@@ -502,8 +500,6 @@
memset((char *)(var), 0, ((np) * PAGE_SIZE));
loop1 = 0;
- kernel_l1pt.pv_pa = 0;
- kernel_l1pt.pv_va = 0;
for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
/* Are we 16KB aligned for an L1 ? */
if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1))
== 0
@@ -754,8 +750,7 @@
#ifdef VERBOSE_INIT_ARM
printf("pmap ");
#endif
- pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
- KERNEL_VM_BASE + KERNEL_VM_SIZE);
+ pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
/* Setup the IRQ system */
#ifdef VERBOSE_INIT_ARM
Index: src/sys/arch/evbarm/iq80321/com_obio.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/iq80321/com_obio.c,v
retrieving revision 1.11
retrieving revision 1.12
diff -u -r1.11 -r1.12
--- src/sys/arch/evbarm/iq80321/com_obio.c 14 Mar 2008 15:09:09 -0000
1.11
+++ src/sys/arch/evbarm/iq80321/com_obio.c 28 Apr 2008 20:23:17 -0000
1.12
@@ -1,4 +1,4 @@
-/* $NetBSD: com_obio.c,v 1.11 2008/03/14 15:09:09 cube Exp $ */
+/* $NetBSD: com_obio.c,v 1.12 2008/04/28 20:23:17 martin Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -37,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: com_obio.c,v 1.11 2008/03/14 15:09:09 cube Exp $");
+__KERNEL_RCSID(0, "$NetBSD: com_obio.c,v 1.12 2008/04/28 20:23:17 martin Exp
$");
#include <sys/param.h>
#include <sys/systm.h>
Index: src/sys/arch/evbarm/iq80321/iq80321_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/iq80321/iq80321_machdep.c,v
retrieving revision 1.38
retrieving revision 1.39
diff -u -r1.38 -r1.39
--- src/sys/arch/evbarm/iq80321/iq80321_machdep.c 19 Jan 2008 13:11:15
-0000 1.38
+++ src/sys/arch/evbarm/iq80321/iq80321_machdep.c 27 Apr 2008 18:58:46
-0000 1.39
@@ -1,4 +1,4 @@
-/* $NetBSD: iq80321_machdep.c,v 1.38 2008/01/19 13:11:15 chris Exp $
*/
+/* $NetBSD: iq80321_machdep.c,v 1.39 2008/04/27 18:58:46 matt Exp $
*/
/*
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
@@ -73,7 +73,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: iq80321_machdep.c,v 1.38 2008/01/19 13:11:15 chris
Exp $");
+__KERNEL_RCSID(0, "$NetBSD: iq80321_machdep.c,v 1.39 2008/04/27 18:58:46 matt
Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
@@ -161,7 +161,6 @@
#endif /* !PMAP_STATIC_L1S */
/* Physical and virtual addresses for some global pages */
-pv_addr_t systempage;
pv_addr_t irqstack;
pv_addr_t undstack;
pv_addr_t abtstack;
@@ -390,7 +389,6 @@
int loop;
int loop1;
u_int l1pagetable;
- pv_addr_t kernel_l1pt;
paddr_t memstart;
psize_t memsize;
@@ -767,8 +765,7 @@
#ifdef VERBOSE_INIT_ARM
printf("pmap ");
#endif
- pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
- KERNEL_VM_BASE + KERNEL_VM_SIZE);
+ pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
/* Setup the IRQ system */
#ifdef VERBOSE_INIT_ARM
Index: src/sys/arch/evbarm/ixdp425/ixdp425_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/ixdp425/ixdp425_machdep.c,v
retrieving revision 1.16
retrieving revision 1.17
diff -u -r1.16 -r1.17
--- src/sys/arch/evbarm/ixdp425/ixdp425_machdep.c 19 Jan 2008 13:11:15
-0000 1.16
+++ src/sys/arch/evbarm/ixdp425/ixdp425_machdep.c 27 Apr 2008 18:58:46
-0000 1.17
@@ -1,4 +1,4 @@
-/* $NetBSD: ixdp425_machdep.c,v 1.16 2008/01/19 13:11:15 chris Exp $ */
+/* $NetBSD: ixdp425_machdep.c,v 1.17 2008/04/27 18:58:46 matt Exp $ */
/*
* Copyright (c) 2003
* Ichiro FUKUHARA <ichiro%ichiro.org@localhost>.
@@ -70,7 +70,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ixdp425_machdep.c,v 1.16 2008/01/19 13:11:15 chris
Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ixdp425_machdep.c,v 1.17 2008/04/27 18:58:46 matt
Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
@@ -154,7 +154,6 @@
int physmem = 0;
/* Physical and virtual addresses for some global pages */
-pv_addr_t systempage;
pv_addr_t irqstack;
pv_addr_t undstack;
pv_addr_t abtstack;
@@ -411,7 +410,6 @@
u_int kerneldatasize;
u_int l1pagetable;
u_int freemempos;
- pv_addr_t kernel_l1pt;
/*
* Since we map v0xf0000000 == p0xc8000000, it's possible for
@@ -500,8 +498,6 @@
#endif
loop1 = 0;
- kernel_l1pt.pv_pa = 0;
- kernel_l1pt.pv_va = 0;
for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
/* Are we 16KB aligned for an L1 ? */
if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1))
== 0
@@ -751,8 +747,7 @@
#ifdef VERBOSE_INIT_ARM
printf("pmap ");
#endif
- pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
- KERNEL_VM_BASE + KERNEL_VM_SIZE);
+ pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
/* Setup the IRQ system */
#ifdef VERBOSE_INIT_ARM
Index: src/sys/arch/evbarm/ixm1200/ixm1200_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/ixm1200/ixm1200_machdep.c,v
retrieving revision 1.33
retrieving revision 1.34
diff -u -r1.33 -r1.34
--- src/sys/arch/evbarm/ixm1200/ixm1200_machdep.c 19 Jan 2008 13:11:16
-0000 1.33
+++ src/sys/arch/evbarm/ixm1200/ixm1200_machdep.c 27 Apr 2008 18:58:46
-0000 1.34
@@ -1,4 +1,4 @@
-/* $NetBSD: ixm1200_machdep.c,v 1.33 2008/01/19 13:11:16 chris Exp $ */
+/* $NetBSD: ixm1200_machdep.c,v 1.34 2008/04/27 18:58:46 matt Exp $ */
/*
* Copyright (c) 2002, 2003
@@ -67,7 +67,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ixm1200_machdep.c,v 1.33 2008/01/19 13:11:16 chris
Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ixm1200_machdep.c,v 1.34 2008/04/27 18:58:46 matt
Exp $");
#include "opt_ddb.h"
#include "opt_pmap_debug.h"
@@ -176,7 +176,6 @@
#endif /* !PMAP_STATIC_L1S */
/* Physical and virtual addresses for some global pages */
-pv_addr_t systempage;
pv_addr_t irqstack;
pv_addr_t undstack;
pv_addr_t abtstack;
@@ -358,7 +357,6 @@
u_int kerneldatasize, symbolsize;
vaddr_t l1pagetable;
vaddr_t freemempos;
- pv_addr_t kernel_l1pt;
#if NKSYMS || defined(DDB) || defined(LKM)
Elf_Shdr *sh;
#endif
@@ -447,8 +445,6 @@
freemempos += (np) * PAGE_SIZE;
loop1 = 0;
- kernel_l1pt.pv_pa = 0;
- kernel_l1pt.pv_va = 0;
for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
/* Are we 16KB aligned for an L1 ? */
if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1))
== 0
@@ -712,8 +708,7 @@
#ifdef VERBOSE_INIT_ARM
printf("pmap ");
#endif
- pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
- KERNEL_VM_BASE + KERNEL_VM_SIZE);
+ pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
/* Setup the IRQ system */
#ifdef VERBOSE_INIT_ARM
Index: src/sys/arch/evbarm/ixm1200/ixm1200_start.S
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/ixm1200/ixm1200_start.S,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- src/sys/arch/evbarm/ixm1200/ixm1200_start.S 21 Jul 2002 14:26:05 -0000
1.2
+++ src/sys/arch/evbarm/ixm1200/ixm1200_start.S 28 Apr 2008 20:23:17 -0000
1.3
@@ -1,4 +1,4 @@
-/* $NetBSD: ixm1200_start.S,v 1.2 2002/07/21 14:26:05 ichiro Exp $ */
+/* $NetBSD: ixm1200_start.S,v 1.3 2008/04/28 20:23:17 martin Exp $ */
/*
* Copyright (c) 2002 The NetBSD Foundation, Inc.
@@ -18,13 +18,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/evbarm/ixm1200/nappi_nr.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/ixm1200/nappi_nr.c,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -r1.7 -r1.8
--- src/sys/arch/evbarm/ixm1200/nappi_nr.c 17 Oct 2007 19:54:13 -0000
1.7
+++ src/sys/arch/evbarm/ixm1200/nappi_nr.c 28 Apr 2008 20:23:17 -0000
1.8
@@ -1,4 +1,4 @@
-/* $NetBSD: nappi_nr.c,v 1.7 2007/10/17 19:54:13 garbled Exp $ */
+/* $NetBSD: nappi_nr.c,v 1.8 2008/04/28 20:23:17 martin Exp $ */
/*
* Copyright (c) 2002 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -37,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: nappi_nr.c,v 1.7 2007/10/17 19:54:13 garbled Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: nappi_nr.c,v 1.8 2008/04/28 20:23:17 martin Exp
$");
/*
* LED support for NAPPI.
Index: src/sys/arch/evbarm/lubbock/if_sm_obio.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/lubbock/if_sm_obio.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- src/sys/arch/evbarm/lubbock/if_sm_obio.c 18 Jun 2003 10:51:15 -0000
1.1
+++ src/sys/arch/evbarm/lubbock/if_sm_obio.c 28 Apr 2008 20:23:17 -0000
1.2
@@ -1,4 +1,4 @@
-/* $NetBSD: if_sm_obio.c,v 1.1 2003/06/18 10:51:15 bsh Exp $ */
+/* $NetBSD: if_sm_obio.c,v 1.2 2008/04/28 20:23:17 martin Exp $ */
/*
* Copyright (c) 2002, 2003 Genetec Corporation. All rights reserved.
@@ -49,13 +49,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -71,7 +64,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_sm_obio.c,v 1.1 2003/06/18 10:51:15 bsh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_sm_obio.c,v 1.2 2008/04/28 20:23:17 martin Exp
$");
#include <sys/param.h>
#include <sys/systm.h>
Index: src/sys/arch/evbarm/lubbock/lubbock_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/lubbock/lubbock_machdep.c,v
retrieving revision 1.17
retrieving revision 1.18
diff -u -r1.17 -r1.18
--- src/sys/arch/evbarm/lubbock/lubbock_machdep.c 19 Jan 2008 13:11:16
-0000 1.17
+++ src/sys/arch/evbarm/lubbock/lubbock_machdep.c 27 Apr 2008 18:58:46
-0000 1.18
@@ -1,4 +1,4 @@
-/* $NetBSD: lubbock_machdep.c,v 1.17 2008/01/19 13:11:16 chris Exp $ */
+/* $NetBSD: lubbock_machdep.c,v 1.18 2008/04/27 18:58:46 matt Exp $ */
/*
* Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved.
@@ -112,7 +112,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: lubbock_machdep.c,v 1.17 2008/01/19 13:11:16 chris
Exp $");
+__KERNEL_RCSID(0, "$NetBSD: lubbock_machdep.c,v 1.18 2008/04/27 18:58:46 matt
Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
@@ -442,7 +442,6 @@
int loop;
int loop1;
u_int l1pagetable;
- pv_addr_t kernel_l1pt;
paddr_t memstart;
psize_t memsize;
int led_data = 0;
@@ -934,8 +933,7 @@
/* Boot strap pmap telling it where the kernel page table is */
printf("pmap ");
LEDSTEP();
- pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
- KERNEL_VM_BASE + KERNEL_VM_SIZE);
+ pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
LEDSTEP();
#ifdef __HAVE_MEMORY_DISK__
Index: src/sys/arch/evbarm/lubbock/lubbock_pcic.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/lubbock/lubbock_pcic.c,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -r1.3 -r1.4
--- src/sys/arch/evbarm/lubbock/lubbock_pcic.c 23 Feb 2006 05:37:47 -0000
1.3
+++ src/sys/arch/evbarm/lubbock/lubbock_pcic.c 28 Apr 2008 20:23:17 -0000
1.4
@@ -1,4 +1,4 @@
-/* $NetBSD: lubbock_pcic.c,v 1.3 2006/02/23 05:37:47 thorpej Exp $
*/
+/* $NetBSD: lubbock_pcic.c,v 1.4 2008/04/28 20:23:17 martin Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -37,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: lubbock_pcic.c,v 1.3 2006/02/23 05:37:47 thorpej
Exp $");
+__KERNEL_RCSID(0, "$NetBSD: lubbock_pcic.c,v 1.4 2008/04/28 20:23:17 martin
Exp $");
#include <sys/param.h>
#include <sys/systm.h>
Index: src/sys/arch/evbarm/lubbock/obio.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/lubbock/obio.c,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -r1.7 -r1.8
--- src/sys/arch/evbarm/lubbock/obio.c 8 Jan 2008 02:07:53 -0000 1.7
+++ src/sys/arch/evbarm/lubbock/obio.c 27 Apr 2008 18:58:46 -0000 1.8
@@ -1,4 +1,4 @@
-/* $NetBSD: obio.c,v 1.7 2008/01/08 02:07:53 matt Exp $ */
+/* $NetBSD: obio.c,v 1.8 2008/04/27 18:58:46 matt Exp $ */
/*
* Copyright (c) 2002, 2003 Genetec Corporation. All rights reserved.
@@ -35,7 +35,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: obio.c,v 1.7 2008/01/08 02:07:53 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: obio.c,v 1.8 2008/04/27 18:58:46 matt Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -119,7 +119,7 @@
/* if ipl of this irq is higher than current spl level,
call the handler directly instead of dispatching it
to
software interrupt. */
- if (sc->sc_handler[irqno].level > current_spl_level) {
+ if (sc->sc_handler[irqno].level > curcpl()) {
(* sc->sc_handler[irqno].func)(
sc->sc_handler[irqno].arg );
}
@@ -161,7 +161,7 @@
struct obio_softc *sc = (struct obio_softc *)arg;
int irqno;
int psw;
- int spl_save = current_spl_level;
+ int spl_save = curcpl();
psw = disable_interrupts(I32_bit);
while ((irqno = find_first_bit(sc->sc_obio_intr_pending)) >= 0) {
Index: src/sys/arch/evbarm/lubbock/sacc_obio.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/lubbock/sacc_obio.c,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -r1.7 -r1.8
--- src/sys/arch/evbarm/lubbock/sacc_obio.c 8 Jan 2008 02:07:53 -0000
1.7
+++ src/sys/arch/evbarm/lubbock/sacc_obio.c 28 Apr 2008 20:23:17 -0000
1.8
@@ -1,4 +1,4 @@
-/* $NetBSD: sacc_obio.c,v 1.7 2008/01/08 02:07:53 matt Exp $ */
+/* $NetBSD: sacc_obio.c,v 1.8 2008/04/28 20:23:17 martin Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -41,7 +34,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sacc_obio.c,v 1.7 2008/01/08 02:07:53 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sacc_obio.c,v 1.8 2008/04/28 20:23:17 martin Exp
$");
#include <sys/param.h>
#include <sys/systm.h>
Index: src/sys/arch/evbarm/npwr_fc/com_obio.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/npwr_fc/com_obio.c,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -r1.3 -r1.4
--- src/sys/arch/evbarm/npwr_fc/com_obio.c 14 Mar 2008 15:09:09 -0000
1.3
+++ src/sys/arch/evbarm/npwr_fc/com_obio.c 28 Apr 2008 20:23:17 -0000
1.4
@@ -1,4 +1,4 @@
-/* $NetBSD: com_obio.c,v 1.3 2008/03/14 15:09:09 cube Exp $ */
+/* $NetBSD: com_obio.c,v 1.4 2008/04/28 20:23:17 martin Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -37,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: com_obio.c,v 1.3 2008/03/14 15:09:09 cube Exp $");
+__KERNEL_RCSID(0, "$NetBSD: com_obio.c,v 1.4 2008/04/28 20:23:17 martin Exp
$");
#include <sys/param.h>
#include <sys/systm.h>
Index: src/sys/arch/evbarm/npwr_fc/npwr_fc_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/npwr_fc/npwr_fc_machdep.c,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -r1.5 -r1.6
--- src/sys/arch/evbarm/npwr_fc/npwr_fc_machdep.c 19 Jan 2008 13:11:16
-0000 1.5
+++ src/sys/arch/evbarm/npwr_fc/npwr_fc_machdep.c 27 Apr 2008 18:58:46
-0000 1.6
@@ -1,4 +1,4 @@
-/* $NetBSD: npwr_fc_machdep.c,v 1.5 2008/01/19 13:11:16 chris Exp $
*/
+/* $NetBSD: npwr_fc_machdep.c,v 1.6 2008/04/27 18:58:46 matt Exp $ */
/*
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
@@ -73,7 +73,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: npwr_fc_machdep.c,v 1.5 2008/01/19 13:11:16 chris
Exp $");
+__KERNEL_RCSID(0, "$NetBSD: npwr_fc_machdep.c,v 1.6 2008/04/27 18:58:46 matt
Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
@@ -161,7 +161,6 @@
#endif /* !PMAP_STATIC_L1S */
/* Physical and virtual addresses for some global pages */
-pv_addr_t systempage;
pv_addr_t irqstack;
pv_addr_t undstack;
pv_addr_t abtstack;
@@ -380,7 +379,6 @@
int loop;
int loop1;
u_int l1pagetable;
- pv_addr_t kernel_l1pt;
paddr_t memstart;
psize_t memsize;
@@ -499,8 +497,6 @@
memset((char *)(var), 0, ((np) * PAGE_SIZE));
loop1 = 0;
- kernel_l1pt.pv_pa = 0;
- kernel_l1pt.pv_va = 0;
for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
/* Are we 16KB aligned for an L1 ? */
if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1))
== 0
@@ -751,8 +747,7 @@
#ifdef VERBOSE_INIT_ARM
printf("pmap ");
#endif
- pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
- KERNEL_VM_BASE + KERNEL_VM_SIZE);
+ pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
/* Setup the IRQ system */
#ifdef VERBOSE_INIT_ARM
Index: src/sys/arch/evbarm/nslu2/nslu2_buttons.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/nslu2/nslu2_buttons.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- src/sys/arch/evbarm/nslu2/nslu2_buttons.c 1 Mar 2006 21:02:50 -0000
1.2
+++ src/sys/arch/evbarm/nslu2/nslu2_buttons.c 28 Apr 2008 20:23:17 -0000
1.3
@@ -1,4 +1,4 @@
-/* $NetBSD: nslu2_buttons.c,v 1.2 2006/03/01 21:02:50 scw Exp $ */
+/* $NetBSD: nslu2_buttons.c,v 1.3 2008/04/28 20:23:17 martin Exp $ */
/*-
* Copyright (c) 2006 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -37,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: nslu2_buttons.c,v 1.2 2006/03/01 21:02:50 scw Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: nslu2_buttons.c,v 1.3 2008/04/28 20:23:17 martin
Exp $");
#include <sys/param.h>
#include <sys/systm.h>
Index: src/sys/arch/evbarm/nslu2/nslu2_iic.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/nslu2/nslu2_iic.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -r1.4 -r1.5
--- src/sys/arch/evbarm/nslu2/nslu2_iic.c 19 Apr 2008 20:49:31 -0000
1.4
+++ src/sys/arch/evbarm/nslu2/nslu2_iic.c 28 Apr 2008 20:23:17 -0000
1.5
@@ -1,4 +1,4 @@
-/* $NetBSD: nslu2_iic.c,v 1.4 2008/04/19 20:49:31 scw Exp $ */
+/* $NetBSD: nslu2_iic.c,v 1.5 2008/04/28 20:23:17 martin Exp $ */
/*-
* Copyright (c) 2006 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/evbarm/nslu2/nslu2_leds.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/nslu2/nslu2_leds.c,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -r1.7 -r1.8
--- src/sys/arch/evbarm/nslu2/nslu2_leds.c 17 Oct 2007 19:54:13 -0000
1.7
+++ src/sys/arch/evbarm/nslu2/nslu2_leds.c 28 Apr 2008 20:23:17 -0000
1.8
@@ -1,4 +1,4 @@
-/* $NetBSD: nslu2_leds.c,v 1.7 2007/10/17 19:54:13 garbled Exp $ */
+/* $NetBSD: nslu2_leds.c,v 1.8 2008/04/28 20:23:17 martin Exp $ */
/*-
* Copyright (c) 2006 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -37,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: nslu2_leds.c,v 1.7 2007/10/17 19:54:13 garbled Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: nslu2_leds.c,v 1.8 2008/04/28 20:23:17 martin Exp
$");
#include <sys/param.h>
#include <sys/systm.h>
Index: src/sys/arch/evbarm/nslu2/nslu2_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/nslu2/nslu2_machdep.c,v
retrieving revision 1.5
retrieving revision 1.7
diff -u -r1.5 -r1.7
--- src/sys/arch/evbarm/nslu2/nslu2_machdep.c 19 Jan 2008 13:11:16 -0000
1.5
+++ src/sys/arch/evbarm/nslu2/nslu2_machdep.c 28 Apr 2008 20:23:17 -0000
1.7
@@ -1,4 +1,4 @@
-/* $NetBSD: nslu2_machdep.c,v 1.5 2008/01/19 13:11:16 chris Exp $ */
+/* $NetBSD: nslu2_machdep.c,v 1.7 2008/04/28 20:23:17 martin Exp $ */
/*-
* Copyright (c) 2006 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -107,7 +100,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: nslu2_machdep.c,v 1.5 2008/01/19 13:11:16 chris
Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nslu2_machdep.c,v 1.7 2008/04/28 20:23:17 martin
Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
@@ -191,7 +184,6 @@
int physmem = 0;
/* Physical and virtual addresses for some global pages */
-pv_addr_t systempage;
pv_addr_t irqstack;
pv_addr_t undstack;
pv_addr_t abtstack;
@@ -471,7 +463,6 @@
u_int kerneldatasize;
u_int l1pagetable;
u_int freemempos;
- pv_addr_t kernel_l1pt;
uint32_t reg;
/*
@@ -575,8 +566,6 @@
#endif
loop1 = 0;
- kernel_l1pt.pv_pa = 0;
- kernel_l1pt.pv_va = 0;
for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
/* Are we 16KB aligned for an L1 ? */
if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1))
== 0
@@ -826,8 +815,7 @@
#ifdef VERBOSE_INIT_ARM
printf("pmap ");
#endif
- pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
- KERNEL_VM_BASE + KERNEL_VM_SIZE);
+ pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
/* Setup the IRQ system */
#ifdef VERBOSE_INIT_ARM
Index: src/sys/arch/evbarm/nslu2/nslu2_mainbus.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/nslu2/nslu2_mainbus.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- src/sys/arch/evbarm/nslu2/nslu2_mainbus.c 28 Feb 2006 20:40:33 -0000
1.1
+++ src/sys/arch/evbarm/nslu2/nslu2_mainbus.c 28 Apr 2008 20:23:17 -0000
1.2
@@ -1,4 +1,4 @@
-/* $NetBSD: nslu2_mainbus.c,v 1.1 2006/02/28 20:40:33 scw Exp $ */
+/* $NetBSD: nslu2_mainbus.c,v 1.2 2008/04/28 20:23:17 martin Exp $ */
/*-
* Copyright (c) 2006 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -37,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: nslu2_mainbus.c,v 1.1 2006/02/28 20:40:33 scw Exp
$");
+__KERNEL_RCSID(0, "$NetBSD: nslu2_mainbus.c,v 1.2 2008/04/28 20:23:17 martin
Exp $");
#include <sys/param.h>
#include <sys/systm.h>
Index: src/sys/arch/evbarm/nslu2/nslu2_pci.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/nslu2/nslu2_pci.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- src/sys/arch/evbarm/nslu2/nslu2_pci.c 28 Feb 2006 20:40:33 -0000
1.1
+++ src/sys/arch/evbarm/nslu2/nslu2_pci.c 28 Apr 2008 20:23:17 -0000
1.2
@@ -1,4 +1,4 @@
-/* $NetBSD: nslu2_pci.c,v 1.1 2006/02/28 20:40:33 scw Exp $ */
+/* $NetBSD: nslu2_pci.c,v 1.2 2008/04/28 20:23:17 martin Exp $ */
/*-
* Copyright (c) 2006 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -69,7 +62,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: nslu2_pci.c,v 1.1 2006/02/28 20:40:33 scw Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nslu2_pci.c,v 1.2 2008/04/28 20:23:17 martin Exp
$");
/*
* Linksys NSLU2 PCI support.
Index: src/sys/arch/evbarm/nslu2/nslu2_start.S
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/nslu2/nslu2_start.S,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- src/sys/arch/evbarm/nslu2/nslu2_start.S 28 Feb 2006 20:40:33 -0000
1.1
+++ src/sys/arch/evbarm/nslu2/nslu2_start.S 28 Apr 2008 20:23:17 -0000
1.2
@@ -1,4 +1,4 @@
-/* $NetBSD: nslu2_start.S,v 1.1 2006/02/28 20:40:33 scw Exp $ */
+/* $NetBSD: nslu2_start.S,v 1.2 2008/04/28 20:23:17 martin Exp $ */
/*
* Copyright (c) 2006 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/evbarm/nslu2/nslu2reg.h
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/nslu2/nslu2reg.h,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- src/sys/arch/evbarm/nslu2/nslu2reg.h 28 Feb 2006 20:40:33 -0000
1.1
+++ src/sys/arch/evbarm/nslu2/nslu2reg.h 28 Apr 2008 20:23:17 -0000
1.2
@@ -1,4 +1,4 @@
-/* $NetBSD: nslu2reg.h,v 1.1 2006/02/28 20:40:33 scw Exp $ */
+/* $NetBSD: nslu2reg.h,v 1.2 2008/04/28 20:23:17 martin Exp $ */
/*-
* Copyright (c) 2006 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/evbarm/osk5912/osk5912_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/osk5912/osk5912_machdep.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- src/sys/arch/evbarm/osk5912/osk5912_machdep.c 19 Jan 2008 13:11:16
-0000 1.2
+++ src/sys/arch/evbarm/osk5912/osk5912_machdep.c 27 Apr 2008 18:58:47
-0000 1.3
@@ -1,4 +1,4 @@
-/* $NetBSD: osk5912_machdep.c,v 1.2 2008/01/19 13:11:16 chris Exp $ */
+/* $NetBSD: osk5912_machdep.c,v 1.3 2008/04/27 18:58:47 matt Exp $ */
/*
* Machine dependent functions for kernel setup for TI OSK5912 board.
@@ -99,7 +99,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: osk5912_machdep.c,v 1.2 2008/01/19 13:11:16 chris
Exp $");
+__KERNEL_RCSID(0, "$NetBSD: osk5912_machdep.c,v 1.3 2008/04/27 18:58:47 matt
Exp $");
#include "opt_machdep.h"
#include "opt_ddb.h"
@@ -180,12 +180,10 @@
static u_int free_pages;
/* Physical and virtual addresses for some global pages */
-pv_addr_t systempage; /* exception vectors */
pv_addr_t irqstack;
pv_addr_t undstack;
pv_addr_t abtstack;
pv_addr_t kernelstack; /* stack for SVC mode */
-static pv_addr_t kernel_l1pt; /* First level page table. */
/* Physical address of the message buffer. */
paddr_t msgbufphys;
@@ -483,8 +481,7 @@
#ifdef VERBOSE_INIT_ARM
printf("pmap ");
#endif
- pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
- KERNEL_VM_BASE + KERNEL_VM_SIZE);
+ pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
#ifdef VERBOSE_INIT_ARM
printf("done.\n");
Index: src/sys/arch/evbarm/smdk2xx0/smdk2410_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/smdk2xx0/smdk2410_machdep.c,v
retrieving revision 1.17
retrieving revision 1.18
diff -u -r1.17 -r1.18
--- src/sys/arch/evbarm/smdk2xx0/smdk2410_machdep.c 19 Jan 2008 13:11:16
-0000 1.17
+++ src/sys/arch/evbarm/smdk2xx0/smdk2410_machdep.c 27 Apr 2008 18:58:47
-0000 1.18
@@ -1,4 +1,4 @@
-/* $NetBSD: smdk2410_machdep.c,v 1.17 2008/01/19 13:11:16 chris Exp $ */
+/* $NetBSD: smdk2410_machdep.c,v 1.18 2008/04/27 18:58:47 matt Exp $ */
/*
* Copyright (c) 2002, 2003 Fujitsu Component Limited
@@ -105,7 +105,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: smdk2410_machdep.c,v 1.17 2008/01/19 13:11:16
chris Exp $");
+__KERNEL_RCSID(0, "$NetBSD: smdk2410_machdep.c,v 1.18 2008/04/27 18:58:47 matt
Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
@@ -213,7 +213,6 @@
#endif /* !PMAP_STATIC_L1S */
/* Physical and virtual addresses for some global pages */
-pv_addr_t systempage;
pv_addr_t irqstack;
pv_addr_t undstack;
pv_addr_t abtstack;
@@ -441,7 +440,6 @@
u_int l1pagetable;
extern int etext __asm("_etext");
extern int end __asm("_end");
- pv_addr_t kernel_l1pt;
int progress_counter = 0;
#ifdef DO_MEMORY_DISK
@@ -627,8 +625,6 @@
memset((char *)(var), 0, ((np) * PAGE_SIZE));
loop1 = 0;
- kernel_l1pt.pv_pa = 0;
- kernel_l1pt.pv_va = 0;
for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
/* Are we 16KB aligned for an L1 ? */
if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1))
== 0
@@ -883,8 +879,7 @@
#ifdef VERBOSE_INIT_ARM
printf("pmap ");
#endif
- pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
- KERNEL_VM_BASE + KERNEL_VM_SIZE);
+ pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
LEDSTEP();
Index: src/sys/arch/evbarm/smdk2xx0/smdk2800_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/smdk2xx0/smdk2800_machdep.c,v
retrieving revision 1.25
retrieving revision 1.26
diff -u -r1.25 -r1.26
--- src/sys/arch/evbarm/smdk2xx0/smdk2800_machdep.c 19 Jan 2008 13:11:16
-0000 1.25
+++ src/sys/arch/evbarm/smdk2xx0/smdk2800_machdep.c 27 Apr 2008 18:58:47
-0000 1.26
@@ -1,4 +1,4 @@
-/* $NetBSD: smdk2800_machdep.c,v 1.25 2008/01/19 13:11:16 chris Exp $ */
+/* $NetBSD: smdk2800_machdep.c,v 1.26 2008/04/27 18:58:47 matt Exp $ */
/*
* Copyright (c) 2002, 2003, 2005 Fujitsu Component Limited
@@ -106,7 +106,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: smdk2800_machdep.c,v 1.25 2008/01/19 13:11:16
chris Exp $");
+__KERNEL_RCSID(0, "$NetBSD: smdk2800_machdep.c,v 1.26 2008/04/27 18:58:47 matt
Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
@@ -204,7 +204,6 @@
#endif /* !PMAP_STATIC_L1S */
/* Physical and virtual addresses for some global pages */
-pv_addr_t systempage;
pv_addr_t irqstack;
pv_addr_t undstack;
pv_addr_t abtstack;
@@ -375,7 +374,6 @@
u_int l1pagetable;
extern int etext __asm("_etext");
extern int end __asm("_end");
- pv_addr_t kernel_l1pt;
int progress_counter = 0;
#ifdef DO_MEMORY_DISK
@@ -531,8 +529,6 @@
memset((char *)(var), 0, ((np) * PAGE_SIZE));
loop1 = 0;
- kernel_l1pt.pv_pa = 0;
- kernel_l1pt.pv_va = 0;
for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
/* Are we 16KB aligned for an L1 ? */
if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1))
== 0
@@ -800,8 +796,7 @@
#ifdef VERBOSE_INIT_ARM
printf("pmap ");
#endif
- pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
- KERNEL_VM_BASE + KERNEL_VM_SIZE);
+ pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
LEDSTEP();
Index: src/sys/arch/evbarm/tsarm/toastersensors.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/tsarm/toastersensors.c,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -r1.6 -r1.7
--- src/sys/arch/evbarm/tsarm/toastersensors.c 17 Oct 2007 19:54:13 -0000
1.6
+++ src/sys/arch/evbarm/tsarm/toastersensors.c 28 Apr 2008 20:23:17 -0000
1.7
@@ -1,4 +1,4 @@
-/* $NetBSD: toastersensors.c,v 1.6 2007/10/17 19:54:13 garbled Exp $ */
+/* $NetBSD: toastersensors.c,v 1.7 2008/04/28 20:23:17 martin Exp $ */
/*-
* Copyright (c) 2005 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -36,7 +29,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: toastersensors.c,v 1.6 2007/10/17 19:54:13 garbled
Exp $");
+__KERNEL_RCSID(0, "$NetBSD: toastersensors.c,v 1.7 2008/04/28 20:23:17 martin
Exp $");
#include <sys/param.h>
#include <sys/sysctl.h>
Index: src/sys/arch/evbarm/tsarm/tsarm_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/tsarm/tsarm_machdep.c,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -r1.6 -r1.7
--- src/sys/arch/evbarm/tsarm/tsarm_machdep.c 19 Jan 2008 13:11:16 -0000
1.6
+++ src/sys/arch/evbarm/tsarm/tsarm_machdep.c 27 Apr 2008 18:58:47 -0000
1.7
@@ -1,4 +1,4 @@
-/* $NetBSD: tsarm_machdep.c,v 1.6 2008/01/19 13:11:16 chris Exp $ */
+/* $NetBSD: tsarm_machdep.c,v 1.7 2008/04/27 18:58:47 matt Exp $ */
/*
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
@@ -73,7 +73,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tsarm_machdep.c,v 1.6 2008/01/19 13:11:16 chris
Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tsarm_machdep.c,v 1.7 2008/04/27 18:58:47 matt Exp
$");
#include "opt_ddb.h"
#include "opt_kgdb.h"
@@ -165,7 +165,6 @@
int physmem = 0;
/* Physical and virtual addresses for some global pages */
-pv_addr_t systempage;
pv_addr_t irqstack;
pv_addr_t undstack;
pv_addr_t abtstack;
@@ -397,7 +396,6 @@
int loop;
int loop1;
u_int l1pagetable;
- pv_addr_t kernel_l1pt;
paddr_t memstart;
psize_t memsize;
@@ -526,8 +524,6 @@
memset((char *)(var), 0, ((np) * PAGE_SIZE));
loop1 = 0;
- kernel_l1pt.pv_pa = 0;
- kernel_l1pt.pv_va = 0;
for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
/* Are we 16KB aligned for an L1 ? */
if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1))
== 0
@@ -777,8 +773,7 @@
#ifdef VERBOSE_INIT_ARM
printf("pmap ");
#endif
- pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
- KERNEL_VM_BASE + KERNEL_VM_SIZE);
+ pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
/* Setup the IRQ system */
#ifdef VERBOSE_INIT_ARM
Index: src/sys/arch/evbarm/tsarm/tskp.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/tsarm/tskp.c,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -r1.5 -r1.6
--- src/sys/arch/evbarm/tsarm/tskp.c 24 Jan 2007 13:08:13 -0000 1.5
+++ src/sys/arch/evbarm/tsarm/tskp.c 28 Apr 2008 20:23:17 -0000 1.6
@@ -1,4 +1,4 @@
-/* $NetBSD: tskp.c,v 1.5 2007/01/24 13:08:13 hubertf Exp $ */
+/* $NetBSD: tskp.c,v 1.6 2008/04/28 20:23:17 martin Exp $ */
/*-
* Copyright (c) 2005 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -36,7 +29,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tskp.c,v 1.5 2007/01/24 13:08:13 hubertf Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tskp.c,v 1.6 2008/04/28 20:23:17 martin Exp $");
#include <sys/param.h>
#include <sys/systm.h>
Index: src/sys/arch/evbarm/tsarm/tslcd.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/tsarm/tslcd.c,v
retrieving revision 1.9
retrieving revision 1.10
diff -u -r1.9 -r1.10
--- src/sys/arch/evbarm/tsarm/tslcd.c 4 Mar 2007 05:59:45 -0000 1.9
+++ src/sys/arch/evbarm/tsarm/tslcd.c 28 Apr 2008 20:23:17 -0000 1.10
@@ -1,4 +1,4 @@
-/* $NetBSD: tslcd.c,v 1.9 2007/03/04 05:59:45 christos Exp $ */
+/* $NetBSD: tslcd.c,v 1.10 2008/04/28 20:23:17 martin Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -36,7 +29,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tslcd.c,v 1.9 2007/03/04 05:59:45 christos Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tslcd.c,v 1.10 2008/04/28 20:23:17 martin Exp $");
#include <sys/param.h>
#include <sys/systm.h>
Index: src/sys/arch/evbarm/tsarm/tspld.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/tsarm/tspld.c,v
retrieving revision 1.13
retrieving revision 1.15
diff -u -r1.13 -r1.15
--- src/sys/arch/evbarm/tsarm/tspld.c 17 Oct 2007 19:54:13 -0000 1.13
+++ src/sys/arch/evbarm/tsarm/tspld.c 10 May 2008 15:31:04 -0000 1.15
@@ -1,4 +1,4 @@
-/* $NetBSD: tspld.c,v 1.13 2007/10/17 19:54:13 garbled Exp $ */
+/* $NetBSD: tspld.c,v 1.15 2008/05/10 15:31:04 martin Exp $ */
/*-
* Copyright (c) 2004 Jesse Off
@@ -35,7 +35,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tspld.c,v 1.13 2007/10/17 19:54:13 garbled Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tspld.c,v 1.15 2008/05/10 15:31:04 martin Exp $");
#include <sys/param.h>
#include <sys/callout.h>
Index: src/sys/arch/evbarm/tsarm/wdc_ts.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/tsarm/wdc_ts.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -r1.4 -r1.5
--- src/sys/arch/evbarm/tsarm/wdc_ts.c 18 Mar 2008 20:46:35 -0000 1.4
+++ src/sys/arch/evbarm/tsarm/wdc_ts.c 28 Apr 2008 20:23:17 -0000 1.5
@@ -1,4 +1,4 @@
-/* $NetBSD: wdc_ts.c,v 1.4 2008/03/18 20:46:35 cube Exp $ */
+/* $NetBSD: wdc_ts.c,v 1.5 2008/04/28 20:23:17 martin Exp $ */
/*-
* Copyright (c) 1998, 2003 The NetBSD Foundation, Inc.
@@ -15,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -37,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: wdc_ts.c,v 1.4 2008/03/18 20:46:35 cube Exp $");
+__KERNEL_RCSID(0, "$NetBSD: wdc_ts.c,v 1.5 2008/04/28 20:23:17 martin Exp $");
#include <sys/param.h>
#include <sys/systm.h>
Index: src/sys/arch/evbarm/tsarm/isa/isa_io_asm.S
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/tsarm/isa/isa_io_asm.S,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- src/sys/arch/evbarm/tsarm/isa/isa_io_asm.S 11 Dec 2005 12:17:11 -0000
1.2
+++ src/sys/arch/evbarm/tsarm/isa/isa_io_asm.S 28 Apr 2008 20:23:17 -0000
1.3
@@ -1,4 +1,4 @@
-/* $NetBSD: isa_io_asm.S,v 1.2 2005/12/11 12:17:11 christos Exp $ */
+/* $NetBSD: isa_io_asm.S,v 1.3 2008/04/28 20:23:17 martin Exp $ */
/*-
* Copyright (c) 1997 The NetBSD Foundation, Inc.
@@ -18,13 +18,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
Index: src/sys/arch/evbarm/tsarm/isa/isa_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/tsarm/isa/isa_machdep.c,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -r1.3 -r1.4
--- src/sys/arch/evbarm/tsarm/isa/isa_machdep.c 11 Dec 2005 12:17:11 -0000
1.3
+++ src/sys/arch/evbarm/tsarm/isa/isa_machdep.c 28 Apr 2008 20:23:17 -0000
1.4
@@ -1,4 +1,4 @@
-/* $NetBSD: isa_machdep.c,v 1.3 2005/12/11 12:17:11 christos Exp $ */
+/* $NetBSD: isa_machdep.c,v 1.4 2008/04/28 20:23:17 martin Exp $ */
/*-
* Copyright (c) 1996-1998 The NetBSD Foundation, Inc.
@@ -19,13 +19,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -75,7 +68,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: isa_machdep.c,v 1.3 2005/12/11 12:17:11 christos
Exp $");
+__KERNEL_RCSID(0, "$NetBSD: isa_machdep.c,v 1.4 2008/04/28 20:23:17 martin Exp
$");
#include "opt_irqstats.h"
Index: src/sys/arch/evbarm/viper/viper_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/viper/viper_machdep.c,v
retrieving revision 1.9
retrieving revision 1.10
diff -u -r1.9 -r1.10
--- src/sys/arch/evbarm/viper/viper_machdep.c 19 Jan 2008 13:11:16 -0000
1.9
+++ src/sys/arch/evbarm/viper/viper_machdep.c 27 Apr 2008 18:58:47 -0000
1.10
@@ -1,4 +1,4 @@
-/* $NetBSD: viper_machdep.c,v 1.9 2008/01/19 13:11:16 chris Exp $ */
+/* $NetBSD: viper_machdep.c,v 1.10 2008/04/27 18:58:47 matt Exp $ */
/*
* Startup routines for the Arcom Viper. Below you can trace the
@@ -112,7 +112,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: viper_machdep.c,v 1.9 2008/01/19 13:11:16 chris
Exp $");
+__KERNEL_RCSID(0, "$NetBSD: viper_machdep.c,v 1.10 2008/04/27 18:58:47 matt
Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
@@ -203,7 +203,6 @@
#endif /* !PMAP_STATIC_L1S */
/* Physical and virtual addresses for some global pages */
-pv_addr_t systempage;
pv_addr_t irqstack;
pv_addr_t undstack;
pv_addr_t abtstack;
@@ -413,7 +412,6 @@
int loop;
int loop1;
u_int l1pagetable;
- pv_addr_t kernel_l1pt;
#ifdef DIAGNOSTIC
extern vsize_t xscale_minidata_clean_size; /* used in KASSERT */
#endif
@@ -538,8 +536,6 @@
memset((char *)(var), 0, ((np) * PAGE_SIZE));
loop1 = 0;
- kernel_l1pt.pv_pa = 0;
- kernel_l1pt.pv_va = 0;
for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
/* Are we 16KB aligned for an L1 ? */
if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1))
== 0
@@ -782,8 +778,7 @@
/* Boot strap pmap telling it where the kernel page table is */
printf("pmap ");
- pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
- KERNEL_VM_BASE + KERNEL_VM_SIZE);
+ pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
#ifdef __HAVE_MEMORY_DISK__
md_root_setconf(memory_disk, sizeof memory_disk);
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