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Re: msk(4) require to sync status buffer wrote:

> Your patch seemed to be very good.  However, it did not work correctly in
> Because the arm_pdcache_line_size of this CPU is 64.  And, the size of
> struct msk_status_desc is eight bytes.

Umm, annoying race CPU writeback vs. next DMA descriptor.

> I propose to delay the clearness of flag SK_Y2_STOPC_OWN for a long time.

If DMA device can't use sparse DMA descriptors
(i.e. one descriptor per each cacheline),
the only workaround is BUD_DMA_COHERENT on
bus_dmamem_map(9), I think.

In msk(4) case your patch might work, but it might cause
some performance hit on other ports (which don't have
cache coherency problems) and it would be a bit ugly
as well as BUS_DMA_COHERENT workaround.

Actually I think there are very few drivers which
will work without BUS_DMA_COHERENT..
Izumi Tsutsui

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