Re: Kernel only sees 1 SATA channel out of 4 - nv520 chip

[Kurt Schreiner <ks%ub.uni-mainz.de@localhost>]

On Fri, Jan 11, 2008 at 11:19:25PM +0100, Art Lemasters wrote:
> jakllsch%kollasch.net@localhost wrote:
> > On Fri, Jan 11, 2008 at 01:00:50AM -0700, Art Lemasters wrote:
> >>   I've installed an Abit AN52 motherboard. It has an "nvidia nf520
> >> single chip." [The NetBSD kernel] only sees one SATA channel out of four. 
> >> The BIOS
> >> sees two hard drives. FreeBSD (live cd) sees both drives (two
> >> drives plugged into two of the four SATA interfaces on the motherboard.
> >> My guess from looking at the FreeBSD dmesg (if the dmesg was accurate
> >> enough) is that there are two onboard SATA controllers, each with two
> >> channels (four interfaces on the motherboard).
> >
> > The FreeBSD dmesg could be useful.
> 
>    Thank you.
> 
>    I'll install FreeBSD on one of the two Raidframe drives here and
> send that dmesg to you/current-users or other appropriate list of
> your choice. ...can't use both drives of the array here for now,
> anyway. ...will even send the associated FreeBSD system source code
> after that, if you like. I can't do C for kernels, yet, being a
> somewhat new, self-taught and typically impoverished student of
> C++ application purism.  ;-)
On an older Sun Ultra 40 (Not the M2 Variant) I have to apply the
following "patch" (or call it hack ;-) to get all SATA-drives working.
Maybe this could help on your machine, too?

Kurt

 cvs diff -u viaide.c
Index: viaide.c
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/viaide.c,v
retrieving revision 1.50
diff -u -r1.50 viaide.c
--- viaide.c    20 Dec 2007 22:24:40 -0000      1.50
+++ viaide.c    12 Jan 2008 08:51:08 -0000
@@ -799,6 +799,21 @@
        pciide_mapreg_dma(sc, pa);
        aprint_verbose("\n");

+       /*
+        * enable memory-space access. sometimes memory space is
+        * _not_ enabled so "just do it" to get things going!
+        */
+       {
+       pcireg_t csr;
+       if (pa->pa_memt) {
+           pa->pa_flags |= PCI_FLAGS_MEM_ENABLED;
+           sc->sc_ba5_st = pa->pa_memt;
+       }
+       csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
+       pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
+           csr | PCI_COMMAND_MEM_ENABLE);
+       }
+
        if (sc->sc_dma_ok) {
                sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_UDMA | ATAC_CAP_DMA;
                sc->sc_wdcdev.irqack = pciide_irqack;