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KA48 / KA660 cache differences

KA48 and KA660 cache initialization seems to differ in an important point:

On KA48, writing 0xff to BEHR and reading it back should yield the
usable banks from bits set ("non-functional banks permanently disabled
by lasar fusing").

On KA660, BEHR is specified as read-only and only power-up diagnostics
should write this register after determining good cache banks.
But our ka660_cache_enable() has its own code of writing BEHR, cache
data and checking all banks and marking them usable. Maybe it would be
better to rely on the firmware here and leave BEHR alone?
As suggested by the docs, our code also clears the tags' VALID flags
before enabling the cache, but I do not understand the corresponding

    while(cnt--) { *p++ = 0x80000000L; p++; }

Why is only every second tag written?

I think it is time to power up my KA660 and start debugging the cache
there, too...


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