Interrupt mask on multi-processor machine

[KIYOHARA Takashi <kiyohara%kk.iij4u.or.jp@localhost>]

Hi! all,


I have not experience to programing on multi-processor machine. Shall I
need atomic operation to interrupt mask on bebox?
# However, cpu1 is not supported now... X-<

Thanks,
--
kiyohara

Index: bebox/pic_bebox.c
===================================================================
RCS file: /cvsroot/src/sys/arch/bebox/bebox/pic_bebox.c,v
retrieving revision 1.4
diff -u -r1.4 pic_bebox.c
--- bebox/pic_bebox.c   8 Feb 2008 16:53:34 -0000       1.4
+++ bebox/pic_bebox.c   8 Feb 2008 16:59:13 -0000
@@ -91,7 +91,7 @@
 bebox_enable_irq(struct pic_ops *pic, int irq, int type)
 {
 
-       mask |= (1 << (31 - irq));
+       atomic_setbits_ulong(&mask, 1 << (31 - irq));
        *(volatile unsigned int *)(bebox_mb_reg + CPU0_INT_MASK) =
            BEBOX_INTR_MASK;
        *(volatile unsigned int *)(bebox_mb_reg + CPU0_INT_MASK) =
@@ -102,7 +102,7 @@
 bebox_disable_irq(struct pic_ops *pic, int irq)
 {
 
-       mask &= ~(1 << (31 - irq));
+       atomic_clearbits_ulong(&mask, 1 << (31 - irq));
        *(volatile unsigned int *)(bebox_mb_reg + CPU0_INT_MASK) =
            BEBOX_INTR_MASK;
        *(volatile unsigned int *)(bebox_mb_reg + CPU0_INT_MASK) =