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Re: [PATCH] Handling large XSAVE space (Intel AMX)



Hi,

On Fri, Apr 11, 2025 at 10:53:05PM +0000, Taylor R Campbell wrote:
> tl;dr -- Handle machines with large XSAVE size (Intel AMX) by
> allocating separate pages for XSAVE instead of trying to cram them
> into the struct pcb page.  OK to commit?  Any testers?  Share output
> of `cpuctl identify 0' if you test?
> 
> 
> The attached patch addresses
> 
> PR port-amd64/57661: Crash when booting on Xeon Silver 4416+ in
> KVM/Qemu (https://gnats.NetBSD.org/57661)

As this patch has a few small differences to the one in the PR:  For
me this one also works (for anybody counting, that's the third
"success" report).  Like before, this is in a VM configured with CPU
passthrough.

  # cpuctl identify 0
  cpu0: highest basic info 0000001f
  cpu0: highest hypervisor info 40000001
  cpu0: highest extended info 80000008
  cpu0: Running on hypervisor: KVM
  cpu0: "Intel(R) Xeon(R) Silver 4416+"
  cpu0: Intel 4th gen Xeon Scalable (Sapphire Rapids) (686-class), 2017.35 MHz
  cpu0: family 0x6 model 0x8f stepping 0x8 (id 0x806f8)
  cpu0: features 0xfabfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE>
  cpu0: features 0xfabfbff<MCA,CMOV,PAT,PSE36,CLFSH,DS,MMX,FXSR,SSE,SSE2,SS>
  cpu0: features1 0xfffab227<SSE3,PCLMULQDQ,DTES64,VMX,SSSE3,FMA,CX16,PDCM,PCID>
  cpu0: features1 0xfffab227<SSE41,SSE42,X2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE>
  cpu0: features1 0xfffab227<OSXSAVE,AVX,F16C,RDRAND,RAZ>
  cpu0: features2 0x2c100800<SYSCALL/SYSRET,XD,P1GB,RDTSCP,EM64T>
  cpu0: features3 0x121<LAHF,LZCNT,PREFETCHW>
  cpu0: features5 0xf1bf07ab<FSGSBASE,TSCADJUST,BMI1,AVX2,SMEP,BMI2,ERMS,INVPCID>
  cpu0: features5 0xf1bf07ab<AVX512F,AVX512DQ,RDSEED,ADX,SMAP,AVX512_IFMA>
  cpu0: features5 0xf1bf07ab<CLFLUSHOPT,CLWB,AVX512CD,SHA,AVX512BW,AVX512VL>
  cpu0: features6 0x1b415f6e<AVX512_VBMI,UMIP,PKU,WAITPKG,AVX512_VBMI2,GFNI,VAES>
  cpu0: features6 0x1b415f6e<VPCLMULQDQ,AVX512_VNNI,AVX512_BITALG>
  cpu0: features6 0x1b415f6e<AVX512_VPOPCNTDQ,LA57,MAWAU=0,RDPID>
  cpu0: features6 0x1b415f6e<BUS_LOCK_DETECTbCLDEMOTE,MOVDIRI,MOVDIR64B>
  cpu0: features7 0xbfc14410<FSRM,MD_CLEAR,SERIALIZE,TSXLDTRK,AMX_BF16>
  cpu0: features7 0xbfc14410<AVX512_FP16,AMX_TILE,AMX_INT8,IBRS,STIBP,L1D_FLUSH>
  cpu0: features7 0xbfc14410<ARCH_CAP,SSBD>
  cpu0: xsave features 0x602e7<x87,SSE,AVX,Opmask,ZMM_Hi256,Hi16_ZMM,PKRU>
  cpu0: xsave instructions 0x1f<XSAVEOPT,XSAVEC,XGETBV,XSAVES,XFD>
  cpu0: xsave area size: current 2688, maximum 11008, xgetbv enabled
  cpu0: enabled xsave 0xe7<x87,SSE,AVX,Opmask,ZMM_Hi256,Hi16_ZMM>
  cpu0: I-cache: 32KB 64B/line 8-way, D-cache: 32KB 64B/line 8-way
  cpu0: L2 cache: 4MB 64B/line 16-way
  cpu0: L3 cache: 16MB 64B/line 16-way
  cpu0: Initial APIC ID 0
  cpu0: Cluster/Package ID 0
  cpu0: Core ID 0
  cpu0: SMT ID 0
  cpu0: MONITOR/MWAIT extensions 0x3<EMX,IBE>
  cpu0: monitor-line size 0
  cpu0: DSPM-eax 0x4<ARAT>
  cpu0: SEF highest subleaf 00000001
  cpu0: SEF-subleaf1-eax 0x1c30<AVXVNNI,AVX512_BF16,FZLRMS,FSRSB,FSRCS>
  cpu0: Power Management features: 0
  cpu0: AMD Extended features 0x100d200<WBNOINVD,IBPB,IBRS,STIBP,SSBD>
  cpu0: Perfmon: Ver. 2
  cpu0: Perfmon: General: bitwidth 48, 8 counters
  cpu0: Perfmon: General: avail 0xff<CORECYCL,INST,REFCYCL,LLCREF,LLCMISS,BRINST>
  cpu0: Perfmon: General: avail 0xff<BRMISPR,TOPDOWNSLOT>
  cpu0: Perfmon: Fixed: bitwidth 48, 3 counters
  cpu0: Perfmon: Fixed: avail 0x7<INST,CLK_CORETHREAD,CLK_REF_TSC>
  cpu0: microcode version 0x2b0004d0, platform ID 0



thanks,
  Harold


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