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Re: 10.0 DMA Issues With SIS-5597/5598 Chipset



On Thu, Jun 13, 2024 at 2:55 PM Alexander Jacocks <jjacocks%gmail.com@localhost> wrote:
On Thu, Jun 13, 2024 at 10:04 AM Manuel Bouyer <bouyer%antioche.eu.org@localhost> wrote:
On Thu, Jun 13, 2024 at 09:58:34AM -0400, Alexander Jacocks wrote:
>
> > On Jun 13, 2024, at 8:44?AM, Manuel Bouyer <bouyer%antioche.eu.org@localhost> wrote:
> >
> > ?On Thu, Jun 13, 2024 at 08:39:37AM -0400, Alexander Jacocks wrote:
> >>
> >>>> On Jun 13, 2024, at 5:51?AM, Manuel Bouyer <bouyer%antioche.eu.org@localhost> wrote:
> >>>
> >>> ?On Wed, Jun 12, 2024 at 10:29:59AM -0400, Alexander Jacocks wrote:
> >>>>  And it was pointed out to me that my paste of the DMA error was incorrect.
> >>>>  Here is the correct log:
> >>>>  [     1.000004] pci0 at mainbus0 bus 0: configuration mode 1
> >>>>  [     1.000004] pci0: i/o space, memory space enabled, rd/line, rd/mult,
> >>>>  wr/inv ok
> >>>>  [     1.000004] pchb0 at pci0 dev 0 function 0: Silicon Integrated System
> >>>>  5597/5598 Host Bridge (rev. 0x10)
> >>>>  [     1.000004] pcib0 at pci0 dev 1 function 0: Silicon Integrated System
> >>>>  85C503 or 5597/5598 ISA Bridge (rev. 0x01)
> >>>>  [     1.000004] siside0 at pci0 dev 1 function 1
> >>>>  [     1.000004] siside0: Silicon Integrated Systems 5597/5598 IDE
> >>>>  controller (rev. 0xd0)
> >>>>  [     1.000004] siside0: bus-master DMA support present, but unused
> >>>>  (couldn't map registers)
> >>>
> >>> The problem here is that the DMA registers are not mappable, so can't be
> >>> used by the driver. Some BIOS settings (like PnP support) may affect this.
> >>>
> >>>>  [     1.000004] siside0: secondary channel ignored (disabled)
> >>>>  I tried simply forcing DMA on by adding the 0x0001 flag to the pciide
> >>>>  driver, with a minor mod to the GENERIC kernel, but it didn't change the
> >>>>  behavior any. I also attempted to add in a Maxtor SATA-150 PCI IDE
> >>>
> >>> Yes, that won't work in this case.
> >>
> >> Interesting. I was able to verify that Windows 98SE is able to enable DMA support, even with the current BIOS settings. This BIOS is pretty limited in what can be configured, unfortunately.
> >
> > From memory, win98 was the "PnP OS". it had to be disabled for others.
> >
> >>
> >> Would disabling ACPI and enabling APM possibly help? Since this board clearly has a broken ACPI configuration, that seems like a possibility.
> >
> > No APM is something different
> >
>
> And PNP is currently disabled, as much as is possible. Is there anything else that I can try to do to make the registers mappable?

Can you send the output of a pcictl dump for this device ?

Manuel,

Here are the PCI devices in the system:

586ve$ sudo pcictl pci0 list -N
000:00:0: Silicon Integrated System 5597/5598 Host Bridge (host bridge, revision 0x10) [pchb0]
000:01:0: Silicon Integrated System 85C503 or 5597/5598 ISA Bridge (ISA bridge, revision 0x01) [pcib0]
000:01:1: Silicon Integrated System 5597/5598 IDE Controller (IDE mass storage, interface 0x8a, revision 0xd0) [siside0]
000:01:2: Silicon Integrated System 5597/5598 USB Host Controller (USB serial bus, OHCI, revision 0x10) [ohci0]
000:02:0: Silicon Integrated System 900 10/100 Ethernet (ethernet network, revision 0x02) [sip0]
000:08:0: Silicon Integrated System 5597/5598 Integrated VGA (VGA display, revision 0x68) [vga0]

And here is the dump:

586ve$ pcictl pci0 list| awk -F: '{print "pcictl pci0 dump -b "$1" -d "$2}'|sort -u | sh
PCI configuration registers:
  Common header:
    0x00: 0x55971039 0x22000007 0x06000010 0x00001000

    Vendor Name: Silicon Integrated System (0x1039)
    Device Name: 5597/5598 Host Bridge (0x5597)
    Command register: 0x0007
      I/O space accesses: on
      Memory space accesses: on
      Bus mastering: on
      Special cycles: off
      MWI transactions: off
      Palette snooping: off
      Parity error checking: off
      Address/data stepping: off
      System error (SERR): off
      Fast back-to-back transactions: off
      Interrupt disable: off
    Status register: 0x2200
      Immediate Readiness: off
      Interrupt status: inactive
      Capability List support: off
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: off
      Data parity error detected: off
      DEVSEL timing: medium (0x1)
      Slave signaled Target Abort: off
      Master received Target Abort: off
      Master received Master Abort: on
      Asserted System Error (SERR): off
      Parity error detected: off
    Class Name: bridge (0x06)
    Subclass Name: host (0x00)
    Interface: 0x00
    Revision ID: 0x10
    BIST: 0x00
    Header Type: 0x00 (0x00)
    Latency Timer: 0x10
    Cache Line Size: 0bytes (0x00)

  Type 0 ("normal" device) header:
    0x10: 0x00000000 0x00000000 0x00000000 0x00000000
    0x20: 0x00000000 0x00000000 0x00000000 0x00000000
    0x30: 0x00000000 0x00000000 0x00000000 0x00000000

    Base address register at 0x10
      not implemented
    Base address register at 0x14
      not implemented
    Base address register at 0x18
      not implemented
    Base address register at 0x1c
      not implemented
    Base address register at 0x20
      not implemented
    Base address register at 0x24
      not implemented
    Cardbus CIS Pointer: 0x00000000
    Subsystem vendor ID: 0x0000
    Subsystem ID: 0x0000
    Expansion ROM Base Address Register: 0x00000000
      base: 0x00000000
      Expansion ROM Enable: off
      Validation Status: Validation not supported
      Validation Details: 0x0
    Reserved @ 0x34: 0x00000000
    Reserved @ 0x38: 0x00000000
    Maximum Latency: 0x00
    Minimum Grant: 0x00
    Interrupt pin: 0x00 (none)
    Interrupt line: 0x00

  Device-dependent header:
    0x40: 0x00000000 0x00000000 0x00000000 0x00000000
    0x50: 0x1e70eac0 0x11a32a01 0x0003ff08 0x00000000
    0x60: 0x0303e6ea 0xff00ff00 0xff00ff00 0x782000c0
    0x70: 0x00008088 0x00808888 0x00000000 0x00000000
    0x80: 0xffcec458 0x40100040 0xffff0000 0x00000000
    0x90: 0x00000002 0x00000000 0x00000000 0xffff0000
    0xa0: 0x80ffffff 0x00000000 0x00000000 0x00000000
    0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
PCI configuration registers:
  Common header:
    0x00: 0x00081039 0x02000007 0x06010001 0x00800000

    Vendor Name: Silicon Integrated System (0x1039)
    Device Name: 85C503 or 5597/5598 ISA Bridge (0x0008)
    Command register: 0x0007
      I/O space accesses: on
      Memory space accesses: on
      Bus mastering: on
      Special cycles: off
      MWI transactions: off
      Palette snooping: off
      Parity error checking: off
      Address/data stepping: off
      System error (SERR): off
      Fast back-to-back transactions: off
      Interrupt disable: off
    Status register: 0x0200
      Immediate Readiness: off
      Interrupt status: inactive
      Capability List support: off
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: off
      Data parity error detected: off
      DEVSEL timing: medium (0x1)
      Slave signaled Target Abort: off
      Master received Target Abort: off
      Master received Master Abort: off
      Asserted System Error (SERR): off
      Parity error detected: off
    Class Name: bridge (0x06)
    Subclass Name: ISA (0x01)
    Interface: 0x00
    Revision ID: 0x01
    BIST: 0x00
    Header Type: 0x00+multifunction (0x80)
    Latency Timer: 0x00
    Cache Line Size: 0bytes (0x00)

  Type 0 ("normal" device) header:
    0x10: 0x00000000 0x00000000 0x00000000 0x00000000
    0x20: 0x00000000 0x00000000 0x00000000 0x00000000
    0x30: 0x00000000 0x00000000 0x00000000 0x00000000

    Base address register at 0x10
      not implemented
    Base address register at 0x14
      not implemented
    Base address register at 0x18
      not implemented
    Base address register at 0x1c
      not implemented
    Base address register at 0x20
      not implemented
    Base address register at 0x24
      not implemented
    Cardbus CIS Pointer: 0x00000000
    Subsystem vendor ID: 0x0000
    Subsystem ID: 0x0000
    Expansion ROM Base Address Register: 0x00000000
      base: 0x00000000
      Expansion ROM Enable: off
      Validation Status: Validation not supported
      Validation Details: 0x0
    Reserved @ 0x34: 0x00000000
    Reserved @ 0x38: 0x00000000
    Maximum Latency: 0x00
    Minimum Grant: 0x00
    Interrupt pin: 0x00 (none)
    Interrupt line: 0x00

  Device-dependent header:
    0x40: 0x0b800ffa 0x06006480 0x0f1000ff 0x01042011
    0x50: 0x01022811 0x0a670a62 0x00122e9c 0x000004a8
    0x60: 0x004f8032 0x80015b00 0x00120000 0x00001c20
    0x70: 0x0000001e 0xa325a321 0x00000000 0x00000000
    0x80: 0x00000000 0x00000000 0x00000000 0x00000000
    0x90: 0x00003f00 0x00000000 0x00000000 0x00000000
    0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
PCI configuration registers:
  Common header:
    0x00: 0x09001039 0x02900107 0x02000002 0x0000d000

    Vendor Name: Silicon Integrated System (0x1039)
    Device Name: 900 10/100 Ethernet (0x0900)
    Command register: 0x0107
      I/O space accesses: on
      Memory space accesses: on
      Bus mastering: on
      Special cycles: off
      MWI transactions: off
      Palette snooping: off
      Parity error checking: off
      Address/data stepping: off
      System error (SERR): on
      Fast back-to-back transactions: off
      Interrupt disable: off
    Status register: 0x0290
      Immediate Readiness: off
      Interrupt status: inactive
      Capability List support: on
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: on
      Data parity error detected: off
      DEVSEL timing: medium (0x1)
      Slave signaled Target Abort: off
      Master received Target Abort: off
      Master received Master Abort: off
      Asserted System Error (SERR): off
      Parity error detected: off
    Class Name: network (0x02)
    Subclass Name: ethernet (0x00)
    Interface: 0x00
    Revision ID: 0x02
    BIST: 0x00
    Header Type: 0x00 (0x00)
    Latency Timer: 0xd0
    Cache Line Size: 0bytes (0x00)

  Type 0 ("normal" device) header:
    0x10: 0x00004001 0x60000000 0x00000000 0x00000000
    0x20: 0x00000000 0x00000000 0x00000000 0x09001039
    0x30: 0x00000000 0x00000040 0x00000000 0x0b34010f

    Base address register at 0x10
      type: I/O
      base: 0x00004000
    Base address register at 0x14
      type: 32-bit nonprefetchable memory
      base: 0x60000000
    Base address register at 0x18
      not implemented
    Base address register at 0x1c
      not implemented
    Base address register at 0x20
      not implemented
    Base address register at 0x24
      not implemented
    Cardbus CIS Pointer: 0x00000000
    Subsystem vendor ID: 0x1039
    Subsystem ID: 0x0900
    Expansion ROM Base Address Register: 0x00000000
      base: 0x00000000
      Expansion ROM Enable: off
      Validation Status: Validation not supported
      Validation Details: 0x0
    Capability list pointer: 0x40
    Reserved @ 0x38: 0x00000000
    Maximum Latency: 0x0b
    Minimum Grant: 0x34
    Interrupt pin: 0x01 (pin A)
    Interrupt line: 0x0f

  Capability register at 0x40
    type: 0x01 (Power Management)

  PCI Power Management Capabilities Register
    Capabilities register: 0xfe01
      Version: 1.0
      PME# clock: off
      Device specific initialization: off
      3.3V auxiliary current: self-powered
      D1 power management state support: on
      D2 power management state support: on
      PME# support D0: on
      PME# support D1: on
      PME# support D2: on
      PME# support D3 hot: on
      PME# support D3 cold: on
    Control/status register: 0x00000000
      Power state: D0
      PCI Express reserved: off
      No soft reset: off
      PME# assertion: disabled
      Data Select: 0
      Data Scale: 0
      PME# status: off
    Bridge Support Extensions register: 0x00
      B2/B3 support: off
      Bus Power/Clock Control Enable: off
    Data register: 0x00

  Device-dependent header:
    0x40: 0xfe010001 0x00000000 0x00000000 0x00000000
    0x50: 0x00000000 0x00000000 0x00000000 0x00000000
    0x60: 0x00000000 0x00000000 0x00000000 0x00000000
    0x70: 0x00000000 0x00000000 0x00000000 0x00000000
    0x80: 0x00000000 0x00000000 0x00000000 0x00000000
    0x90: 0x00000000 0x00000000 0x00000000 0x00000000
    0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
pcictl: "08" is not a number

And here is the IDE controller:

586ve$ pcictl pci0 dump -b 000 -d 01 -f 1
PCI configuration registers:
  Common header:
    0x00: 0x55131039 0x00000001 0x01018ad0 0x00800000

    Vendor Name: Silicon Integrated System (0x1039)
    Device Name: 5597/5598 IDE Controller (0x5513)
    Command register: 0x0001
      I/O space accesses: on
      Memory space accesses: off
      Bus mastering: off
      Special cycles: off
      MWI transactions: off
      Palette snooping: off
      Parity error checking: off
      Address/data stepping: off
      System error (SERR): off
      Fast back-to-back transactions: off
      Interrupt disable: off
    Status register: 0x0000
      Immediate Readiness: off
      Interrupt status: inactive
      Capability List support: off
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: off
      Data parity error detected: off
      DEVSEL timing: fast (0x0)
      Slave signaled Target Abort: off
      Master received Target Abort: off
      Master received Master Abort: off
      Asserted System Error (SERR): off
      Parity error detected: off
    Class Name: mass storage (0x01)
    Subclass Name: IDE (0x01)
    Interface: 0x8a
    Revision ID: 0xd0
    BIST: 0x00
    Header Type: 0x00+multifunction (0x80)
    Latency Timer: 0x00
    Cache Line Size: 0bytes (0x00)

  Type 0 ("normal" device) header:
    0x10: 0x00002001 0x00002101 0x00002201 0x00002301
    0x20: 0xfd64ffa1 0x00000000 0x00000000 0x1d97af69
    0x30: 0x00000000 0x00000000 0x00000000 0x00000100

    Base address register at 0x10
      type: I/O
      base: 0x00002000
    Base address register at 0x14
      type: I/O
      base: 0x00002100
    Base address register at 0x18
      type: I/O
      base: 0x00002200
    Base address register at 0x1c
      type: I/O
      base: 0x00002300
    Base address register at 0x20
      type: I/O
      base: 0xfd64ffa0
    Base address register at 0x24
      not implemented
    Cardbus CIS Pointer: 0x00000000
    Subsystem vendor ID: 0xaf69
    Subsystem ID: 0x1d97
    Expansion ROM Base Address Register: 0x00000000
      base: 0x00000000
      Expansion ROM Enable: off
      Validation Status: Validation not supported
      Validation Details: 0x0
    Reserved @ 0x34: 0x00000000
    Reserved @ 0x38: 0x00000000
    Maximum Latency: 0x00
    Minimum Grant: 0x00
    Interrupt pin: 0x01 (pin A)
    Interrupt line: 0x00

  Device-dependent header:
    0x40: 0x00000301 0x00000000 0x03220700 0x02000200
    0x50: 0x000d0200 0x00000000 0x00000000 0x00000000
    0x60: 0x00000000 0x00000000 0x00000000 0x00000000
    0x70: 0x00000000 0x00000000 0x00000000 0x00000000
    0x80: 0x00000000 0x00000000 0x00000000 0x00000000
    0x90: 0x00000000 0x00000000 0x00000000 0x00000000
    0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xf0: 0x00000000 0x00000000 0x00000000 0x00000000

- Alex


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