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Re: Predictable CPU discovery
Hi,
First of all, thank you Jared for finding it out. We didn't notice
that.
On 2020/07/03 23:53, Jason Thorpe wrote:
On Jul 3, 2020, at 7:48 AM, Jared McNeill <jmcneill%invisible.ca@localhost> wrote:
Considering that we define MAXCPUS=256 for Arm64 and will likely need to bump that limit in the near future, what kind of impact will this have on boot times of large systems?
Dunno -- I suppose it'll have to be measured.
Alternatively, other ports use uvm_page_recolor(9) when secondary
CPUs are attached:
https://nxr.netbsd.org/source/s?refs=uvm_page_recolor&project=src
For aarch64, something like the attached patch makes sense? (Sorry,
compile-test only since I don't have big.LITTLE processors...)
Thanks,
rin
Index: sys/arch/aarch64/aarch64/cpufunc.c
===================================================================
RCS file: /home/netbsd/src/sys/arch/aarch64/aarch64/cpufunc.c,v
retrieving revision 1.21
diff -p -u -r1.21 cpufunc.c
--- sys/arch/aarch64/aarch64/cpufunc.c 1 Jul 2020 07:59:16 -0000 1.21
+++ sys/arch/aarch64/aarch64/cpufunc.c 3 Jul 2020 15:06:15 -0000
@@ -37,6 +37,8 @@ __KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v
#include <sys/kmem.h>
#include <sys/cpu.h>
+#include <uvm/uvm_page.h>
+
#include <aarch64/cpufunc.h>
u_int cputype; /* compat arm */
@@ -102,6 +104,7 @@ aarch64_getcacheinfo(int unit)
{
struct cpu_info * const ci = curcpu();
uint32_t clidr, ctr;
+ u_int vindexsize;
int level, cachetype;
struct aarch64_cache_info *cinfo = NULL;
@@ -215,14 +218,19 @@ aarch64_getcacheinfo(int unit)
((cinfo[0].cacheable == CACHE_CACHEABLE_ICACHE) ||
(cinfo[0].cacheable == CACHE_CACHEABLE_IDCACHE))) {
- aarch64_cache_vindexsize =
+ vindexsize =
cinfo[0].icache.cache_size /
cinfo[0].icache.cache_ways;
- KASSERT(aarch64_cache_vindexsize != 0);
- aarch64_cache_prefer_mask = aarch64_cache_vindexsize - 1;
+ KASSERT(vindexsize != 0);
} else {
- aarch64_cache_vindexsize = 0;
+ vindexsize = 0;
+ }
+
+ if (vindexsize > aarch64_cache_vindexsize) {
+ aarch64_cache_vindexsize = vindexsize;
+ aarch64_cache_prefer_mask = vindexsize - 1;
+ uvm_page_recolor(vindexsize / PAGE_SIZE);
}
}
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