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CPU frequency scaling on RPI2

Hi guys,

I remember up until at least 7.0, you could get some form of CPU
frequency scaling my using the sysctl machdep.cpu.frequency.target,
and setting it to the desired (valid) value.
This appears to have stopped working around the 7.1 release I think.
There's no error, but the target value does not update, i.e.

rpi:/home/michael$ sysctl machdep.cpu
machdep.cpu.frequency.target = 600
machdep.cpu.frequency.current = 600
machdep.cpu.frequency.min = 600
machdep.cpu.frequency.max = 900
rpi:/home/michael$ sudo sysctl -w machdep.cpu.frequency.target=900
machdep.cpu.frequency.target: 600 -> 900
rpi:/home/michael$ sysctl machdep.cpu
machdep.cpu.frequency.target = 600    <-- should be 900
machdep.cpu.frequency.current = 600 <- should be 900
machdep.cpu.frequency.min = 600
machdep.cpu.frequency.max = 900

This also happens under heavy cpu load (4 cores pegged at 100%).
I noticed that setting arm_freq_min in /boot/config.txt to a lower
value, e.g. 200, does work, and the default frequency is lowered
accordingly (and this is reflected in the dmesg)
arm_freq, arm_freq_max and higher values of arm_freq_min do not have any effect.

partial dmesg (this happened in 7.1-RELEASE and all 8.0_BETA GENERIC
kernels I've used in the past few months)

NetBSD 8.0_BETA (RPI2) #1: Thu Jun 29 15:44:16 BST 2017
total memory = 992 MB
avail memory = 974 MB
sysctl_createv: sysctl_create(machine_arch) returned 17
timecounter: Timecounters tick every 10.000 msec
mainbus0 (root)
cpu0 at mainbus0 core 0: 600 MHz Cortex-A7 r0p5 (Cortex V7A core)
<--- this reflects arm_freq_min and the cores are pegged at this
cpu0: DC enabled IC enabled WB disabled EABT branch prediction enabled
cpu0: 32KB/32B 2-way L1 VIPT Instruction cache
cpu0: 32KB/64B 4-way write-back-locking-C L1 PIPT Data cache
cpu0: 512KB/64B 8-way write-through L2 PIPT Unified cache
vfp0 at cpu0: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals
cpu1 at mainbus0 core 1
cpu2 at mainbus0 core 2
cpu3 at mainbus0 core 3
obio0 at mainbus0
bcmicu0 at obio0: Multiprocessor
armgtmr0 at obio0: ARMv7 Generic 64-bit Timer (19200 kHz)
armgtmr0: interrupting on irq 3
timecounter: Timecounter "armgtmr0" frequency 19200000 Hz quality 500

Any ideas of changes that could have affected it? I've been browsing
the course but I'm not familiar enough with it just yet.


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