Re: TS-7200: time sync issues

[Jesse Off <joff%embeddedARM.com@localhost>]

Ken Hornstein wrote:
> > A P.S.  Looks like I'm wrong.  Looks like it uses tsrtc, which is a
> > mc146818 device, which has a dangerous looking mc146818_settime_ymdhms
> > function:
> > [...]
> > also done at splclock() (which I think may be unneeded these days).
> > If the part takes a long time to reply...
> >     
>
> Ouch, I missed the splclock() in mc146818.c.  Yeah, I don't know how
> slow writes are to that bus, but that could be a likely culprit.  And
> I even see that the splclock() call is marked "XXX really needed?".  And
> as I trace back up the call path, I see that resettodr() is right after
> the splx() call in kern_time.c, which tells me that the idea was that
> the todr is NOT supposed to be set at splclock().  And now that I think
> about it, I cannot come up with any reason why clock interrupts should be
> blocked during the setting of the time-of-day clock; can anyone else?
>
>
>   

Those bus cycles should be approximately 320 nS each.  The RTC has no 
connection to the processor WAIT# signal so its not possible for it to 
extend bus cycles.  That UIP bit will be set some ?? uS before a once 
per second update.  As long as you have a functioning battery-backed RTC 
(TS-5620) on the PC104 bus, that UIP should only be set for a very short 
time that should be of no consequence. 

//Jesse Off