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Re: Status of current on ARM?



[I think we can continue debugging this on port-arm]

On Mon, Nov 03, 2008 at 10:08:25AM -0800, Matt Thomas wrote:
> On Nov 3, 2008, at 1:19 AM, Mikko Rapeli wrote:
> >Not for me. Which 2420 are you working with? We are using TI's OMAP  
> >2420
> >SDP evaluation boards. And which kernel config? I'm using the standard
> >TISDP2420 with changes to static IP addresses, root NFS paths and  
> >rootfs
> >location (sm0, type nfs) and serial port set to 115k bauds.
> 
> TI 2420 SDP H4.  The TISDP2420 from evbarm.

So we have the same boards. Mine should be H4 too, but can't see it on
the stickers. SDP 2420-V5.0 is on it.

> >The result is a kernel panic in the pmap code, as described in pr  
> >#39791
> >and to which workaround are the two revert patches in my previous
> >mail. Boot log and backtrace can be found below.
> >
> >If I were managing a tree, I would revert patches that have issues on
> >some hardware, and would work to get those issues fixed. I'm  
> >willing to test
> >any alternatives there are, but at the moment current on OMAP 2420 is
> >broken, and workaround patches have been proposed.
> 
> Any reason why you haven't populated /dev on the server?  I don't  
> understand
> why your kernel is trying to write /dev/mem or /dev/kmem.

The userspace is a destdir.evbarm after build.sh build and distribution
targets. I thought the boot scripts created enough /dev nodes for single
user boot to succeed. Below is a log from an older kernel booting the
same userspace from yesterdays current.

> I don't seem to have that instruction in my kernel at that location.   
> How about
> I provide a kernel I've built?

Lets try this, URL?

-Mikko

U-Boot 1.1.3 (Sep 10 2007 - 11:20:13)

U-Boot code: 80E80000 -> 80E9DBFC  BSS: -> 80EA29C8
OMAP2420-GP revision 3, PRCM III
TI H4 SDP Base Board + Menelaus Daughter Board + mDDR
RAM Configuration:
Bank #0: 80000000 32 MB
Bank #1: 82000000 32 MB
Flash: 64 MB
In:    serial
Out:   serial
Err:   serial
Hit any key to stop autoboot:  0
Using MAC Address 00:50:C2:42:B0:34
TFTP from server 192.168.10.1; our IP address is 192.168.10.4
Filename 'netbsd'.
Load address: 0x80300000
Loading: #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #############################################################
done
Bytes transferred = 2305668 (232e84 hex)
## Starting application at 0x80300000 ...
dfgh
NetBSD/evbarm (SDP2430) booting ...
initarm: Configuring system ...
Allocating page tables
setup_real_page_tables: physical_freestart 0x80568000
setup_real_page_tables: kernel_l1pt: 0x80568000:0x80568000
setup_real_page_tables: kernel_pt_table:
        0x8056c000:0x8056c000
        0x8056d000:0x8056d000
        0x8056e000:0x8056e000
        0x8056f000:0x8056f000
        0x80570000:0x80570000
        0x80571000:0x80571000
        0x80572000:0x80572000
        0x80573000:0x80573000
        0x80574000:0x80574000
Creating L1 page table at 0x80568000
Mapping kernel
pmap_map_chunk: pa=0x80300000 va=0x80300000 size=0x1e0000 resid=0x1e0000 prot=01
SLLLLLLLLLLLLLL
pmap_map_chunk: pa=0x804e0000 va=0x804e0000 size=0x90000 resid=0x90000 prot=0x31
LLLLLLLLL
Constructing L2 page tables
pmap_map_chunk: pa=0x80576000 va=0x80576000 size=0x1000 resid=0x1000 prot=0x3 c1
P
pmap_map_chunk: pa=0x80577000 va=0x80577000 size=0x1000 resid=0x1000 prot=0x3 c1
P
pmap_map_chunk: pa=0x80578000 va=0x80578000 size=0x1000 resid=0x1000 prot=0x3 c1
P
pmap_map_chunk: pa=0x80579000 va=0x80579000 size=0x2000 resid=0x2000 prot=0x3 c1
PP
pmap_map_chunk: pa=0x80568000 va=0x80568000 size=0x4000 resid=0x4000 prot=0x3 c2
PPPP
pmap_map_chunk: pa=0x8056c000 va=0x8056c000 size=0x1000 resid=0x1000 prot=0x3 c2
P
pmap_map_chunk: pa=0x8056d000 va=0x8056d000 size=0x1000 resid=0x1000 prot=0x3 c2
P
pmap_map_chunk: pa=0x8056e000 va=0x8056e000 size=0x1000 resid=0x1000 prot=0x3 c2
P
pmap_map_chunk: pa=0x8056f000 va=0x8056f000 size=0x1000 resid=0x1000 prot=0x3 c2
P
pmap_map_chunk: pa=0x80570000 va=0x80570000 size=0x1000 resid=0x1000 prot=0x3 c2
P
pmap_map_chunk: pa=0x80571000 va=0x80571000 size=0x1000 resid=0x1000 prot=0x3 c2
P
pmap_map_chunk: pa=0x80572000 va=0x80572000 size=0x1000 resid=0x1000 prot=0x3 c2
P
pmap_map_chunk: pa=0x80573000 va=0x80573000 size=0x1000 resid=0x1000 prot=0x3 c2
P
pmap_map_chunk: pa=0x80574000 va=0x80574000 size=0x1000 resid=0x1000 prot=0x3 c2
P
devmap: 48000000 -> 480fffff @ 8d000000
pmap_map_chunk: pa=0x48000000 va=0x8d000000 size=0x100000 resid=0x100000 prot=00
S
devmap: 49000000 -> 490fffff @ 8e000000
pmap_map_chunk: pa=0x49000000 va=0x8e000000 size=0x100000 resid=0x100000 prot=00
S
                             Physical              Virtual        Num
                       Starting    Ending    Starting    Ending   Pages
               SDRAM: 0x80300000 0x83ffffff 0x80300000 0x83ffffff 15616
        text section: 0x80300000 0x804de27f 0x80300000 0x804de27f 480
        data section: 0x804e0000 0x80532e84 0x804e0000 0x80532e84 83
         bss section: 0x80532e84 0x80567c98 0x80532e84 0x80567c98 54
   L1 page directory: 0x80568000 0x8056bfff 0x80568000 0x8056bfff 4
   Exception Vectors: 0x80575000 0x80575fff 0xffff0000 0xffff0fff 1
           IRQ stack: 0x80576000 0x80576fff 0x80576000 0x80576fff 1
           ABT stack: 0x80577000 0x80577fff 0x80577000 0x80577fff 1
           UND stack: 0x80578000 0x80578fff 0x80578000 0x80578fff 1
           SVC stack: 0x80579000 0x8057afff 0x80579000 0x8057afff 2
      Message Buffer: 0x8057b000 0x8057bfff                       1
         Free Memory: 0x8057c000 0x83ffffff 0x8057c000 0x83ffffff 14980
switching to new L1 page table  @0x80568000...OK.
bootstrap done.
init subsystems: stacks vectors undefined page pmap initarm: initializing clock.
omap2420clk: Starting OMAP2 clock init, mapping PRCM mem
omap2420clk: Optimizing startup clock set
omap2420clk: Clocking rate (Crystal/dpll/core/mpu): 12.0/266/532/266 MHz
omap2420clk: calling clk_init
omap2420clk: init complete
done.
initarm done.
Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
    2006, 2007, 2008
    The NetBSD Foundation, Inc.  All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
    The Regents of the University of California.  All rights reserved.

NetBSD 4.99.72 (TISDP2420) #0: Wed Sep 17 12:39:17 EEST 2008
        mira@fitfioullt278:/home/mira/src/netbsd/netbsd-thumb/obj/sys/arch/evba0
total memory = 62464 KB
avail memory = 58108 KB
mainbus0 (root)
cpu0 at mainbus0: ARM1136J-S r0p2 (ARM11J core)
cpu0: DC enabled IC enabled WB enabled LABT
cpu0: 32KB/32B 4-way Instruction cache
cpu0: 32KB/32B 4-way write-back-locking-C Data cache
obio0 at mainbus0 base 0x48000000-0x48ffffff: On-Board IO
com0 at obio0 addr 0x4806a000-0x4806a3ff: ns16550a, working fifo
com0: console
omapicu0 at obio0 addr 0x480fe000-0x480fefff intrbase 0
omapgpio0 at obio0 addr 0x48018000-0x480183ff intr 29 intrbase 96: interrupts 99
omapgpio1 at obio0 addr 0x4801a000-0x4801a3ff intr 30 intrbase 128: interrupts 0
omapgpio2 at obio0 addr 0x4801c000-0x4801c3ff intr 31 intrbase 160: interrupts 1
omapgpio3 at obio0 addr 0x4801e000-0x4801e3ff intr 32 intrbase 192: interrupts 2
omap2430mputmr0 at obio0 addr 0x4802a000-0x4802a0ff intr 38: OMAP MPU Timer #2
omap2430mputmr1 at obio0 addr 0x48078000-0x480780ff intr 39: OMAP MPU Timer #3
omap2430mputmr2 at obio0 addr 0x4807a000-0x4807a0ff intr 40: OMAP MPU Timer #4
omap2430mputmr3 at obio0 addr 0x4807c000-0x4807c0ff intr 41: OMAP MPU Timer #5
omap2_lcd0 at obio0 addr 0x48050000
omap2_lcd_dss_init(): DSS registers mapped ioh = 0x8d050000
omap2_lcd_dss_init(): Clocks enabled
Pixel Clock divisor for pixel clock 6250kHz = 1 -> Setting 2
DISPC: omap2_lcd_alloc_fb(): memory allocated at vaddr=0x82128000, paddr=0x80720
wsdisplay0 at omap2_lcd0
DISPC: omap2_lcd_alloc_fb(): memory allocated at vaddr=0x8214e000, paddr=0x80740
wsdisplay1 at omap2_lcd0
DISPC: omap2_lcd_alloc_fb(): memory allocated at vaddr=0x82174000, paddr=0x80770
wsdisplay2 at omap2_lcd0
DISPC: LAYER ENABLED!
omapwdt32k0 at obio0 addr 0x48026000-0x480267ff: rev 1.1
omapi2c0 at obio0 addr 0x48070000-0x48070fff intr 56: rev 3.4
iic0 at omapi2c0: I2C bus
twl92230x0 at iic0 addr 0x72: rev 2.0
twl92230 register content: 20-8c-05-02-0c-03-33-03
                           00-95-7e-03-03-03-00-00
                           00-00-00-00-81-09-ff-0f
                           50-00-00-00
ioexp0 at iic0 addr 0x20omapi2c1 at obio0 addr 0x48072000-0x48072fff intr 57: r4
iic1 at omapi2c1: I2C bus
omcspi0 at obio0 addr 0x48098000-0x480980ff: rev 1.4
spi0 at omcspi0: SPI bus
tsc210x0 at spi0 slave 0: rev 4
wsmouse0 at tsc210x0 (mux ignored)
obio1 at mainbus0 base 0x49000000-0x497fffff: On-Board IO
L3i0 at mainbus0: L3i Interconnect
gpmc0 at mainbus0 base 0x6800a000: General Purpose Memory Controller, rev 2.0
gpmc0: CS#0 valid, addr 0x04000000, size  64MB
gpmc0: CS#1 valid, addr 0x08000000, size  16MB
sm0 at gpmc0 addr 0x08000300 intr 188
sm0: SMC91C94/91C96, revision 9, buffer size: 6144
sm0: MAC address 00:50:c2:42:b0:34, default media UTP
clock: hz=100 stathz=64
hrtim: minimal inteval is 309917 nsec
gpio0 at omapgpio0: 32 pins
gpio1 at omapgpio1: 32 pins
gpio2 at omapgpio2: 32 pins
gpio3 at omapgpio3: 32 pins
omap2vfs: VFS Control loading
Initializing CPU frequency scaling
boot device: <unknown>
root on sm0
nfs_boot: trying static
nfs_boot: client_addr=192.168.10.4
nfs_boot: gateway=192.168.10.1
nfs_boot: netmask=255.255.255.0
nfs_boot: server=192.168.10.1
nfs_boot: root=192.168.10.1:/home/mira/rootfs
root on 192.168.10.1:/home/mira/rootfs
WARNING: no TOD clock present
WARNING: using filesystem time
WARNING: CHECK AND RESET THE DATE!
warning: no /dev/console
/etc/rc.conf is not configured.  Multiuser boot aborted.
Enter pathname of shell or RETURN for /bin/sh:
Terminal type is vt100.
We recommend creating a non-root account and using su(1) for root access.
#


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