kern/53006: Please support NVIDIA GT730 to kernel

[stackfield0trpg%gmail.com@localhost]

>Number:         53006
>Category:       kern
>Synopsis:       Please support NVIDIA GT730 to kernel
>Confidential:   no
>Severity:       non-critical
>Priority:       medium
>Responsible:    kern-bug-people
>State:          open
>Class:          change-request
>Submitter-Id:   net
>Arrival-Date:   Sat Feb 10 23:10:00 +0000 2018
>Originator:     stackfield
>Release:        NetBSD-current
>Organization:
>Environment:
NetBSD stackbase 8.99.12 NetBSD 8.99.12 (MYKERNEL-$Revision: 1.1174 $) #10: Wed Feb  7 16:30:42 JST 2018  root@stackbase:/usr/src/sys/arch/i386/compile/MYKERNEL i386

>Description:
Hello, Everyone.

I success that netbsd works on my machine on NVIDIA GT730.
GK208B(0x106) chip on GT730 seems almost the same chip as GK208(0x108) chip on GT640(GT630 etc).
i386/amd64 Kernel, an below patched, well works on a console, native x and modular x.

Thanks for your effort.

Index: nouveau_engine_device_nve0.c
===================================================================
RCS file: /cvsroot/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/device/nouveau_engine_device_nve0.c,v
retrieving revision 1.2
diff -r1.2 nouveau_engine_device_nve0.c
215a216,249
>       case 0x106:
>               device->cname = "GK208B";
>               device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
>               device->oclass[NVDEV_SUBDEV_GPIO   ] = &nve0_gpio_oclass;
>               device->oclass[NVDEV_SUBDEV_I2C    ] = &nvd0_i2c_oclass;
>               device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nve0_clock_oclass;
>               device->oclass[NVDEV_SUBDEV_THERM  ] = &nvd0_therm_oclass;
>               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
>               device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;
>               device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;
>               device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;
>               device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
>               device->oclass[NVDEV_SUBDEV_FB     ] =  nve0_fb_oclass;
>               device->oclass[NVDEV_SUBDEV_LTCG   ] =  gf100_ltcg_oclass;
>               device->oclass[NVDEV_SUBDEV_IBUS   ] = &nve0_ibus_oclass;
>               device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
>               device->oclass[NVDEV_SUBDEV_VM     ] = &nvc0_vmmgr_oclass;
>               device->oclass[NVDEV_SUBDEV_BAR    ] = &nvc0_bar_oclass;
>               device->oclass[NVDEV_SUBDEV_PWR    ] = &nv108_pwr_oclass;
>               device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
>               device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvd0_dmaeng_oclass;
>               device->oclass[NVDEV_ENGINE_FIFO   ] =  nv108_fifo_oclass;
>               device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;
>               device->oclass[NVDEV_ENGINE_GR     ] =  nv108_graph_oclass;
>               device->oclass[NVDEV_ENGINE_DISP   ] =  nvf0_disp_oclass;
>               device->oclass[NVDEV_ENGINE_COPY0  ] = &nve0_copy0_oclass;
>               device->oclass[NVDEV_ENGINE_COPY1  ] = &nve0_copy1_oclass;
>               device->oclass[NVDEV_ENGINE_COPY2  ] = &nve0_copy2_oclass;
> #if 0
>               device->oclass[NVDEV_ENGINE_BSP    ] = &nve0_bsp_oclass;
>               device->oclass[NVDEV_ENGINE_VP     ] = &nve0_vp_oclass;
>               device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;
> #endif
>               break;
>How-To-Repeat:

>Fix: