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Re: mips "Creator ci20" port



Hello,

I made some progress:
U-Boot SPL 2013.10-rc3-g9329ab16a204 (Jun 26 2014 - 09:43:22)
SDRAM H5TQ2G83CFR initialization... done


U-Boot 2013.10-rc3-g9329ab16a204 (Jun 26 2014 - 09:43:22)

Board: ci20 (Ingenic XBurst JZ4780 SoC)
DRAM:  1 GiB
NAND:  8192 MiB
MMC:   jz_mmc msc1: 0
In:    eserial3
Out:   eserial3
Err:   eserial3
Net:   dm9000
ci20# dhcp
ERROR: resetting DM9000 -> not responding
dm9000 i/o: 0xb6000000, id: 0x90000a46 
DM9000: running in 8 bit mode
MAC: d0:31:10:ff:7e:89
operating at 100M full duplex mode
BOOTP broadcast 1
DHCP client bound to address 192.168.0.47
*** Warning: no boot file name; using 'C0A8002F.img'
Using dm9000 device
TFTP from server 192.168.0.44; our IP address is 192.168.0.47
Filename 'C0A8002F.img'.
Load address: 0x88000000
Loading: #################################################################
	 #########################
	 316.4 KiB/s
done
Bytes transferred = 1320126 (1424be hex)
ci20# bootm
## Booting kernel from Legacy Image at 88000000 ...
   Image Name:   evbmips 7.99.3 (CI20)
   Image Type:   MIPS NetBSD Kernel Image (gzip compressed)
   Data Size:    1320062 Bytes = 1.3 MiB
   Load Address: 80020000
   Entry Point:  80020000
   Verifying Checksum ... OK
   Uncompressing Kernel Image ... OK
subcommand not supported
ci20# g 80020000
## Starting applicatipmap_steal_memory: seg 0: 0x36d 0x36d 0xffff 0xffff
Loaded initial symtab at 0x802a4b34, strtab at 0x802ca164, # entries 9544
Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
    2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013, 2014
    The NetBSD Foundation, Inc.  All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
    The Regents of the University of California.  All rights reserved.

NetBSD 7.99.3 (CI20) #68: Thu Dec 25 12:56:50 EST 2014
	ml@blackbush:/home/build/obj_evbmips32/sys/arch/evbmips/compile/CI20
Ingenic XBurst
total memory = 1024 MB
avail memory = 1000 MB
mainbus0 (root)
cpu0 at mainbus0: 1200.00MHz (hz cycles = 120000, delay divisor = 12)
cpu0: Ingenic XBurst (0x3ee1024f) Rev. 79 with unknown FPC type (0x330000) Rev. 0
cpu0: 32 TLB entries, 16MB max page size
cpu0: 32KB/32B 8-way set-associative L1 instruction cache
cpu0: 32KB/32B 8-way set-associative write-back L1 data cache
com0 at mainbus0: Ingenic UART, working fifo
com0: console

apbus0 at mainbus0
dwctwo0 at apbus0: USB controller
usb0 at dwctwo0: USB revision 2.0
starting timer interrupt...
uhub0 at usb0: vendor 0000 DWC2 root hub, class 9/0, rev 2.00/1.00, addr 1
uhub1 at uhub0 port 1: vendor 1a40 USB 2.0 Hub [MTT], class 9/0, rev 2.00/1.00, addr 2
uhub1: multiple transaction translators
umass0 at uhub1 port 1 configuration 1 interface 0
umass0: LaCie P'9220 Mobile Drive, rev 2.10/0.06, addr 3
scsibus0 at umass0: 2 targets, 1 lun per target
sd0 at scsibus0 target 0 lun 0: <ST950032, 5AS, 0003> disk fixed
sd0: 465 GB, 16383 cyl, 16 head, 63 sec, 512 bytes/sect x 976773168 sectors
uhub2 at uhub1 port 7: vendor 03eb Standard USB Hub, class 9/0, rev 1.10/3.00, addr 4
axe0 at uhub2 port 1
axe0: D-LINK CORPORAION DUB-E100, rev 2.00/10.01, addr 5
axe0: Ethernet address 00:80:c8:37:00:e1
ukphy0 at axe0 phy 3: OUI 0x0009c3, model 0x0005, rev. 4
ukphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
root device: axe0
dump device: 
file system (default generic): 
root on axe0
mountroot: trying nfs...
nfs_boot: trying BOOTP
axe0: link state UP (was UNKNOWN)
nfs_boot: BOOTP next-server: 0.0.0.0
nfs_boot: my_addr=192.168.0.209
nfs_boot: my_mask=255.255.255.0
nfs_boot: gateway=192.168.0.1


So, things that work now:
- serial console
- time counter, based on on-chip 'Operating System Timer'
- timer interrupt, more or less. After a while the whole thing hangs,
  not sure why yet.
- the OTG port, more or less, without DMA. Not sure why DMA doesn't
  work, or what's the deal with the other USB port.

Should make it to userland relatively soon.

Problems:
- no USB DMA. Might have to restrict DMA maps to the lower 256MB or
  something, we'll see.
- the whole thing hangs at some point, either during USB device
  discovery or shortly after. Might be a problem with the timer
  interrupt, for now it has to be re-scheduled every time, I'll just
  use one of the other timers to fire at 100Hz and see if that helps.

have fun
Michael


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