On 2020/11/24 23:59, Jason Thorpe wrote:
On Nov 24, 2020, at 4:28 AM, Rin Okuyama <rokuyama.rk%gmail.com@localhost> wrote:
CPU_CONTROL_SWP_ENABLE bit is missing for ARMv6. See cp15 c1 register
bit definition on p.3-46 of ARM1176JZF-S Technical Reference Manual:
| [10] F bit - Should Be Zero
Also, it does not work for MULTIPROCESSOR in principle:
Why?
Oops, it was wrong. ARM ARM "ARMv7-A and ARMv7-R edition", or, more
concisely, their web page says swp{,b} instructions on ARMv7 work for
MP system:
https://developer.arm.com/documentation/dht0008/a/swp-and-swpb/legacy-synchronization-instructions/limitations-of-swp-and-swpb