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Re: [2/2 ABI and toolchain part] Support Raspberry Pi [0-3] in big-endian mode



> On Nov 24, 2020, at 4:28 AM, Rin Okuyama <rokuyama.rk%gmail.com@localhost> wrote:
> 
> CPU_CONTROL_SWP_ENABLE bit is missing for ARMv6. See cp15 c1 register
> bit definition on p.3-46 of ARM1176JZF-S Technical Reference Manual:
> 
> | [10] F bit - Should Be Zero
> 
> Also, it does not work for MULTIPROCESSOR in principle:

Why?

-- thorpej



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