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Re: boot problems with bge(4)



On 06/06/11 20:33, SAITOH Masanobu wrote:
(2011/06/06 23:55), Christoph Egger wrote:
On 06/06/11 16:26, SAITOH Masanobu wrote:
Thank you Christoph.

I don't know why the following code fails:

          if (pci_get_capability(sc->sc_pc, sc->sc_pcitag,
PCI_CAP_PCIEXPRESS,
                  &sc->bge_pciecap, NULL) != 0) {
                  /* PCIe */
                  sc->bge_flags |= BGE_PCIE;
                  bge_set_max_readrq(sc);
          }

The driver iterates the while-loop in pci_get_capability() three times
and returns 0 then.

Christoph

I'm afraid that your system has problem in the pci config registers.

In pci_get_capability() I dumped the values of PCI_CAPLIST_CAP(reg)
in the while loop.

The output:
pci_get_capability: PCI_CAPLIST_CAP 0x1
pci_get_capability: PCI_CAPLIST_CAP 0x3
pci_get_capability: PCI_CAPLIST_CAP 0x9
pci_get_capability: PCI_CAPLIST_CAP 0x5


The first is PCI_CAP_PWRMGMT,
the secons is PCI_CAP_VPD,
the third is PCI_CAP_VENDSPEC
and the fourth is PCI_CAP_MSI.

Could you show me the message of "pcictl pci0 dump -d 20"? It seems
your are using NFS boot.

Yes.

Can you boot from a disk?

No, but sometimes it happens that the dhcp request succeeds. When that
happens the machine happens.

Here the output of
"pcictl pci0 dump -d 20 -f 6":

PCI configuration registers:
  Common header:
    0x00: 0x169914e4 0x00100006 0x02000001 0x00000010

    Vendor Name: Broadcom (0x14e4)
    Device Name: BCM5785G 10/100/1000 Ethernet (0x1699)
    Command register: 0x0006
      I/O space accesses: off
      Memory space accesses: on
      Bus mastering: on
      Special cycles: off
      MWI transactions: off
      Palette snooping: off
      Parity error checking: off
      Address/data stepping: off
      System error (SERR): off
      Fast back-to-back transactions: off
      Interrupt disable: off
    Status register: 0x0010
      Interrupt status: inactive
      Capability List support: on
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: off
      Data parity error detected: off
      DEVSEL timing: fast (0x0)
      Slave signaled Target Abort: off
      Master received Target Abort: off
      Master received Master Abort: off
      Asserted System Error (SERR): off
      Parity error detected: off
    Class Name: network (0x02)
    Subclass Name: ethernet (0x00)
    Interface: 0x00
    Revision ID: 0x01
    BIST: 0x00
    Header Type: 0x00 (0x00)
    Latency Timer: 0x00
    Cache Line Size: 0x10

  Type 0 ("normal" device) header:
    0x10: 0xffb00004 0x00000000 0x00000000 0x00000000
    0x20: 0x00000000 0x00000000 0x00000000 0x169914e4
    0x30: 0x00000000 0x00000048 0x00000000 0x0000030a

    Base address register at 0x10
      type: 64-bit nonprefetchable memory
      base: 0x00000000ffb00000, not sized
    Base address register at 0x18
      not implemented(?)
    Base address register at 0x1c
      not implemented(?)
    Base address register at 0x20
      not implemented(?)
    Base address register at 0x24
      not implemented(?)
    Cardbus CIS Pointer: 0x00000000
    Subsystem vendor ID: 0x14e4
    Subsystem ID: 0x1699
    Expansion ROM Base Address: 0x00000000
    Capability list pointer: 0x48
    Reserved @ 0x38: 0x00000000
    Maximum Latency: 0x00
    Minimum Grant: 0x00
    Interrupt pin: 0x03 (pin C)
    Interrupt line: 0x0a

  Capability register at 0x48
    type: 0x01 (Power Management, rev. 1.0)
  Capability register at 0x40
    type: 0x03 (VPD)
  Capability register at 0x60
    type: 0x09 (Vendor-specific)
  Capability register at 0x50
    type: 0x05 (MSI)

  PCI Message Signaled Interrupt
    Message Control register: 0x0080
      MSI Enabled: no
      Multiple Message Capable: no (1 vector)
      Multiple Message Enabled: off (1 vector)
      64 Bit Address Capable: yes
      Per-Vector Masking Capable: no
    Message Address (lower) register: 0xd101a084
    Message Address (upper) register: 0x23858888
    Message Data register: 0x00009118

  PCI Power Management Capabilities Register
    Capabilities register: 0xc003
      Version: 1.2
      PME# clock: off
      Device specific initialization: off
      3.3V auxiliary current: self-powered
      D1 power management state support: off
      D2 power management state support: off
      PME# support: 0x18
    Control/status register: 0x2108
      Power state: D0
      PCI Express reserved: off
      No soft reset: on
      PME# assertion enabled
      PME# status: off

  Device-dependent header:
    0x40: 0x80986003 0xffffffff 0xc0034001 0x0a002108
    0x50: 0x00800005 0xd101a084 0x23858888 0x00009118
    0x60: 0x006c5009 0xf7a0ffa2 0xf0410088 0x761b000f
    0x70: 0x00001292 0x00000000 0x00005804 0x00000000
    0x80: 0x00000000 0x083cb001 0x04130034 0x0008c082
    0x90: 0x01000609 0x00000000 0x00000000 0x0000004e
    0xa0: 0x00000000 0x0000014f 0x00000000 0x00000171
    0xb0: 0x00000000 0x00000000 0x00000000 0x05785041
    0xc0: 0x00000000 0x169914e4 0x0000000e 0x00000000
    0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xf0: 0x00000000 0x00000000 0x00000000 0x00000000



(2011/06/06 22:13), Christoph Egger wrote:
On 06/03/11 18:37, Christoph Egger wrote:
On 03.06.11 17:55, SAITOH Masanobu wrote:
Hi Christoph.

BCM5785 should not be PCIX chip. It's PCIe chip.

I suspect that your have some local patches for if_bge.c
Could you mail it to me? Please.

Yes, I can do that on monday.

Here we go.

Christoph


Thanks.

(2011/06/03 21:58), Christoph Egger wrote:
On 06/03/11 14:18, Christoph Egger wrote:

Hi,


[...]
bge0 at pci0 dev 20 function 6: Broadcom BCM5785G Gigabit Ethernet
bge0: interrupting at ioapic1 pin 18, event channel 9
bge0: unable to find PCIX capability
bge0: firmware handshake timed out, val = 4b657654
bge0: firmware handshake timed out, val = 4b657654
bge0: ASIC unknown BCM5785 (0x5785041), Ethernet address
00:00:1a:1a:d8:ab
brgphy0 at bge0 phy 1: BCM5785 1000BASE-T media interface, rev. 3
brgphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT,
1000baseT-FD , auto
[...]

I have a local patch to attach brgphy on bge(4) rather ukphy(4) ...


bge0: firmware handshake timed out, val = 4b657654
bge0: firmware handshake timed out, val = 4b657654
bge0: discarding oversize frame (len=-4)
bge0: discarding oversize frame (len=-4)
nfs_boot: trying DHCP/BOOTP
bge0: watchdog timeout -- resetting
bge0: firmware handshake timed out, val = 4b657654
bge0: firmware handshake timed out, val = 4b657654
bge0: discarding oversize frame (len=-4)
bge0: discarding oversize frame (len=-4)
nfs_boot: timeout...
nfs_boot: timeout...


The "discarding oversize frame" message comes from if_ethersubr.c

I just figured out in bge_rxeof():

        m->m_pkthdr.len = m->m_len = cur_rx->bge_len - ETHER_CRC_LEN;

cur_rx->bge_len is 0.

Christoph



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