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Re: nick-nhusb merge coming soon



On 2016/04/14 18:29, Takahiro Hayashi wrote:
On 2016/04/14 17:40, Nick Hudson wrote:
I summarise known problems:

+ KASSERT(sc->sc_command_addr == 0) in xhci_do_command() may fail.
+ My ASM1042 card does not work at all.  No interrupts.
  It works on FreeBSD and OpenBSD.


http://nxr.netbsd.org/xref/src-freebsd/sys/dev/usb/controller/xhci.c#1226

Is that relevant here?

Not sure, but I'll try it.

When I plug in USB drive to asm1042 port, no interrupts happen
as far as I see vmstat -iv.

# dmesg|grep xhci1
xhci1 at pci3 dev 0 function 0: vendor 1b21 product 1042 (rev. 0x00)
xhci1: interrupting at msi2 vec 0
xhci1: xHCI version 0.96
xhci1: hcs1=4000820 hcs2=17f1 hcs3=0
xhci1: hcc=0x200f180<XECP=0x200,MAXPSA=0xf,FSE,NSS>
xhci1: xECP 800
xhci1: ECR 800: 00000401
xhci1: ECR 810: 03000402
xhci1: SP: 03000402 20425355 00000201
xhci1: ECR 820: 02000002
xhci1: SP: 02000002 20425355 00010203
xhci1: PAGESIZE 0x00000001
xhci1: sc_pgsz 0x00001000
xhci1: sc_maxslots 0x00000020
xhci1: sc_maxports 4
xhci1: sc_maxspbuf 0
xhci1: eventst: NORMAL_COMPLETION 00000000dc3f6fc0 0xffff800046cb5fc0 1000
xhci1: dcbaa: NORMAL_COMPLETION 00000000dc3f8000 0xffff800046cb7000 1000
xhci1: setting IMOD 0
xhci1: USBCMD 00000005
usb1 at xhci1: USB revision 3.0
# vmstat -iv | grep msi2
msi2 vec 0                                        0        0

When the drive is connected at boot, uhub detects the device by
scanning all ports forcibly but xhci_new_device fails ENABLE_SLOT
with command timeout.  In this case total interruput counts
of asm1042 is 0, too.

I attach pcictl dump of this card.


Thanks,
--
t-hash
# pcictl pci3 dump -d 0
PCI configuration registers:
  Common header:
    0x00: 0x10421b21 0x00100006 0x0c033000 0x00000010

    Vendor Name: ASMedia (0x1b21)
    Device Name: ASM1042 USB 3.0 Host Controller (0x1042)
    Command register: 0x0006
      I/O space accesses: off
      Memory space accesses: on
      Bus mastering: on
      Special cycles: off
      MWI transactions: off
      Palette snooping: off
      Parity error checking: off
      Address/data stepping: off
      System error (SERR): off
      Fast back-to-back transactions: off
      Interrupt disable: off
    Status register: 0x0010
      Immediate Readness: off
      Interrupt status: inactive
      Capability List support: on
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: off
      Data parity error detected: off
      DEVSEL timing: fast (0x0)
      Slave signaled Target Abort: off
      Master received Target Abort: off
      Master received Master Abort: off
      Asserted System Error (SERR): off
      Parity error detected: off
    Class Name: serial bus (0x0c)
    Subclass Name: USB (0x03)
    Interface: 0x30
    Revision ID: 0x00
    BIST: 0x00
    Header Type: 0x00 (0x00)
    Latency Timer: 0x00
    Cache Line Size: 64bytes (0x10)

  Type 0 ("normal" device) header:
    0x10: 0xff800004 0x00000000 0x00000000 0x00000000
    0x20: 0x00000000 0x00000000 0x00000000 0x2104174c
    0x30: 0x00000000 0x00000050 0x00000000 0x0000010b

    Base address register at 0x10
      type: 64-bit nonprefetchable memory
      base: 0x00000000ff800000, not sized
    Base address register at 0x18
      not implemented(?)
    Base address register at 0x1c
      not implemented(?)
    Base address register at 0x20
      not implemented(?)
    Base address register at 0x24
      not implemented(?)
    Cardbus CIS Pointer: 0x00000000
    Subsystem vendor ID: 0x174c
    Subsystem ID: 0x2104
    Expansion ROM Base Address: 0x00000000
    Capability list pointer: 0x50
    Reserved @ 0x38: 0x00000000
    Maximum Latency: 0x00
    Minimum Grant: 0x00
    Interrupt pin: 0x01 (pin A)
    Interrupt line: 0x0b

  Capability register at 0x50
    type: 0x05 (MSI)
  Capability register at 0x68
    type: 0x11 (MSI-X)
  Capability register at 0x78
    type: 0x01 (Power Management)
  Capability register at 0x80
    type: 0x10 (PCI Express)

  PCI Power Management Capabilities Register
    Capabilities register: 0x0043
      Version: 1.2
      PME# clock: off
      Device specific initialization: off
      3.3V auxiliary current: 55 mA
      D1 power management state support: off
      D2 power management state support: off
      PME# support D0: off
      PME# support D1: off
      PME# support D2: off
      PME# support D3 hot: off
      PME# support D3 cold: off
    Control/status register: 0x0000
      Power state: D0
      PCI Express reserved: off
      No soft reset: off
      PME# assertion: disabled
      PME# status: off
    Bridge Support Extensions register: 0x00
      B2/B3 support: off
      Bus Power/Clock Control Enable: off
    Data register: 0x00

  PCI Message Signaled Interrupt
    Message Control register: 0x0087
      MSI Enabled: on
      Multiple Message Capable: yes (8 vectors)
      Multiple Message Enabled: off (1 vector)
      64 Bit Address Capable: on
      Per-Vector Masking Capable: off
    Message Address (lower) register: 0xfee00000
    Message Address (upper) register: 0x00000000
    Message Data register: 0x00000063

  PCI Express Capabilities Register
    Capability register: 0012
      Capability version: 2
      Device type: Legacy PCI Express Endpoint device
      Slot implemented: off
      Interrupt Message Number: 0
    Device Capabilities Register: 0x00008202
      Max Payload Size Supported: 512 bytes max
      Phantom Functions Supported: not available
      Extended Tag Field Supported: 5bit
      Endpoint L0 Acceptable Latency: Less than 64ns
      Endpoint L1 Acceptable Latency: 1us to less than 2us
      Attention Button Present: off
      Attention Indicator Present: off
      Power Indicator Present: off
      Role-Based Error Report: on
      Captured Slot Power Limit Value: 0
      Captured Slot Power Limit Scale: 0
      Function-Level Reset Capability: off
    Device Control Register: 0x2820
      Correctable Error Reporting Enable: off
      Non Fatal Error Reporting Enable: off
      Fatal Error Reporting Enable: off
      Unsupported Request Reporting Enable: off
      Enable Relaxed Ordering: off
      Max Payload Size: 256 byte
      Extended Tag Field Enable: off
      Phantom Functions Enable: off
      Aux Power PM Enable: off
      Enable No Snoop: on
      Max Read Request Size: 512 byte
    Device Status Register: 0x0000
      Correctable Error Detected: off
      Non Fatal Error Detected: off
      Fatal Error Detected: off
      Unsupported Request Detected: off
      Aux Power Detected: off
      Transaction Pending: off
    Link Capabilities Register: 0x0103fc12
      Maximum Link Speed: 5.0GT/s
      Maximum Link Width: x1 lanes
      Active State PM Support: L0s and L1 supported
      L0 Exit Latency: More than 4us
      L1 Exit Latency: More than 64us
      Port Number: 1
      Clock Power Management: off
      Surprise Down Error Report: off
      Data Link Layer Link Active: off
      Link BW Notification Capable: off
      ASPM Optionally Compliance: off
    Link Control Register: 0x0040
      Active State PM Control: disabled
      Read Completion Boundary Control: 64bytes
      Link Disable: off
      Retrain Link: off
      Common Clock Configuration: on
      Extended Synch: off
      Enable Clock Power Management: off
      Hardware Autonomous Width Disable: off
      Link Bandwidth Management Interrupt Enable: off
      Link Autonomous Bandwidth Interrupt Enable: off
      DRS Signaling Control: not reported
    Link Status Register: 0x1012
      Negotiated Link Speed: 5.0GT/s
      Negotiated Link Width: x1 lanes
      Training Error: off
      Link Training: off
      Slot Clock Configuration: on
      Data Link Layer Link Active: off
      Link Bandwidth Management Status: off
      Link Autonomous Bandwidth Status: off
    Device Capabilities 2: 0x00000000
      Completion Timeout Ranges Supported: 0
      Completion Timeout Disable Supported: off
      ARI Forwarding Supported: off
      AtomicOp Routing Supported: off
      32bit AtomicOp Completer Supported: off
      64bit AtomicOp Completer Supported: off
      128-bit CAS Completer Supported: off
      No RO-enabled PR-PR passing: off
      LTR Mechanism Supported: off
      TPH Completer Supported: 0
      LN System CLS: Not supported or not in effect
      OBFF Supported: Not supported
      Extended Fmt Field Supported: off
      End-End TLP Prefix Supported: off
      Max End-End TLP Prefixes: 0
      FRS Supported: off
    Device Control 2: 0x0000
      Completion Timeout Value: 50us to 50ms
      Completion Timeout Disabled: off
      ARI Forwarding Enabled: off
      AtomicOp Rquester Enabled: off
      AtomicOp Egress Blocking: off
      IDO Request Enabled: off
      IDO Completion Enabled: off
      LTR Mechanism Enabled: off
      OBFF: Disabled
      End-End TLP Prefix Blocking on: off
    Link Capabilities 2: 0x00000000
      Supported Link Speed Vector:
      Crosslink Supported: off
      Lower SKP OS Generation Supported Speed Vector:
      Lower SKP OS Reception Supported Speed Vector:
      DRS Supported: off
    Link Control 2: 0x0002
      Target Link Speed: 5.0GT/s
      Enter Compliance Enabled: off
      HW Autonomous Speed Disabled: off
      Selectable De-emphasis: off
      Transmit Margin: 0
      Enter Modified Compliance: off
      Compliance SOS: off
      Compliance Present/De-emphasis: 0
    Link Status 2: 0x0000
      Current De-emphasis Level: off
      Equalization Complete: off
      Equalization Phase 1 Successful: off
      Equalization Phase 2 Successful: off
      Equalization Phase 3 Successful: off
      Link Equalization Request: off
      Retimer Presence Detected: off

  MSI-X Capability Register
    Message Control register: 0x0007
      Table Size: 8
      Function Mask: off
      MSI-X Enable: off
    Table offset register: 0x00002000
      Table offset: 00002000
      BIR: 0x0
    Pending bit array register: 0x00002080
      Pending bit array offset: 00002080
      BIR: 0x0

  Device-dependent header:
    0x40: 0x00000000 0x02116160 0x00000000 0x00000000
    0x50: 0x00876805 0xfee00000 0x00000000 0x00000063
    0x60: 0x00002030 0x00000000 0x00077811 0x00002000
    0x70: 0x00002080 0x00000000 0x00438001 0x00000000
    0x80: 0x00120010 0x00008202 0x00002820 0x0103fc12
    0x90: 0x10120040 0x00000000 0x00000000 0x00000000
    0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xb0: 0x00000002 0x00000000 0x00000000 0x00000000
    0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xf0: 0x00000000 0x00000000 0x00000000 0x00000000

  Extended Capability Register at 0x100
    type: 0x0002 (Virtual Channel)
    version: 1

  Virtual Channel Register
    Port VC Capability register 1: 0x00000000
      Extended VC Count: 0
      Low Priority Extended VC Count: 0
      Reference Clock: 100ns
      Port Arbitration Table Entry Size: 1bit
    Port VC Capability register 2: 0x00000000
      Hardware fixed arbitration scheme: off
      WRR arbitration with 32 phases: off
      WRR arbitration with 64 phases: off
      WRR arbitration with 128 phases: off
      VC Arbitration Table Offset: 0x0
    Port VC Control register: 0x0000
      VC Arbitration Select: 0x0
    Port VC Status register: 0x0000
      VC Arbitration Table Status: off
    VC number 0
      VC Resource Capability Register: 0x00000000
        Non-configurable Hardware fixed arbitration scheme: off
        WRR arbitration with 32 phases: off
        WRR arbitration with 64 phases: off
        WRR arbitration with 128 phases: off
        Time-based WRR arbitration with 128 phases: off
        WRR arbitration with 256 phases: off
        Advanced Packet Switching: off
        Reject Snoop Transaction: off
        Maximum Time Slots: 1
        Port Arbitration Table offset: 0x00
      VC Resource Control Register: 0x80000001
        TC/VC Map: 01
        Port Arbitration Select: 0
        VC ID 0
        VC Enable: on
      VC Resource Status Register: 0x00000000
        Port Arbitration Table Status: off
        VC Negotiation Pending: off

  Extended Configuration Space:
    0x100: 0x00010002 0x00000000 0x00000000 0x00000000
    0x110: 0x00000000 0x80000001 0x00000000 0x00000000
    0x120: 0x00000000 0x00000000 0x00000000 0x00000000
# [snip repeated 0s]
    0xff0: 0x00000000 0x00000000 0x00000000 0x00000000
#


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