re: 4byte aligned com(4) and PCI_MAPREG_TYPE_MEM

[matthew green <mrg%eterna.com.au@localhost>]

> Such byte lane offset adjust ment is required only if
> - byte registers are wired to LSByte in 32bit bus
> - byte lane wiring are swapped by hardware (like osiop(4))
> but most (all?) PCI bus_space(9) implementations swap
> byteorder of PCI access by software (i.e. in MD bus_space(9)).

FYI:  not all -- sparc64 either maps PCI space as little
endian or uses little endian accesses, both of which give
you the byte swapped data directly.


.mrg.