tech-kern archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

Re: WD_QUIRK_FORCE_LBA48



On Mon, Dec 07, 2009 at 09:34:48PM +0100, Michael van Elst wrote:
> On Mon, Dec 07, 2009 at 10:16:25AM +0100, Manuel Bouyer wrote:
> 
> > LBA48 uses the same LBA registers as LBA24, you write to
> > the registers twice to give transfers LBA and size. Some controllers
> > designed before LBA48 may have unpredictable behavior with such
> > write sequence.
> 
> I can understand this to be a problem for SATA,

Actually I'd expect all SATA controllers to handle LBA48 properly, they're
recent enough.

> but with PATA the
> 'controller' and the registers are part of the drive electronics.

No, there really is a controller between the drive and the host. It's
this electronic which handles DMA for example. 
If the controller is dumb, it's just a bridge between the host's bus and
the drive, and LBA48 should work. But, for some reason, there are
controllers which keeps shadow registers on their side (see the issues with
the CMD0640, where some of these shadow registers are shared between the
2 channels, which makes concurent I/O on both channels impossible),
and/or snoops the traffic between the host and drive to guess details of
the transfers.

-- 
Manuel Bouyer <bouyer%antioche.eu.org@localhost>
     NetBSD: 26 ans d'experience feront toujours la difference
--


Home | Main Index | Thread Index | Old Index