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Re: basic support for (software concept) "pci domains" in the MI pci code

On Mon, Aug 24, 2009 at 06:23:47AM +1000, matthew green wrote:
> in the way i see it, a single psycho* chip implements a single
> domain -- which has two pci busses.  on multiboard systems, each
> board with a psycho* would be a different domain.
> separate domains exist when pci bus numbers are re-used.  eg,
> when something has two "bus 0"'s.  i understand that happens on
> macppc platforms.

And also alpha:
tsc0 at mainbus0: 21272 Core Logic Chipset, Cchip rev 0
tsc0: 4 Dchips, 1 memory bus of 32 bytes
tsc0: arrays present: 1024MB (split), 0MB, 0MB, 0MB, Dchip 0 rev 1
tsp0 at tsc0
pci0 at tsp0 bus 0
tsp1 at tsc0
pci1 at tsp1 bus 0

I've not seen something similar on x86 yet. On all x86 systems I have
access, each PCI bus has an independant bus number.

Manuel Bouyer <>
     NetBSD: 26 ans d'experience feront toujours la difference

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