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Re: Power Management Framework architectural design
> Let me ask a possibly stupid question (my experience is restricted to
> with very simple power topologies):
> Are "power domain" and "clock domain" in general hierachical?
> Or is it just a cloud of bus-wise unrelated devices sharing a power
In the case of OMAP2, there are practically three divisions. First the
source clock trees, which define child clocks that are dependent on
particular parent clocks; this division can be visualized as a tree
with multiple branches. Second there are clock domains, which describe
a group of clocks that together enable functions of that particular
subsystem; a simple group of clocks. Third there are power domains,
which describe power source sectors in the system, parts of the chip
that have independent power state control; these are also simple groups.
The trick here is though, that these three divides don't respect
eachother, as power domains can contain one or more clock domains, and
a clock domain can belong to one or more power domains. Source clock
trees also span across power domains but are loosely respective of
clock domain boundaries.
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