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Re: Power Management Framework architectural design

On Thu, Apr 10, 2008 at 10:02:49AM +0000, Juha Keski-Saari wrote:
> Wouldn't this remove the particular problem in the case of OMAP2 and
> enable platform dependent logic, unless there is a platform with no
> clock control and driven by power domain states... but even then this
> idea could be functional by motivating the power domain transitions
> through its member states.

Let me repeat the question. The problem is that on most architectures we
have very limited information about power domains, clock domains are
even less well supported. For PCI centric systems you can normally only
approximate this by considering each (bus,device) pair a single clock
domain and (bus,device,function) a power domain. This doesn't always
apply, when you add SuperIO chipsets, but it is a good first case
approximation. ACPI exports the power domain data in some cases, but it
is far from being complete. It also provides limited mechanisms to power
down a power domain. For PCI again bus specific options are often
possible. So the fine grained control in the embedded space is very
specific and therefore I am not sure how to properly abstract it so that
both cases can be fulfilled.


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