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RE: Power Management Framework architectural design
> I've asked Matt for a dmesg of an actual system and it seems
> the ARM device tree is quite flat. So the device central
> approach of PMF should work quite well for this if obio
> registers a bus layer to do powering down of unused part. You
> can use the idle time facility as well.
> What currently is missing is proper high-level support for
> power domains (e.g. multiple devices sharing power
> resources). Another item is lower power states with wake up
> notification on events. That's something at least useful in
> the context of USB and Firewire on all ports with support for
> those, but I think it applies to other parts as well.
The device tree is flat for the eval boards we current support in the
tree, but it's not clear to me that it will remain that way for shipping
Also, power management in OMAP isn't as simple as device on - device
off. We have additional complexity in terms of changing clock rates to
put devices into reduced power state and the amazingly 'rich' clock
domain and power domain trees.
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