CVS commit: src/sys/arch/riscv/starfive

["Nick Hudson" <skrll%netbsd.org@localhost>]

Module Name:    src
Committed By:   skrll
Date:           Wed Sep 18 10:37:03 UTC 2024

Modified Files:
        src/sys/arch/riscv/starfive: jh7110_clkc.c jh71x0_clkc.h

Log Message:
risc-v: add reset support to the JH7110 SOC clock controller driver


To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/riscv/starfive/jh7110_clkc.c
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/riscv/starfive/jh71x0_clkc.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.