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CVS commit: [netbsd-4] src/sys/arch
Module Name: src
Committed By: bouyer
Date: Fri Feb 22 20:36:51 UTC 2008
Modified Files:
src/sys/arch/hpcmips/conf [netbsd-4]: GENERIC TX3912 TX3922
src/sys/arch/hpcmips/tx [netbsd-4]: tx39power.c
src/sys/arch/mips/mips [netbsd-4]: cache_tx39.c locore_mips1.S
Log Message:
Pull up following revision(s) (requested by tsutsui in ticket #1065):
sys/arch/mips/mips/locore_mips1.S: revision 1.64
sys/arch/hpcmips/conf/TX3912: revision 1.68
sys/arch/hpcmips/conf/TX3922: revision 1.80
sys/arch/hpcmips/conf/GENERIC: revision 1.199
sys/arch/hpcmips/tx/tx39power.c: revision 1.18
sys/arch/mips/mips/cache_tx39.c: revision 1.6
Make these TX39xx stuff compile without "-mips2" option.
TX39xx has a sync instruction, but it doesn't support all mips2 instructions.
Add "-mdivide-breaks" to CPUFLAGS in GENERIC, and
use "-march=r3900" for CPUFLAGS in TX3912 and TX3922.
To generate a diff of this commit:
cvs rdiff -r1.194.2.1 -r1.194.2.2 src/sys/arch/hpcmips/conf/GENERIC
cvs rdiff -r1.67 -r1.67.6.1 src/sys/arch/hpcmips/conf/TX3912
cvs rdiff -r1.78 -r1.78.6.1 src/sys/arch/hpcmips/conf/TX3922
cvs rdiff -r1.17 -r1.17.12.1 src/sys/arch/hpcmips/tx/tx39power.c
cvs rdiff -r1.5 -r1.5.24.1 src/sys/arch/mips/mips/cache_tx39.c
cvs rdiff -r1.60 -r1.60.22.1 src/sys/arch/mips/mips/locore_mips1.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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