On 2021-07-07 14:04, Mouse wrote:
Well, CLRO clearly can be identical to CLRH, since they will do exactly the same (same with D-float and quad).Quite so.The MOV(s) can't be shared, since the FP MOVs are expected to cause FP exceptions for some valua.I'd have to check, but I think they also set the N bit based on a different bit of the data. (I think ZVC should be identical between MOVH and MOVO.)
Right. Sign is in bit 15 for all floating point formats.
It's possibly arguable that there should be a CLRR or some such, [...] admittedly CLRR feels less VAXy than the others, in that instructions that work only on registers are relatively rare.You do have PUSHR and POPR, which falls in exactly the same category...True. Not that it's terribly relevant to CLRQ and CLRO; the VAX has plenty of TMTOWTDI scattered around.
Well, it was mostly a comment in the context of a CLRR.Speaking of odd things. Why on earth did they define a PUSHL instruction, but no POPL?
Johnny
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