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Re: support for FPU-less VAX?



On 2015-10-01 12:57, Felix Deichmann wrote:
2015-10-01 12:21 GMT+02:00 Johnny Billquist <bqt%update.uu.se@localhost>:
I'm not sure there ever was any VAX cpu that did not execute FP
instructions.

Would be great, but

    http://www.dtjcd.vmsresource.org.uk/pdfs/dtj_v01-07_aug1988.pdf

on page 96 gave me the impression that the 70 F, D, G FP instructions
are not implemented on the 78034:

"The chip fully executes 181 instructions and provides microcode
operand parsing for 21 instructions that are emulated with macrocode.
The chip passes 70 F, D, G floating point instructions to a companion
floating point chip. The remaining 32 instructions are fully emulated
in macrocode."

I thought if the CFPA is missing, maybe the CPU will raise exceptions
for FP instructions for emulation to take place.

Ah, well. If we start talking about specific floating point formats, then yes. There are some formats that are not supported by some CPUs, and will trap.

	Johnny



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