[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
Re: NetBSD 8.0 on a Mac LC III
On Oct 10, 2018, at 14:24, Martin Husemann <martin%duskware.de@localhost> wrote:
>> On Wed, Oct 10, 2018 at 02:16:46PM -0400, David Riley wrote:
>> I have a theoretical
>> design for an ESP32-based one with a tiny CPLD for handling the SCSI
>> physical interface, but haven't had the time to prototype anything.
> Now that is a superb idea - I have some spare ESP32, need to get
> few miis for it. What CPLD do you have in mind?
Depends on how I approach it. SCSI is very dependent on flow control, and unfortunately there aren’t many high-bandwidth interfaces on ESP32 that support any kind of flow control. As I see it, there are two approaches:
- The “right” way: a small CPLD (Altera Max II, which is really a very small FPGA if you look at the architecture) acts as the master for the SDIO receiver on the ESP32; this allows the SCSI bus to dictate the flow, but the CPU can still DMA the data out, the CPLD just modifies the clock. The smallest Max IIs might be a little too small to reasonably implement the SDIO master, though.
- The easier way: use a slightly larger tiny FPGA (MAX 10, which also has block RAMs) to act as a QSPI receiver and buffer things by block. There’s at least enough RAM even on the smallest one to buffer up two 4K blocks, so it should be enough, it just (irrationally) feels wasteful.
The voltage conversion, obviously, would be done by external buffers, but even using the slightly weird SDIO method (4 bits x 40 MHz), it should be able to hit SCSI-3 (20 MB/s) speeds. Beyond that, you need LVD anyway, and LVD transceivers are EOL and expensive now.
Main Index |
Thread Index |