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Re: Question about caching



At 19:43 Uhr +0000 27.8.2009, Michael van Elst wrote:
>If you use a mapping that inhibits caching
>then you get 1:1 bus cycles, if you use a mapping that allows
>caching you get cache fill and push cycles. Using two mappings
>to the same physical address but with different cache modes
>rarely makes no sense.

I guess Jason's problem is not whether this makes sense or not.

He needs to know if the CPU will actively prohibit overlapping mappings
from having differing cache attributes, or whether the unhappy programmer
has to explicitely make sure the mappings' cache attributes are consistent.
Jason?

        hauke

--
"It's never straight up and down"     (DEVO)




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