Re: iMX6

[Ryo Shimizu <ryo%nerv.org@localhost>]

>	I have tried to boot same kernel on MSC Qsevent board. I obtain :
>Q7-IMX6 # go 10800000
>## Starting application at 0x10800000 ...
>   PC=0x10800024
>   SP=0x8f733e08
>CPSR=0x600001d3
><cortex_init>@ABC12-</cortex_init>
><mmu_init_table></mmu_init_table>
><arm_cpuinit>FG01H1IJKLM</arm_cpuinit>
>@ABC12-FG01H1IJKLM@ABC12-FG01H1IJKLM@ABC12-FG01H1IJKLM
>MULTIPROCESSOR hatched!
>jump to start()
>
>uboot arg = 0x1, 0x8f73a04c, 0x8f73a04c, 0x10800000
>
>NetBSD/evbarm (nitrogen6) booting ...
>initarm: Configuring system (4 cpus, hatched 0xe), CLIDR=1110000003 
>CTR=0x83338003
>arm32_bootmem_init: memstart=0x10000000, memsize=0x80000000, 
>kernelstart=0x10800000
>arm32_bootmem_init: kernelend=0x11256000
>arm32_bootmem_init: adding 259797 free pages: [0x11256000..0x8fffffff] 
>(VA 0x81256000)
>arm32_bootmem_init: adding 1024 free pages: [0x10000000..0x107fffff] (VA 
>0x80000000)
>arm32_kernel_vm_init: changing pmap_directbase to 0x40000000
>arm32_kernel_vm_init: 0 L2 pages are needed to map 0xaa6000 kernel bytes
>arm32_kernel_vm_init: allocating page tables for kernel vmadd_pages: 
>adding pv 0x8122aa60 (pa 0x11256000, va 0x81256000, 1 pages) at tail
>add_pages: appending pv 0x8123d450 (0x11258000..0x1125bfff) to 
>0x11256000..0x11257fff
>add_pages: appending pv 0x8122b708 (0x1125c000..0x1125dfff) to 
>0x11256000..0x1125bfff
>add_pages: appending pv 0x8122b71c (0x1125e000..0x1125ffff) to 
>0x11256000..0x1125dfff
>add_pages: appending pv 0x8122b730 (0x11260000..0x11261fff) to 
>0x11256000..0x1125ffff
>add_pages: appending pv 0x8122b744 (0x11262000..0x11263fff) to 
>0x11256000..0x11261fff
>add_pages: appending pv 0x8122b758 (0x11264000..0x11265fff) to 
>0x11256000..0x11263fff
>add_pages: appending pv 0x8122b76c (0x11266000..0x11267fff) to 
>0x11256000..0x11265fff
>add_pages: appending pv 0x8122b780 (0x11268000..0x11269fff) to 
>0x11256000..0x11267fff
>arm32_kernel_vm_init: allocating stacks
>add_pages: appending pv 0x8122ba38 (0x1126a000..0x11271fff) to 
>0x11256000..0x11269fff
>add_pages: appending pv 0x8122ba24 (0x11272000..0x11279fff) to 
>0x11256000..0x11271fff
>add_pages: appending pv 0x8122ba10 (0x1127a000..0x11281fff) to 
>0x11256000..0x11279fff
>add_pages: appending pv 0x8122b9fc (0x11282000..0x11289fff) to 
>0x11256000..0x11281fff
>add_pages: appending pv 0x8122b9e8 (0x1128a000..0x11291fff) to 
>0x11256000..0x11289fff
>add_pages: appending pv 0x8122ba4c (0x11292000..0x11293fff) to 
>0x11256000..0x11291fff
>add_pages: appending pv 0x8122aa98 (0x11294000..0x11297fff) to 
>0x11256000..0x11293fff
>Creating L1 page table at 0x11258000
>arm32_kernel_vm_init: adding L2 pt (VA 0x81256000, PA 0x11256000) for VA 
>0xc0000000 (vm)
>arm32_kernel_vm_init: adding L2 pt (VA 0x8125c000, PA 0x1125c000) for VA 
>0xc0800000 (vm)
>arm32_kernel_vm_init: adding L2 pt (VA 0x8125e000, PA 0x1125e000) for VA 
>0xc1000000 (vm)
>arm32_kernel_vm_init: adding L2 pt (VA 0x81260000, PA 0x11260000) for VA 
>0xc1800000 (vm)
>arm32_kernel_vm_init: adding L2 pt (VA 0x81262000, PA 0x11262000) for VA 
>0xc2000000 (vm)
>arm32_kernel_vm_init: adding L2 pt (VA 0x81264000, PA 0x11264000) for VA 
>0xc2800000 (vm)
>arm32_kernel_vm_init: adding L2 pt (VA 0x81266000, PA 0x11266000) for VA 
>0xc3000000 (vm)
>arm32_kernel_vm_init: adding L2 pt (VA 0x81268000, PA 0x11268000) for VA 
>0xc3800000 (vm)
>Mapping kernel
>arm32_kernel_vm_init: adding chunk for kernel text 
>0x10800000..0x10d49fff (VA 0x80800000)
>add_pages: adding pv 0x8122aa4c (pa 0x10800000, va 0x80800000, 677 
>pages) before pa 0x11256000
>arm32_kernel_vm_init: adding chunk for kernel data/bss 
>0x10d4a000..0x11255fff (VA 0x80d4a000)
>add_pages: appending pv 0x8122aac0 (0x10d4a000..0x11255fff) to 
>0x10800000..0x10d49fff
>add_pages: merging pv 0x8122aa60 (0x11256000..0x11297fff) to 
>0x10800000..0x11255fff
>Listing Chunks
>arm32_kernel_vm_init: pv 0x8122aa4c: chunk VA 0x80800000..0x81297fff (PA 
>0x10800000, prot 3, cache 1)
>
>Mapping Chunks
>arm32_kernel_vm_init: mapping chunk VA 0x40000000..0x407fffff (PA 
>0x10000000, prot 3, cache 1)
>pmap_map_chunk: pa=0x10000000 va=0x40000000 size=0x800000 resid=0x800000 
>prot=0x3 cache=1
>SSSSSSSS
>arm32_kernel_vm_init: mapping last chunk VA 0x80800000..0xffffffff (PA 
>0x10800000, prot 3, cache 1)
>pmap_map_chunk: pa=0x10800000 va=0x80800000 size=0x7f800000 
>resid=0x7f800000 prot=0x3 cache=1
>SSSSSSSSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsS
>sSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSsSS
>devmap: 02000000 -> 021fffff @ ff000000
>pmap_map_chunk: pa=0x2000000 va=0xff000000 size=0x200000 resid=0x200000 
>prot=0x3 cache=0
>SS
>devmap: 00a00000 -> 00afffff @ ff200000
>pmap_map_chunk: pa=0xa00000 va=0xff200000 size=0x100000 resid=0x100000 
>prot=0x3 cache=0
>S
>                              Physical              Virtual        Num
>                        Starting    Ending    Starting    Ending   Pages
>                SDRAM: 0x10000000 0x8fffffff 0x80000000 0xffffffff 262144
>         text section: 0x10800000 0x10d49fff 0x80800000 0x80d49fff 677
>         data section: 0x10d50000 0x1122a340 0x80d50000 0x8122a340 622
>          bss section: 0x1122a340 0x11255c88 0x8122a340 0x81255c88 22
>    L1 page directory: 0x11258000 0x1125bfff 0x81258000 0x8125bfff 2
>    ABT stack (CPU 0): 0x1126a000 0x1126bfff 0x8126a000 0x8126bfff 1
>    FIQ stack (CPU 0): 0x11272000 0x11273fff 0x81272000 0x81273fff 1
>    IRQ stack (CPU 0): 0x1127a000 0x1127bfff 0x8127a000 0x8127bfff 1
>    UND stack (CPU 0): 0x11282000 0x11283fff 0x81282000 0x81283fff 1
>   IDLE stack (CPU 0): 0x1128a000 0x1128bfff 0x8128a000 0x8128bfff 1
>            SVC stack: 0x11292000 0x11293fff 0x81292000 0x81293fff 1
>       Message Buffer: 0x11294000 0x11297fff 0x81294000 0x81297fff 2
>          Free Memory: 0x11298000 0x8fffffff                       259764
>          Free Memory: 0x10000000 0x107fffff                       1024
>TTBR0=0x1fffc05b TTBR1=0x1fffc05b TTBCR=0x1 CONTEXTIDR=0
>switching to new L1 page table @0x11258000... ttb (TTBCR=0x11 
>TTBR0=0x1125805b TTBR1=0x1125805b) 
>hatchlingscpu_boot_secondary_processors: writing mbox with 0xe
>  OK
>nfreeblocks = 2, free_pages = 260788 (0x3fab4)
>bootstrap done.
>vectors vbar=0x80bcdf80 0x80bcdf80
>init subsystems: stacks vectors undefined page pmap_physload pmap kpm 
>tlb0 kcpusets locks l1pt cache(l1pt) specials panic: 
>pmap_alloc_specials: no l2b for 0xc0000000
>Undefined instruction 0xe7ffffff in kernel at 0x80875f84 (LR 0x80afb674 
>SP 0x812
>2aa28)
>Stopped in pid 0.1 (system) at  80875f84:       ldrb    r15, [r15, r15, 
>ror r15]
>!
>db{0}>
>
>	Undefined instruction ? CPU is a quad core iMX6...
>
>	Regards,

There are some problems about memory size detection.
Please add

  options MEMSIZE=512

to kernel config as a trial.


I can't tell why not boot on SabreSD....hmmm

--
ryo shimizu