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Re: cpu0: L2 cache 0MB 64B/line 4-way for CeleronD



> > It should be 128KB or 256KB but seems truncated due to
> > too small printf buffer.
> ...
> > /* Size of buffer for printing humanized numbers */
> > -#define HUMAN_BUFSIZE 5
> > +#define HUMAN_BUFSIZE sizeof("999KB")
> 
> Glacious, and commit it please.

Done.

> I found my trusty P3-933MHz could now show as follows this time.

My Athlon 64 also shows a proper value:

  cpu0: "AMD Athlon(tm) 64 Processor 3500+"
 :
- cpu0: L2 cache 1MB 64B/line 16-way
+ cpu0: L2 cache 512KB 64B/line 16-way

---
Izumi Tsutsui


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