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Re: cpu0: L2 cache 0MB 64B/line 4-way for CeleronD



It should be 128KB or 256KB but seems truncated due to
too small printf buffer.
...
/* Size of buffer for printing humanized numbers */
-#define HUMAN_BUFSIZE 5
+#define HUMAN_BUFSIZE sizeof("999KB")

Glacious, and commit it please.

I found my trusty P3-933MHz could now show as follows this time.

cpu0: Intel Pentium III (686-class), 930.36 MHz, id 0x68a
cpu0: features 0x383fbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR>
cpu0: features 0x383fbff<PGE,MCA,CMOV,PAT,PSE36,MMX>
cpu0: features 0x383fbff<FXSR,SSE>
cpu0: I-cache 16KB 32B/line 4-way, D-cache 16KB 32B/line 4-way
cpu0: L2 cache 256KB 32B/line 8-way
cpu0: ITLB 32 4KB entries 4-way, 2 4MB entries fully associative
cpu0: DTLB 64 4KB entries 4-way, 8 4MB entries 4-way
cpu0: Initial APIC ID 0
cpu0: Cluster/Package ID 0
cpu0: family 06 model 08 extfamily 00 extmodel 00

Toru Nishimura / ALKYL Technology





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