Re: NetBSD as an NTP stratum 1 server

[Brad Spencer <brad%anduin.eldar.org@localhost>]

joelp%sdf.org@localhost writes:

>>> Greg Troxel <gdt%lexort.com@localhost> writes:
>>>
>>>> Brad Spencer <brad%anduin.eldar.org@localhost> writes:
>>>>
>>>> (The advice about "use gpio" is good - I am just trying to clarify USB
>>>> PPS.)
>>>
>>> It has worked very well for me, assuming that the GPS module is stable.
>>> I had one that would have a tendency to crash in its firmware after
>>> being up for a while and totally lose its mind.
>>>
>>
>> Thanks for the detailed information and discussion.
>>
>> I built a kernel for my Rock64 on its bigger sibling RockPro64 (has a PCIe
>> SSD card) -- sorry, okay, that was me just saying how much I enjoy these 2
>> devices! Anyway...I ran into a problem initializing gpiopps. Here is the
>> Rock64 output when initializing with gpio.conf:
>>     [1.000004] gpiopps0 at gpio1 pins 28
>>     [1.000004] gpiopps0: autoconfiguration error: positive edge interrupt
>> not supported for ASSERT
>> I also booted single user and it fails using gpioctl. Taking a peek at
>> src/sys/dev/gpio/gpiopps.c this would be in the second if-block (1 pin) in
>> gpiopps_attach:
>>         if (!gpio_intr_str(sc->sc_gpio, &sc->sc_map, 0,
>>                    sc->sc_intrs[0].sc_irqmode,
>>                    sc->sc_intrs[0].sc_intrstr,
>>                    sizeof(sc->sc_intrs[0].sc_intrstr))) {
>>             aprint_error_dev(self,
>>                 "failed to decode interrupt\n");
>>             gpio_pin_unmap(sc->sc_gpio, &sc->sc_map);
>>             return;
>> Here's what I added to evbarm/conf/GENERIC64:
>>     gpiopps* at gpio1 offset 28 mask 0x1 flag 0x2
>> This is for physical pin 7 which per pine64 wiki is GPIO1_D4. So gpio1 and
>> D=3, so 3*8 + 4 = port 28.
>>
>> I tried also modifying the RockPro64 kernel -- similar issue.
>>
>> Any idea what am I doing wrong?
>>
>> Thanks - Joel
>>
>>
> And sorry, wrong code block from gpiopps.c:
>         } else {
>             aprint_error_dev(sc->sc_dev,
>                 "%s edge interrupt not supported for ASSERT\n",
>                 assert_edge == GPIO_INTR_POS_EDGE ? "positive"
>                                       : "negative");
>             gpio_pin_unmap(sc->sc_gpio, &sc->sc_map);
>             return;
>         }


I failed to mention this before, and I don't think that the gpiopps(4)
man page mentions this, but you need a device that supports GPIO
interrupts to use gpiopps(4).  Not all of the SOC systems support that.

The message you are getting very much implies that interrupts are not
supported in the configuration you are trying to use (which wasn't
exactly metioned).

There are several possible situations...  for example, the RPI family
supports GPIO interrupts on the positive and negative edge of the pulse
and at the same time (gpiosim(4) does too now, but that is a GPIO
simulator).  It may be that your device only supports it on one edge or
the other or not at all.  The ntpd PPS driver, I seem to remember,
supports using just one edge and I think I remember that it could be
either one (or it use both edges).  You can configure gpiopps(4) to do
any of those cases.  You can also try using gpioirq(4) and see if
interrupts work at all, if you can't find documentation anywhere for
your device.  If you can get interrupts on one edge working I think you
win with ntpd, otherwise that device can't be used.






-- 
Brad Spencer - brad%anduin.eldar.org@localhost - KC8VKS - http://anduin.eldar.org