"Michael T. Davis" <DAVISM%ecr6.ohio-state.edu@localhost> writes: > Since the mii(4) man page lacks a cross-reference for igphy under > -current (though -current does include an igphy(4) page), and with this > experience, I think it's safe to conclude that the card I tried isn't > properly supported yet. Perhaps under a future release...? Yes, probably safe conclusion. But, it may be that the changes to make it work are very small and you can backport them from current. I have one of these, working fine: wm0 at pci0 dev 25 function 0: 82567LM-3 LAN Controller, rev. 2 wm0: interrupting at ioapic0 pin 20 wm0: PCI-Express bus wm0: FLASH wm0: Ethernet address [omitted] and the same machine has, not in use: wm1 at pci1 dev 0 function 0: Intel i82541PI 1000BASE-T Ethernet, rev. 5 wm1: interrupting at ioapic0 pin 21 wm1: 32-bit 33MHz PCI bus wm1: 64 word (6 address bits) MicroWire EEPROM wm1: Ethernet address [omitted] igphy0 at wm1 phy 1: Intel IGP01E1000 Gigabit PHY, rev. 0 igphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT, 1000baseT-FDX, auto I don't remember why, but it seems like we must have had trouble with the 82541PI. In src/sys/dev/pci/if_wm.c, this might be related. But the diff from 5 to current is too big for me to recommend that you deal with it. revision 1.219 date: 2011/02/06 16:23:00; author: bouyer; state: Exp; lines: +4 -4 wm_gmii_reset(): restore generic reset delays to what they were before rev 1.186. This makes the following hardware find its PHY again, and I can't see how these larger delays could be a problem for other hardware: wm0 at pci6 dev 7 function 0: Intel i82541GI 1000BASE-T Ethernet, rev. 5 wm0: interrupting at ioapic2 pin 0, event channel 5 wm0: 32-bit 66MHz PCI bus wm0: 65536 word (16 address bits) SPI EEPROM wm0: Ethernet address 00:13:72:54:ee:13 igphy0 at wm0 phy 1: Intel IGP01E1000 Gigabit PHY, rev. 0 igphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT, 1000baseT-FDX, auto
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