Re: kern/60144: virtio(4) cache coherence issue

["Jason Thorpe via gnats" <gnats-admin%NetBSD.org@localhost>]

The following reply was made to PR kern/60144; it has been noted by GNATS.

From: Jason Thorpe <thorpej%me.com@localhost>
To: Tetsuya Isaki <isaki%pastel-flower.jp@localhost>
Cc: gnats-bugs%netbsd.org@localhost,
 kern-bug-people%netbsd.org@localhost,
 gnats-admin%netbsd.org@localhost,
 netbsd-bugs%netbsd.org@localhost
Subject: Re: kern/60144: virtio(4) cache coherence issue
Date: Tue, 31 Mar 2026 06:33:30 -0700

 > On Mar 31, 2026, at 2:55=E2=80=AFAM, Tetsuya Isaki =
 <isaki%pastel-flower.jp@localhost> wrote:
 >=20
 > Mostly yes.
 > In my emulator, I tend to focus on accuracy (though performance is
 > also important).
 > If asked why you are implementing a cache (even though it could not
 > contribute to performance), my answer is "because it's there." :)
 >=20
 > But seriously, though it's off topic,
 > speaking of 68030, it is VA cache.  When a cache hit occurs,
 > it can skip not only memory access but also both ATC lookup and
 > table search.  So, my cache implementation also contributed to
 > performance well on my 68030 emulation.
 
 Oh, I don=E2=80=99t doubt that one bit!  I was more speaking =
 philosophically about VirtIO specifically.
 
 -- thorpej