Re: kern/60144: virtio(4) cache coherence issue

["Tetsuya Isaki via gnats" <gnats-admin%NetBSD.org@localhost>]

The following reply was made to PR kern/60144; it has been noted by GNATS.

From: Tetsuya Isaki <isaki%pastel-flower.jp@localhost>
To: Jason Thorpe <thorpej%me.com@localhost>
Cc: Taylor Campbell <riastradh%NetBSD.org@localhost>,
	"netbsd-bugs%netbsd.org@localhost" <netbsd-bugs%NetBSD.org@localhost>,
	"gnats-bugs%netbsd.org@localhost" <gnats-bugs%NetBSD.org@localhost>
Subject: Re: kern/60144: virtio(4) cache coherence issue
Date: Tue, 31 Mar 2026 22:36:19 +0900

 At Tue, 31 Mar 2026 06:24:36 -0700,
 Jason Thorpe wrote:
 > >  try to implement (and test) it.
 > > Or would someone take this?
 >=20
 > I=A2ll be happy to implement it, and let you test it :-). It=A2s very tri=
 vial on 68030 since the cache is write-through.
 
 Okay :)
 ---
 Tetsuya Isaki <isaki%pastel-flower.jp@localhost / isaki%NetBSD.org@localhost>