Re: port-arm/49622: Minor enhancements to if_cpsw

[Sprow <webpages%sprow.co.uk@localhost>]

The following reply was made to PR port-arm/49622; it has been noted by GNATS.

From: Sprow <webpages%sprow.co.uk@localhost>
To: gnats-bugs%NetBSD.org@localhost
Cc: 
Subject: Re: port-arm/49622: Minor enhancements to if_cpsw
Date: Wed, 11 Feb 2015 08:14:58 +0000 (GMT)

 Patch updated to apply against if_cpsw.c revision 1.7.
 
 if_cpsw.c
 ~~~~~~~~~
 Line 875:
 Use bit definitions from the header to build the register poke.
 Also, remove the 'BYPASS' bit (4), otherwise all the careful setup of the
 ALE is futile - the BYPASS bit is described in the AM3358 datasheet as "When
 in bypass mode, all CPGMAC_SL received packets are forwarded only to the
 host port (port 0)" so effectively it's a promiscuous enable. This was
 confirmed by injecting some packets via a crossover cable with known
 non-matching EUI48 destination and observing they arrive on the interface
 (obviously with a switch in the way these would have been masked).
 Line 1016:
 During cpsw_stop the MISC interrupts were being left enabled, looks like a
 copy & paste mistake from cpsw_init.
 Line 1205:
 Remove unnecessary calculation of cpi, since it's recalculated as the second
 thing inside the loop that processes receive buffers.
 General/others:
 Couple of typos, swap to using host/ethernet port limits from the header
 file as for loop limits, some const's, parenthesis for clarity.
 
 --- if_cpsw_1_7.c	2015-02-01 20:35:10 +0000
 +++ if_cpsw_new.c	2015-02-11 08:12:34 +0000
 @@ -656,7 +656,7 @@
  				dw[3] |= CPDMA_BD_SOP | CPDMA_BD_OWNER |
  				    MAX(mlen, CPSW_PAD_LEN);
  
 -			if (seg == dm->dm_nsegs - 1 && !pad)
 +			if ((seg == dm->dm_nsegs - 1) && !pad)
  				dw[3] |= CPDMA_BD_EOP;
  
  			cpsw_set_txdesc(sc, sc->sc_txnext, &bd);
 @@ -875,11 +875,11 @@
  	cpsw_write_4(sc, CPSW_SS_SOFT_RESET, 1);
  	while(cpsw_read_4(sc, CPSW_SS_SOFT_RESET) & 1);
  
 -	/* Clear table (30) and enable ALE(31) and set passthrough (4) */
 -	cpsw_write_4(sc, CPSW_ALE_CONTROL, (3 << 30) | 0x10);
 +	/* Clear table and enable ALE */
 +	cpsw_write_4(sc, CPSW_ALE_CONTROL, ALECTL_ENABLE_ALE | ALECTL_CLEAR_TABLE);
  
  	/* Reset and init Sliver port 1 and 2 */
 -	for (i = 0; i < 2; i++) {
 +	for (i = 0; i < CPSW_ETH_PORTS; i++) {
  		uint32_t macctl;
  
  		/* Reset */
 @@ -976,9 +976,9 @@
  	cpsw_write_4(sc, CPSW_CPDMA_CPDMA_EOI_VECTOR, CPSW_INTROFF_TX);
  	cpsw_write_4(sc, CPSW_CPDMA_CPDMA_EOI_VECTOR, CPSW_INTROFF_MISC);
  
 -	/* Initialze MDIO - ENABLE, PREAMBLE=0, FAULTENB, CLKDIV=0xFF */
 +	/* Initialize MDIO - ENABLE, PREAMBLE=0, FAULTENB, CLKDIV=0xFF */
  	/* TODO Calculate MDCLK=CLK/(CLKDIV+1) */
 -	cpsw_write_4(sc, MDIOCONTROL, (1<<30) | (1<<18) | 0xFF);
 +	cpsw_write_4(sc, MDIOCONTROL, MDIOCTL_ENABLE | MDIOCTL_FAULTENB |
 MDIOCTL_CLKDIV(0xff));
  
  	mii_mediachg(mii);
  
 @@ -1016,7 +1016,7 @@
  	cpsw_write_4(sc, CPSW_CPDMA_RX_INTMASK_CLEAR, 1);
  	cpsw_write_4(sc, CPSW_WR_C_TX_EN(0), 0x0);
  	cpsw_write_4(sc, CPSW_WR_C_RX_EN(0), 0x0);
 -	cpsw_write_4(sc, CPSW_WR_C_MISC_EN(0), 0x1F);
 +	cpsw_write_4(sc, CPSW_WR_C_MISC_EN(0), 0x0);
  
  	cpsw_write_4(sc, CPSW_CPDMA_TX_TEARDOWN, 0);
  	cpsw_write_4(sc, CPSW_CPDMA_RX_TEARDOWN, 0);
 @@ -1039,7 +1039,7 @@
  	cpsw_write_4(sc, CPSW_SS_SOFT_RESET, 1);
  	while(cpsw_read_4(sc, CPSW_SS_SOFT_RESET) & 1);
  
 -	for (i = 0; i < 2; i++) {
 +	for (i = 0; i < CPSW_ETH_PORTS; i++) {
  		cpsw_write_4(sc, CPSW_SL_SOFT_RESET(i), 1);
  		while(cpsw_read_4(sc, CPSW_SL_SOFT_RESET(i)) & 1);
  	}
 @@ -1205,14 +1205,13 @@
  	tx0_cp = cpsw_read_4(sc, CPSW_CPDMA_TX_CP(0));
  
  	if (tx0_cp == 0xfffffffc) {
 +		/* Teardown, ack it */
  		cpsw_write_4(sc, CPSW_CPDMA_TX_CP(0), 0xfffffffc);
  		cpsw_write_4(sc, CPSW_CPDMA_TX_HDP(0), 0);
  		sc->sc_txrun = false;
  		return 0;
  	}
  
 -	cpi = (tx0_cp - sc->sc_txdescs_pa) / sizeof(struct cpsw_cpdma_bd);
 -
  	for (;;) {
  		tx0_cp = cpsw_read_4(sc, CPSW_CPDMA_TX_CP(0));
  		cpi = (tx0_cp - sc->sc_txdescs_pa) / sizeof(struct cpsw_cpdma_bd);
 @@ -1367,7 +1366,7 @@
  }
  
  static void
 -cpsw_ale_entry_set(uint32_t *ale_entry, ale_entry_filed_t field, uint32_t
 val)
 +cpsw_ale_entry_set(uint32_t *ale_entry, ale_entry_field_t field, uint32_t
 val)
  {
  	/* Entry type[61:60] is addr entry(1), Mcast fwd state[63:62] is fw(3)*/
  	switch (field) {
 @@ -1424,7 +1423,7 @@
  }
  
  static void
 -cpsw_ale_write_entry(struct cpsw_softc *sc, uint16_t idx, uint32_t
 *ale_entry)
 +cpsw_ale_write_entry(struct cpsw_softc *sc, uint16_t idx, const uint32_t
 *ale_entry)
  {
  	cpsw_write_4(sc, CPSW_ALE_TBLW0, ale_entry[0]);
  	cpsw_write_4(sc, CPSW_ALE_TBLW1, ale_entry[1]);
 @@ -1507,7 +1506,7 @@
  	cpsw_ale_write_entry(sc, 0, ale_entry);
  
  	/* Set outgoing MAC Address for Ports 1 and 2. */
 -	for (i = 1; i < 3; ++i)
 +	for (i = CPSW_CPPI_PORTS; i < (CPSW_ETH_PORTS + CPSW_CPPI_PORTS); ++i)
  		cpsw_ale_set_outgoing_mac(sc, i, mac);
  
  	/* Keep the broadcast address at table entry 1. */