Re: gallium llvmpipe failure & NDEBUG on netbsd-11 [PATCH]

[Paul Ripke <stix%stix.id.au@localhost>]

On Sun, Aug 16, 2026 at 01:59:59PM +1000, Paul Ripke wrote:
> First off, congrats on netbsd-11! After tracking NetBSD since 0.8,
> this was by far one of the smoother upgrades I've had.
> 
> Now to the issue I'm encountering. As my integrated Ryzen graphics
> isn't supported, I'm relying on llvmpipe, which has been working fine
> on netbsd-10. Under netbsd-11, *some* apps are crashing:
> 
> libEGL warning: DRI2: failed to authenticate
> DefIdx 1 exceeds machine model writes for early-clobber renamable $ymm5, dead early-clobber renamable $ymm0 = VPGATHERDDYrm killed renamable $ymm5(tied-def 0), renamable $rcx, 1, killed renamable $ymm1, 0, $noreg, killed renamable $ymm0(tied-def 1) :: (load 32, align 1)
>  (Try with MCSchedModel.CompleteModel set to false)incomplete machine model
> UNREACHABLE executed at /home/netbsd/netbsd-11/src/external/apache2/llvm/librt/libLLVMCodeGen/../../lib/../dist/llvm/lib/CodeGen/TargetSchedule.cpp:246!
> Abort (core dumped) 
> 
> So far, apps include prusaslicer, freecad, xroar. They do "run" (like
> molasses) by passing GALLIUM_DRIVER=softpipe.
> 
> Looking at TargetSchedule.cpp, it appears this is not built with
> NDEBUG - should it? I also see a macro REDEBUG used to control NDEBUG,
> although I haven't traced the includes around.

I've tried defining NDEBUG just in TargetSchedule.cpp, which results
in an assert tripping elsewhere:

assertion "ProcResourceIdx < NumProcResourceKinds && "bad proc resource idx"" failed: file "/home/netbsd/netbsd-11/src/external/apache2/llvm/librt/libLLVMCodeGen/../../lib/../dist/llvm/include/llvm/MC/MCSchedule.h", line 343, function "const llvm::MCProcResourceDesc* llvm::MCSchedModel::getProcResource(unsigned int) const"
Abort (core dumped) 

Trying to define NDEBUG more broadly seems to just spit compiler errors
in numerous places.

After reading through code a little more, I found a fix, which returns
back to netbsd-10 behaviour for llvmpipe. My machine has an AMD Ryzen 7900
which is Zen4 based... but our LLVM lacks the newer Zen4 description.
Maybe that's why?

diff --git a/external/apache2/llvm/dist/llvm/lib/Target/X86/X86ScheduleZnver3.td b/external/apache2/llvm/dist/llvm/lib/Target/X86/X86ScheduleZnver3.td
index fae9b1b51ef1..1229f68760a5 100644
--- a/external/apache2/llvm/dist/llvm/lib/Target/X86/X86ScheduleZnver3.td
+++ b/external/apache2/llvm/dist/llvm/lib/Target/X86/X86ScheduleZnver3.td
@@ -60,7 +60,7 @@ def Znver3Model : SchedMachineModel {
 
   let PostRAScheduler = 1; // Enable Post RegAlloc Scheduler pass.
 
-  let CompleteModel = 1;
+  let CompleteModel = 0;
 }
 
 let SchedModel = Znver3Model in {

Cheers,
-- 
Paul Ripke
"Great minds discuss ideas, average minds discuss events, small minds
 discuss people."
-- Disputed: Often attributed to Eleanor Roosevelt. 1948.